···1717#include <asm/asm-compat.h>1818#include <asm/asm-offsets.h>19192020+#ifndef CONFIG_PPC642021/* epapr_ev_idle() was derived from e500_idle() */2122_GLOBAL(epapr_ev_idle)2223 CURRENT_THREAD_INFO(r3, r1)···4342 * _TLF_NAPPING.4443 */4544 b idle_loop4545+#endif46464747/* Hypercall entry point. Will be patched with device tree instructions. */4848.global epapr_hypercall_start
+30-2
arch/powerpc/kernel/idle_book3e.S
···1616#include <asm/ppc-opcode.h>1717#include <asm/processor.h>1818#include <asm/thread_info.h>1919+#include <asm/epapr_hcalls.h>19202021/* 64-bit version only for now */2122#ifdef CONFIG_PPC6422232323-_GLOBAL(book3e_idle)2424+.macro BOOK3E_IDLE name loop2525+_GLOBAL(\name)2426 /* Save LR for later */2527 mflr r02628 std r0,16(r1)···69677068 /* We can now re-enable hard interrupts and go to sleep */7169 wrteei 17272-1: PPC_WAIT(0)7070+ \loop7171+7272+.endm7373+7474+.macro BOOK3E_IDLE_LOOP7575+1:7676+ PPC_WAIT(0)7377 b 1b7878+.endm7979+8080+/* epapr_ev_idle_start below is patched with the proper hcall8181+ opcodes during kernel initialization */8282+.macro EPAPR_EV_IDLE_LOOP8383+idle_loop:8484+ LOAD_REG_IMMEDIATE(r11, EV_HCALL_TOKEN(EV_IDLE))8585+8686+.global epapr_ev_idle_start8787+epapr_ev_idle_start:8888+ li r3, -18989+ nop9090+ nop9191+ nop9292+ b idle_loop9393+.endm9494+9595+BOOK3E_IDLE epapr_ev_idle EPAPR_EV_IDLE_LOOP9696+9797+BOOK3E_IDLE book3e_idle BOOK3E_IDLE_LOOP74987599#endif /* CONFIG_PPC64 */