Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6

* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] Prevent people from directly including <asm/rwsem.h>.
[IA64] remove time interpolator
[IA64] Convert to generic timekeeping/clocksource
[IA64] refresh some config files for 64K pagesize
[IA64] Delete iosapic_free_rte()
[IA64] fallocate system call
[IA64] Enable percpu vector domain for IA64_DIG
[IA64] Enable percpu vector domain for IA64_GENERIC
[IA64] Support irq migration across domain
[IA64] Add support for vector domain
[IA64] Add mapping table between irq and vector
[IA64] Check if irq is sharable
[IA64] Fix invalid irq vector assumption for iosapic
[IA64] Use dynamic irq for iosapic interrupts
[IA64] Use per iosapic lock for indirect iosapic register access
[IA64] Cleanup lock order in iosapic_register_intr
[IA64] Remove duplicated members in iosapic_rte_info
[IA64] Remove block structure for locking in iosapic.c

+1191 -1416
+5
Documentation/kernel-parameters.txt
··· 1154 1154 1155 1155 nointroute [IA-64] 1156 1156 1157 + nojitter [IA64] Disables jitter checking for ITC timers. 1158 + 1157 1159 nolapic [IA-32,APIC] Do not enable or use the local APIC. 1158 1160 1159 1161 nolapic_timer [IA-32,APIC] Do not use the local APIC timer. ··· 1886 1884 vdso=2: enable compat VDSO (default with COMPAT_VDSO) 1887 1885 vdso=1: enable VDSO (default) 1888 1886 vdso=0: disable VDSO mapping 1887 + 1888 + vector= [IA-64,SMP] 1889 + vector=percpu: enable percpu vector domain 1889 1890 1890 1891 video= [FB] Frame buffer configuration 1891 1892 See Documentation/fb/modedb.txt.
-41
Documentation/time_interpolators.txt
··· 1 - Time Interpolators 2 - ------------------ 3 - 4 - Time interpolators are a base of time calculation between timer ticks and 5 - allow an accurate determination of time down to the accuracy of the time 6 - source in nanoseconds. 7 - 8 - The architecture specific code typically provides gettimeofday and 9 - settimeofday under Linux. The time interpolator provides both if an arch 10 - defines CONFIG_TIME_INTERPOLATION. The arch still must set up timer tick 11 - operations and call the necessary functions to advance the clock. 12 - 13 - With the time interpolator a standardized interface exists for time 14 - interpolation between ticks. The provided logic is highly scalable 15 - and has been tested in SMP situations of up to 512 CPUs. 16 - 17 - If CONFIG_TIME_INTERPOLATION is defined then the architecture specific code 18 - (or the device drivers - like HPET) may register time interpolators. 19 - These are typically defined in the following way: 20 - 21 - static struct time_interpolator my_interpolator { 22 - .frequency = MY_FREQUENCY, 23 - .source = TIME_SOURCE_MMIO32, 24 - .shift = 8, /* scaling for higher accuracy */ 25 - .drift = -1, /* Unknown drift */ 26 - .jitter = 0 /* time source is stable */ 27 - }; 28 - 29 - void time_init(void) 30 - { 31 - .... 32 - /* Initialization of the timer *. 33 - my_interpolator.address = &my_timer; 34 - register_time_interpolator(&my_interpolator); 35 - .... 36 - } 37 - 38 - For more details see include/linux/timex.h and kernel/timer.c. 39 - 40 - Christoph Lameter <christoph@lameter.com>, October 31, 2004 41 -
+5 -1
arch/ia64/Kconfig
··· 62 62 bool 63 63 default y 64 64 65 - config TIME_INTERPOLATION 65 + config GENERIC_TIME 66 + bool 67 + default y 68 + 69 + config GENERIC_TIME_VSYSCALL 66 70 bool 67 71 default y 68 72
+1 -1
arch/ia64/configs/bigsur_defconfig
··· 85 85 CONFIG_SWIOTLB=y 86 86 CONFIG_RWSEM_XCHGADD_ALGORITHM=y 87 87 CONFIG_GENERIC_CALIBRATE_DELAY=y 88 - CONFIG_TIME_INTERPOLATION=y 88 + CONFIG_GENERIC_TIME=y 89 89 CONFIG_EFI=y 90 90 CONFIG_GENERIC_IOMAP=y 91 91 CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+1 -1
arch/ia64/configs/gensparse_defconfig
··· 86 86 CONFIG_SWIOTLB=y 87 87 CONFIG_RWSEM_XCHGADD_ALGORITHM=y 88 88 CONFIG_GENERIC_CALIBRATE_DELAY=y 89 - CONFIG_TIME_INTERPOLATION=y 89 + CONFIG_GENERIC_TIME=y 90 90 CONFIG_EFI=y 91 91 CONFIG_GENERIC_IOMAP=y 92 92 CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+1 -1
arch/ia64/configs/sim_defconfig
··· 86 86 CONFIG_SWIOTLB=y 87 87 CONFIG_RWSEM_XCHGADD_ALGORITHM=y 88 88 CONFIG_GENERIC_CALIBRATE_DELAY=y 89 - CONFIG_TIME_INTERPOLATION=y 89 + CONFIG_GENERIC_TIME=y 90 90 CONFIG_EFI=y 91 91 CONFIG_GENERIC_IOMAP=y 92 92 CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+1 -1
arch/ia64/configs/sn2_defconfig
··· 93 93 CONFIG_RWSEM_XCHGADD_ALGORITHM=y 94 94 CONFIG_GENERIC_FIND_NEXT_BIT=y 95 95 CONFIG_GENERIC_CALIBRATE_DELAY=y 96 - CONFIG_TIME_INTERPOLATION=y 96 + CONFIG_GENERIC_TIME=y 97 97 CONFIG_DMI=y 98 98 CONFIG_EFI=y 99 99 CONFIG_GENERIC_IOMAP=y
+102 -220
arch/ia64/configs/tiger_defconfig
··· 1 1 # 2 2 # Automatically generated make config: don't edit 3 - # Linux kernel version: 2.6.21-rc3 4 - # Thu Mar 8 11:07:09 2007 3 + # Linux kernel version: 2.6.22 4 + # Thu Jul 19 13:54:47 2007 5 5 # 6 6 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 7 7 ··· 19 19 CONFIG_LOCALVERSION_AUTO=y 20 20 CONFIG_SWAP=y 21 21 CONFIG_SYSVIPC=y 22 - # CONFIG_IPC_NS is not set 23 22 CONFIG_SYSVIPC_SYSCTL=y 24 23 CONFIG_POSIX_MQUEUE=y 25 24 # CONFIG_BSD_PROCESS_ACCT is not set 26 25 # CONFIG_TASKSTATS is not set 27 - # CONFIG_UTS_NS is not set 26 + # CONFIG_USER_NS is not set 28 27 # CONFIG_AUDIT is not set 29 28 CONFIG_IKCONFIG=y 30 29 CONFIG_IKCONFIG_PROC=y 30 + CONFIG_LOG_BUF_SHIFT=20 31 31 # CONFIG_CPUSETS is not set 32 32 CONFIG_SYSFS_DEPRECATED=y 33 33 # CONFIG_RELAY is not set ··· 46 46 CONFIG_ELF_CORE=y 47 47 CONFIG_BASE_FULL=y 48 48 CONFIG_FUTEX=y 49 + CONFIG_ANON_INODES=y 49 50 CONFIG_EPOLL=y 51 + CONFIG_SIGNALFD=y 52 + CONFIG_TIMERFD=y 53 + CONFIG_EVENTFD=y 50 54 CONFIG_SHMEM=y 51 - CONFIG_SLAB=y 52 55 CONFIG_VM_EVENT_COUNTERS=y 56 + CONFIG_SLAB=y 57 + # CONFIG_SLUB is not set 58 + # CONFIG_SLOB is not set 53 59 CONFIG_RT_MUTEXES=y 54 60 # CONFIG_TINY_SHMEM is not set 55 61 CONFIG_BASE_SMALL=0 56 - # CONFIG_SLOB is not set 57 - 58 - # 59 - # Loadable module support 60 - # 61 62 CONFIG_MODULES=y 62 63 CONFIG_MODULE_UNLOAD=y 63 64 # CONFIG_MODULE_FORCE_UNLOAD is not set ··· 66 65 CONFIG_MODULE_SRCVERSION_ALL=y 67 66 CONFIG_KMOD=y 68 67 CONFIG_STOP_MACHINE=y 69 - 70 - # 71 - # Block layer 72 - # 73 68 CONFIG_BLOCK=y 74 69 # CONFIG_BLK_DEV_IO_TRACE is not set 70 + # CONFIG_BLK_DEV_BSG is not set 75 71 76 72 # 77 73 # IO Schedulers ··· 89 91 CONFIG_IA64=y 90 92 CONFIG_64BIT=y 91 93 CONFIG_ZONE_DMA=y 94 + CONFIG_QUICKLIST=y 92 95 CONFIG_MMU=y 93 96 CONFIG_SWIOTLB=y 94 97 CONFIG_RWSEM_XCHGADD_ALGORITHM=y ··· 97 98 # CONFIG_ARCH_HAS_ILOG2_U64 is not set 98 99 CONFIG_GENERIC_FIND_NEXT_BIT=y 99 100 CONFIG_GENERIC_CALIBRATE_DELAY=y 100 - CONFIG_TIME_INTERPOLATION=y 101 + CONFIG_GENERIC_TIME=y 101 102 CONFIG_DMI=y 102 103 CONFIG_EFI=y 103 104 CONFIG_GENERIC_IOMAP=y ··· 113 114 CONFIG_MCKINLEY=y 114 115 # CONFIG_IA64_PAGE_SIZE_4KB is not set 115 116 # CONFIG_IA64_PAGE_SIZE_8KB is not set 116 - CONFIG_IA64_PAGE_SIZE_16KB=y 117 - # CONFIG_IA64_PAGE_SIZE_64KB is not set 117 + # CONFIG_IA64_PAGE_SIZE_16KB is not set 118 + CONFIG_IA64_PAGE_SIZE_64KB=y 118 119 CONFIG_PGTABLE_3=y 119 120 # CONFIG_PGTABLE_4 is not set 120 121 # CONFIG_HZ_100 is not set ··· 144 145 CONFIG_SPLIT_PTLOCK_CPUS=4 145 146 CONFIG_RESOURCES_64BIT=y 146 147 CONFIG_ZONE_DMA_FLAG=1 148 + CONFIG_BOUNCE=y 149 + CONFIG_NR_QUICK=1 150 + CONFIG_VIRT_TO_BUS=y 147 151 CONFIG_ARCH_SELECT_MEMORY_MODEL=y 148 152 CONFIG_ARCH_DISCONTIGMEM_ENABLE=y 149 153 CONFIG_ARCH_FLATMEM_ENABLE=y ··· 154 152 CONFIG_ARCH_POPULATES_NODE_MAP=y 155 153 CONFIG_VIRTUAL_MEM_MAP=y 156 154 CONFIG_HOLES_IN_ZONE=y 157 - CONFIG_IA32_SUPPORT=y 158 - CONFIG_COMPAT=y 155 + # CONFIG_IA32_SUPPORT is not set 159 156 CONFIG_IA64_MCA_RECOVERY=y 160 157 CONFIG_PERFMON=y 161 158 CONFIG_IA64_PALINFO=y 159 + # CONFIG_IA64_MC_ERR_INJECT is not set 162 160 # CONFIG_IA64_ESI is not set 163 161 CONFIG_KEXEC=y 164 162 # CONFIG_CRASH_DUMP is not set ··· 168 166 # 169 167 CONFIG_EFI_VARS=y 170 168 CONFIG_EFI_PCDP=y 169 + CONFIG_DMIID=y 171 170 CONFIG_BINFMT_ELF=y 172 171 CONFIG_BINFMT_MISC=m 173 172 ··· 178 175 CONFIG_PM=y 179 176 CONFIG_PM_LEGACY=y 180 177 # CONFIG_PM_DEBUG is not set 181 - # CONFIG_PM_SYSFS_DEPRECATED is not set 182 178 183 179 # 184 180 # ACPI (Advanced Configuration and Power Interface) Support ··· 207 205 # 208 206 CONFIG_PCI=y 209 207 CONFIG_PCI_DOMAINS=y 208 + CONFIG_PCI_SYSCALL=y 210 209 # CONFIG_PCIEPORTBUS is not set 210 + CONFIG_ARCH_SUPPORTS_MSI=y 211 211 # CONFIG_PCI_MSI is not set 212 212 # CONFIG_PCI_DEBUG is not set 213 - 214 - # 215 - # PCI Hotplug Support 216 - # 217 213 CONFIG_HOTPLUG_PCI=m 218 214 # CONFIG_HOTPLUG_PCI_FAKE is not set 219 215 CONFIG_HOTPLUG_PCI_ACPI=m ··· 232 232 # 233 233 # Networking options 234 234 # 235 - # CONFIG_NETDEBUG is not set 236 235 CONFIG_PACKET=y 237 236 # CONFIG_PACKET_MMAP is not set 238 237 CONFIG_UNIX=y ··· 269 270 # CONFIG_INET6_TUNNEL is not set 270 271 # CONFIG_NETWORK_SECMARK is not set 271 272 # CONFIG_NETFILTER is not set 272 - 273 - # 274 - # DCCP Configuration (EXPERIMENTAL) 275 - # 276 273 # CONFIG_IP_DCCP is not set 277 - 278 - # 279 - # SCTP Configuration (EXPERIMENTAL) 280 - # 281 274 # CONFIG_IP_SCTP is not set 282 - 283 - # 284 - # TIPC Configuration (EXPERIMENTAL) 285 - # 286 275 # CONFIG_TIPC is not set 287 276 # CONFIG_ATM is not set 288 277 # CONFIG_BRIDGE is not set ··· 296 309 # CONFIG_HAMRADIO is not set 297 310 # CONFIG_IRDA is not set 298 311 # CONFIG_BT is not set 312 + # CONFIG_AF_RXRPC is not set 313 + 314 + # 315 + # Wireless 316 + # 317 + # CONFIG_CFG80211 is not set 318 + # CONFIG_WIRELESS_EXT is not set 319 + # CONFIG_MAC80211 is not set 299 320 # CONFIG_IEEE80211 is not set 321 + # CONFIG_RFKILL is not set 322 + # CONFIG_NET_9P is not set 300 323 301 324 # 302 325 # Device Drivers ··· 321 324 # CONFIG_DEBUG_DRIVER is not set 322 325 # CONFIG_DEBUG_DEVRES is not set 323 326 # CONFIG_SYS_HYPERVISOR is not set 324 - 325 - # 326 - # Connector - unified userspace <-> kernelspace linker 327 - # 328 327 # CONFIG_CONNECTOR is not set 329 - 330 - # 331 - # Memory Technology Devices (MTD) 332 - # 333 328 # CONFIG_MTD is not set 334 - 335 - # 336 - # Parallel port support 337 - # 338 329 # CONFIG_PARPORT is not set 339 - 340 - # 341 - # Plug and Play support 342 - # 343 330 CONFIG_PNP=y 344 331 # CONFIG_PNP_DEBUG is not set 345 332 ··· 331 350 # Protocols 332 351 # 333 352 CONFIG_PNPACPI=y 334 - 335 - # 336 - # Block devices 337 - # 353 + CONFIG_BLK_DEV=y 338 354 # CONFIG_BLK_CPQ_DA is not set 339 355 # CONFIG_BLK_CPQ_CISS_DA is not set 340 356 # CONFIG_BLK_DEV_DAC960 is not set ··· 348 370 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 349 371 # CONFIG_CDROM_PKTCDVD is not set 350 372 # CONFIG_ATA_OVER_ETH is not set 351 - 352 - # 353 - # Misc devices 354 - # 373 + CONFIG_MISC_DEVICES=y 374 + # CONFIG_PHANTOM is not set 375 + # CONFIG_EEPROM_93CX6 is not set 355 376 # CONFIG_SGI_IOC4 is not set 356 377 # CONFIG_TIFM_CORE is not set 357 - 358 - # 359 - # ATA/ATAPI/MFM/RLL support 360 - # 361 378 CONFIG_IDE=y 362 379 CONFIG_IDE_MAX_HWIFS=4 363 380 CONFIG_BLK_DEV_IDE=y ··· 369 396 CONFIG_BLK_DEV_IDESCSI=m 370 397 # CONFIG_BLK_DEV_IDEACPI is not set 371 398 # CONFIG_IDE_TASK_IOCTL is not set 399 + CONFIG_IDE_PROC_FS=y 372 400 373 401 # 374 402 # IDE chipset support/bugfixes ··· 378 404 # CONFIG_BLK_DEV_IDEPNP is not set 379 405 CONFIG_BLK_DEV_IDEPCI=y 380 406 # CONFIG_IDEPCI_SHARE_IRQ is not set 407 + CONFIG_IDEPCI_PCIBUS_ORDER=y 381 408 # CONFIG_BLK_DEV_OFFBOARD is not set 382 409 CONFIG_BLK_DEV_GENERIC=y 383 410 # CONFIG_BLK_DEV_OPTI621 is not set 384 411 CONFIG_BLK_DEV_IDEDMA_PCI=y 385 412 # CONFIG_BLK_DEV_IDEDMA_FORCED is not set 386 - CONFIG_IDEDMA_PCI_AUTO=y 387 413 # CONFIG_IDEDMA_ONLYDISK is not set 388 414 # CONFIG_BLK_DEV_AEC62XX is not set 389 415 # CONFIG_BLK_DEV_ALI15X3 is not set ··· 412 438 # CONFIG_IDE_ARM is not set 413 439 CONFIG_BLK_DEV_IDEDMA=y 414 440 # CONFIG_IDEDMA_IVB is not set 415 - CONFIG_IDEDMA_AUTO=y 416 441 # CONFIG_BLK_DEV_HD is not set 417 442 418 443 # ··· 419 446 # 420 447 # CONFIG_RAID_ATTRS is not set 421 448 CONFIG_SCSI=y 449 + CONFIG_SCSI_DMA=y 422 450 # CONFIG_SCSI_TGT is not set 423 451 CONFIG_SCSI_NETLINK=y 424 452 CONFIG_SCSI_PROC_FS=y ··· 442 468 # CONFIG_SCSI_CONSTANTS is not set 443 469 # CONFIG_SCSI_LOGGING is not set 444 470 # CONFIG_SCSI_SCAN_ASYNC is not set 471 + CONFIG_SCSI_WAIT_SCAN=m 445 472 446 473 # 447 474 # SCSI Transports ··· 489 514 # CONFIG_SCSI_DC390T is not set 490 515 # CONFIG_SCSI_DEBUG is not set 491 516 # CONFIG_SCSI_SRP is not set 492 - 493 - # 494 - # Serial ATA (prod) and Parallel ATA (experimental) drivers 495 - # 496 517 # CONFIG_ATA is not set 497 - 498 - # 499 - # Multi-device support (RAID and LVM) 500 - # 501 518 CONFIG_MD=y 502 519 CONFIG_BLK_DEV_MD=m 503 520 CONFIG_MD_LINEAR=m ··· 506 539 CONFIG_DM_MIRROR=m 507 540 CONFIG_DM_ZERO=m 508 541 # CONFIG_DM_MULTIPATH is not set 542 + # CONFIG_DM_DELAY is not set 509 543 510 544 # 511 545 # Fusion MPT device support ··· 521 553 # 522 554 # IEEE 1394 (FireWire) support 523 555 # 556 + # CONFIG_FIREWIRE is not set 524 557 # CONFIG_IEEE1394 is not set 525 - 526 - # 527 - # I2O device support 528 - # 529 558 # CONFIG_I2O is not set 530 - 531 - # 532 - # Network device support 533 - # 534 559 CONFIG_NETDEVICES=y 560 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 535 561 CONFIG_DUMMY=m 536 562 # CONFIG_BONDING is not set 563 + # CONFIG_MACVLAN is not set 537 564 # CONFIG_EQUALIZER is not set 538 565 # CONFIG_TUN is not set 539 566 # CONFIG_NET_SB1000 is not set 540 - 541 - # 542 - # ARCnet devices 543 - # 544 567 # CONFIG_ARCNET is not set 545 - 546 - # 547 - # PHY device support 548 - # 549 568 # CONFIG_PHYLIB is not set 550 - 551 - # 552 - # Ethernet (10 or 100Mbit) 553 - # 554 569 CONFIG_NET_ETHERNET=y 555 570 CONFIG_MII=m 556 571 # CONFIG_HAPPYMEAL is not set 557 572 # CONFIG_SUNGEM is not set 558 573 # CONFIG_CASSINI is not set 559 574 # CONFIG_NET_VENDOR_3COM is not set 560 - 561 - # 562 - # Tulip family network device support 563 - # 564 575 CONFIG_NET_TULIP=y 565 576 # CONFIG_DE2104X is not set 566 577 CONFIG_TULIP=m ··· 570 623 # CONFIG_SUNDANCE is not set 571 624 # CONFIG_VIA_RHINE is not set 572 625 # CONFIG_SC92031 is not set 573 - 574 - # 575 - # Ethernet (1000 Mbit) 576 - # 626 + CONFIG_NETDEV_1000=y 577 627 # CONFIG_ACENIC is not set 578 628 # CONFIG_DL2K is not set 579 629 CONFIG_E1000=y ··· 583 639 # CONFIG_SIS190 is not set 584 640 # CONFIG_SKGE is not set 585 641 # CONFIG_SKY2 is not set 586 - # CONFIG_SK98LIN is not set 587 642 # CONFIG_VIA_VELOCITY is not set 588 643 CONFIG_TIGON3=y 589 644 # CONFIG_BNX2 is not set 590 645 # CONFIG_QLA3XXX is not set 591 646 # CONFIG_ATL1 is not set 592 - 593 - # 594 - # Ethernet (10000 Mbit) 595 - # 647 + CONFIG_NETDEV_10000=y 596 648 # CONFIG_CHELSIO_T1 is not set 597 649 # CONFIG_CHELSIO_T3 is not set 598 650 # CONFIG_IXGB is not set 599 651 # CONFIG_S2IO is not set 600 652 # CONFIG_MYRI10GE is not set 601 653 # CONFIG_NETXEN_NIC is not set 602 - 603 - # 604 - # Token Ring devices 605 - # 654 + # CONFIG_MLX4_CORE is not set 606 655 # CONFIG_TR is not set 607 656 608 657 # 609 - # Wireless LAN (non-hamradio) 658 + # Wireless LAN 610 659 # 611 - # CONFIG_NET_RADIO is not set 660 + # CONFIG_WLAN_PRE80211 is not set 661 + # CONFIG_WLAN_80211 is not set 612 662 613 663 # 614 - # Wan interfaces 664 + # USB Network Adapters 615 665 # 666 + # CONFIG_USB_CATC is not set 667 + # CONFIG_USB_KAWETH is not set 668 + # CONFIG_USB_PEGASUS is not set 669 + # CONFIG_USB_RTL8150 is not set 670 + # CONFIG_USB_USBNET_MII is not set 671 + # CONFIG_USB_USBNET is not set 616 672 # CONFIG_WAN is not set 617 673 # CONFIG_FDDI is not set 618 674 # CONFIG_HIPPI is not set ··· 622 678 # CONFIG_SHAPER is not set 623 679 CONFIG_NETCONSOLE=y 624 680 CONFIG_NETPOLL=y 625 - # CONFIG_NETPOLL_RX is not set 626 681 # CONFIG_NETPOLL_TRAP is not set 627 682 CONFIG_NET_POLL_CONTROLLER=y 628 - 629 - # 630 - # ISDN subsystem 631 - # 632 683 # CONFIG_ISDN is not set 633 - 634 - # 635 - # Telephony Support 636 - # 637 684 # CONFIG_PHONE is not set 638 685 639 686 # ··· 632 697 # 633 698 CONFIG_INPUT=y 634 699 # CONFIG_INPUT_FF_MEMLESS is not set 700 + # CONFIG_INPUT_POLLDEV is not set 635 701 636 702 # 637 703 # Userland interfaces ··· 658 722 # CONFIG_KEYBOARD_STOWAWAY is not set 659 723 CONFIG_INPUT_MOUSE=y 660 724 CONFIG_MOUSE_PS2=y 725 + CONFIG_MOUSE_PS2_ALPS=y 726 + CONFIG_MOUSE_PS2_LOGIPS2PP=y 727 + CONFIG_MOUSE_PS2_SYNAPTICS=y 728 + CONFIG_MOUSE_PS2_LIFEBOOK=y 729 + CONFIG_MOUSE_PS2_TRACKPOINT=y 730 + # CONFIG_MOUSE_PS2_TOUCHKIT is not set 661 731 # CONFIG_MOUSE_SERIAL is not set 732 + # CONFIG_MOUSE_APPLETOUCH is not set 662 733 # CONFIG_MOUSE_VSXXXAA is not set 663 734 # CONFIG_INPUT_JOYSTICK is not set 735 + # CONFIG_INPUT_TABLET is not set 664 736 # CONFIG_INPUT_TOUCHSCREEN is not set 665 737 # CONFIG_INPUT_MISC is not set 666 738 ··· 734 790 CONFIG_UNIX98_PTYS=y 735 791 CONFIG_LEGACY_PTYS=y 736 792 CONFIG_LEGACY_PTY_COUNT=256 737 - 738 - # 739 - # IPMI 740 - # 741 793 # CONFIG_IPMI_HANDLER is not set 742 - 743 - # 744 - # Watchdog Cards 745 - # 746 794 # CONFIG_WATCHDOG is not set 747 795 # CONFIG_HW_RANDOM is not set 748 796 CONFIG_EFI_RTC=y 749 - # CONFIG_DTLK is not set 750 797 # CONFIG_R3964 is not set 751 798 # CONFIG_APPLICOM is not set 752 799 CONFIG_AGP=m ··· 756 821 # CONFIG_HPET_RTC_IRQ is not set 757 822 CONFIG_HPET_MMAP=y 758 823 # CONFIG_HANGCHECK_TIMER is not set 759 - 760 - # 761 - # TPM devices 762 - # 763 824 # CONFIG_TCG_TPM is not set 764 - 765 - # 766 - # I2C support 767 - # 825 + CONFIG_DEVPORT=y 768 826 # CONFIG_I2C is not set 769 827 770 828 # ··· 765 837 # 766 838 # CONFIG_SPI is not set 767 839 # CONFIG_SPI_MASTER is not set 768 - 769 - # 770 - # Dallas's 1-wire bus 771 - # 772 840 # CONFIG_W1 is not set 773 - 774 - # 775 - # Hardware Monitoring support 776 - # 841 + # CONFIG_POWER_SUPPLY is not set 777 842 CONFIG_HWMON=y 778 843 # CONFIG_HWMON_VID is not set 779 844 # CONFIG_SENSORS_ABITUGURU is not set 780 845 # CONFIG_SENSORS_F71805F is not set 781 846 # CONFIG_SENSORS_PC87427 is not set 847 + # CONFIG_SENSORS_SMSC47M1 is not set 848 + # CONFIG_SENSORS_SMSC47B397 is not set 782 849 # CONFIG_SENSORS_VT1211 is not set 850 + # CONFIG_SENSORS_W83627HF is not set 783 851 # CONFIG_HWMON_DEBUG_CHIP is not set 784 852 785 853 # ··· 787 863 # Multimedia devices 788 864 # 789 865 # CONFIG_VIDEO_DEV is not set 790 - 791 - # 792 - # Digital Video Broadcasting Devices 793 - # 794 - # CONFIG_DVB is not set 866 + # CONFIG_DVB_CORE is not set 867 + CONFIG_DAB=y 795 868 # CONFIG_USB_DABUSB is not set 796 869 797 870 # 798 871 # Graphics support 799 872 # 800 873 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 874 + 875 + # 876 + # Display device support 877 + # 878 + # CONFIG_DISPLAY_SUPPORT is not set 879 + # CONFIG_VGASTATE is not set 801 880 # CONFIG_FB is not set 802 881 803 882 # ··· 814 887 # Sound 815 888 # 816 889 # CONFIG_SOUND is not set 817 - 818 - # 819 - # HID Devices 820 - # 890 + CONFIG_HID_SUPPORT=y 821 891 CONFIG_HID=y 822 892 # CONFIG_HID_DEBUG is not set 823 893 824 894 # 825 - # USB support 895 + # USB Input Devices 826 896 # 897 + CONFIG_USB_HID=y 898 + # CONFIG_USB_HIDINPUT_POWERBOOK is not set 899 + # CONFIG_HID_FF is not set 900 + # CONFIG_USB_HIDDEV is not set 901 + CONFIG_USB_SUPPORT=y 827 902 CONFIG_USB_ARCH_HAS_HCD=y 828 903 CONFIG_USB_ARCH_HAS_OHCI=y 829 904 CONFIG_USB_ARCH_HAS_EHCI=y ··· 836 907 # Miscellaneous USB options 837 908 # 838 909 CONFIG_USB_DEVICEFS=y 910 + CONFIG_USB_DEVICE_CLASS=y 839 911 # CONFIG_USB_DYNAMIC_MINORS is not set 840 912 # CONFIG_USB_SUSPEND is not set 913 + # CONFIG_USB_PERSIST is not set 841 914 # CONFIG_USB_OTG is not set 842 915 843 916 # ··· 849 918 # CONFIG_USB_EHCI_SPLIT_ISO is not set 850 919 # CONFIG_USB_EHCI_ROOT_HUB_TT is not set 851 920 # CONFIG_USB_EHCI_TT_NEWSCHED is not set 852 - # CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set 853 921 # CONFIG_USB_ISP116X_HCD is not set 854 922 CONFIG_USB_OHCI_HCD=m 855 923 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set ··· 856 926 CONFIG_USB_OHCI_LITTLE_ENDIAN=y 857 927 CONFIG_USB_UHCI_HCD=y 858 928 # CONFIG_USB_SL811_HCD is not set 929 + # CONFIG_USB_R8A66597_HCD is not set 859 930 860 931 # 861 932 # USB Device Class drivers ··· 886 955 # CONFIG_USB_LIBUSUAL is not set 887 956 888 957 # 889 - # USB Input Devices 890 - # 891 - CONFIG_USB_HID=y 892 - # CONFIG_USB_HIDINPUT_POWERBOOK is not set 893 - # CONFIG_HID_FF is not set 894 - # CONFIG_USB_HIDDEV is not set 895 - # CONFIG_USB_AIPTEK is not set 896 - # CONFIG_USB_WACOM is not set 897 - # CONFIG_USB_ACECAD is not set 898 - # CONFIG_USB_KBTAB is not set 899 - # CONFIG_USB_POWERMATE is not set 900 - # CONFIG_USB_TOUCHSCREEN is not set 901 - # CONFIG_USB_YEALINK is not set 902 - # CONFIG_USB_XPAD is not set 903 - # CONFIG_USB_ATI_REMOTE is not set 904 - # CONFIG_USB_ATI_REMOTE2 is not set 905 - # CONFIG_USB_KEYSPAN_REMOTE is not set 906 - # CONFIG_USB_APPLETOUCH is not set 907 - # CONFIG_USB_GTCO is not set 908 - 909 - # 910 958 # USB Imaging devices 911 959 # 912 960 # CONFIG_USB_MDC800 is not set 913 961 # CONFIG_USB_MICROTEK is not set 914 - 915 - # 916 - # USB Network Adapters 917 - # 918 - # CONFIG_USB_CATC is not set 919 - # CONFIG_USB_KAWETH is not set 920 - # CONFIG_USB_PEGASUS is not set 921 - # CONFIG_USB_RTL8150 is not set 922 - # CONFIG_USB_USBNET_MII is not set 923 - # CONFIG_USB_USBNET is not set 924 962 # CONFIG_USB_MON is not set 925 963 926 964 # ··· 933 1033 # USB Gadget Support 934 1034 # 935 1035 # CONFIG_USB_GADGET is not set 936 - 937 - # 938 - # MMC/SD Card support 939 - # 940 1036 # CONFIG_MMC is not set 941 1037 942 1038 # ··· 947 1051 # 948 1052 # LED Triggers 949 1053 # 950 - 951 - # 952 - # InfiniBand support 953 - # 954 1054 # CONFIG_INFINIBAND is not set 955 - 956 - # 957 - # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 958 - # 959 1055 960 1056 # 961 1057 # Real Time Clock ··· 968 1080 # 969 1081 970 1082 # 971 - # Auxiliary Display support 1083 + # Userspace I/O 972 1084 # 973 - 974 - # 975 - # Virtualization 976 - # 1085 + # CONFIG_UIO is not set 977 1086 # CONFIG_MSPEC is not set 978 1087 979 1088 # ··· 1085 1200 CONFIG_NFS_COMMON=y 1086 1201 CONFIG_SUNRPC=m 1087 1202 CONFIG_SUNRPC_GSS=m 1088 - CONFIG_RPCSEC_GSS_KRB5=m 1203 + # CONFIG_SUNRPC_BIND34 is not set 1204 + CONFIG_RPCSEC_GSS_KRB5=y 1089 1205 # CONFIG_RPCSEC_GSS_SPKM3 is not set 1090 1206 CONFIG_SMB_FS=m 1091 1207 CONFIG_SMB_NLS_DEFAULT=y ··· 1100 1214 # CONFIG_NCP_FS is not set 1101 1215 # CONFIG_CODA_FS is not set 1102 1216 # CONFIG_AFS_FS is not set 1103 - # CONFIG_9P_FS is not set 1104 1217 1105 1218 # 1106 1219 # Partition Types ··· 1121 1236 # CONFIG_SUN_PARTITION is not set 1122 1237 # CONFIG_KARMA_PARTITION is not set 1123 1238 CONFIG_EFI_PARTITION=y 1239 + # CONFIG_SYSV68_PARTITION is not set 1124 1240 1125 1241 # 1126 1242 # Native Language Support ··· 1178 1292 CONFIG_BITREVERSE=y 1179 1293 # CONFIG_CRC_CCITT is not set 1180 1294 # CONFIG_CRC16 is not set 1295 + # CONFIG_CRC_ITU_T is not set 1181 1296 CONFIG_CRC32=y 1297 + # CONFIG_CRC7 is not set 1182 1298 # CONFIG_LIBCRC32C is not set 1183 1299 CONFIG_PLIST=y 1184 1300 CONFIG_HAS_IOMEM=y 1185 1301 CONFIG_HAS_IOPORT=y 1302 + CONFIG_HAS_DMA=y 1186 1303 CONFIG_GENERIC_HARDIRQS=y 1187 1304 CONFIG_GENERIC_IRQ_PROBE=y 1188 1305 CONFIG_GENERIC_PENDING_IRQ=y ··· 1208 1319 # CONFIG_HEADERS_CHECK is not set 1209 1320 CONFIG_DEBUG_KERNEL=y 1210 1321 # CONFIG_DEBUG_SHIRQ is not set 1211 - CONFIG_LOG_BUF_SHIFT=20 1212 1322 CONFIG_DETECT_SOFTLOCKUP=y 1323 + CONFIG_SCHED_DEBUG=y 1213 1324 # CONFIG_SCHEDSTATS is not set 1214 1325 # CONFIG_TIMER_STATS is not set 1215 1326 # CONFIG_DEBUG_SLAB is not set ··· 1232 1343 # CONFIG_DISABLE_VHPT is not set 1233 1344 # CONFIG_IA64_DEBUG_CMPXCHG is not set 1234 1345 # CONFIG_IA64_DEBUG_IRQ is not set 1235 - CONFIG_SYSVIPC_COMPAT=y 1236 1346 1237 1347 # 1238 1348 # Security options 1239 1349 # 1240 1350 # CONFIG_KEYS is not set 1241 1351 # CONFIG_SECURITY is not set 1242 - 1243 - # 1244 - # Cryptographic options 1245 - # 1246 1352 CONFIG_CRYPTO=y 1247 1353 CONFIG_CRYPTO_ALGAPI=y 1248 1354 CONFIG_CRYPTO_BLKCIPHER=m ··· 1257 1373 CONFIG_CRYPTO_CBC=m 1258 1374 CONFIG_CRYPTO_PCBC=m 1259 1375 # CONFIG_CRYPTO_LRW is not set 1376 + # CONFIG_CRYPTO_CRYPTD is not set 1260 1377 CONFIG_CRYPTO_DES=m 1261 1378 # CONFIG_CRYPTO_FCRYPT is not set 1262 1379 # CONFIG_CRYPTO_BLOWFISH is not set ··· 1275 1390 # CONFIG_CRYPTO_CRC32C is not set 1276 1391 # CONFIG_CRYPTO_CAMELLIA is not set 1277 1392 # CONFIG_CRYPTO_TEST is not set 1278 - 1279 - # 1280 - # Hardware crypto devices 1281 - # 1393 + CONFIG_CRYPTO_HW=y
+1 -1
arch/ia64/configs/zx1_defconfig
··· 96 96 # CONFIG_ARCH_HAS_ILOG2_U64 is not set 97 97 CONFIG_GENERIC_FIND_NEXT_BIT=y 98 98 CONFIG_GENERIC_CALIBRATE_DELAY=y 99 - CONFIG_TIME_INTERPOLATION=y 99 + CONFIG_GENERIC_TIME=y 100 100 CONFIG_DMI=y 101 101 CONFIG_EFI=y 102 102 CONFIG_GENERIC_IOMAP=y
+113 -227
arch/ia64/defconfig
··· 1 1 # 2 2 # Automatically generated make config: don't edit 3 - # Linux kernel version: 2.6.21-rc3 4 - # Thu Mar 8 11:01:03 2007 3 + # Linux kernel version: 2.6.22 4 + # Thu Jul 19 13:55:32 2007 5 5 # 6 6 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 7 7 ··· 19 19 CONFIG_LOCALVERSION_AUTO=y 20 20 CONFIG_SWAP=y 21 21 CONFIG_SYSVIPC=y 22 - # CONFIG_IPC_NS is not set 23 22 CONFIG_SYSVIPC_SYSCTL=y 24 23 CONFIG_POSIX_MQUEUE=y 25 24 # CONFIG_BSD_PROCESS_ACCT is not set 26 25 # CONFIG_TASKSTATS is not set 27 - # CONFIG_UTS_NS is not set 26 + # CONFIG_USER_NS is not set 28 27 # CONFIG_AUDIT is not set 29 28 CONFIG_IKCONFIG=y 30 29 CONFIG_IKCONFIG_PROC=y 30 + CONFIG_LOG_BUF_SHIFT=20 31 31 # CONFIG_CPUSETS is not set 32 32 CONFIG_SYSFS_DEPRECATED=y 33 33 # CONFIG_RELAY is not set ··· 46 46 CONFIG_ELF_CORE=y 47 47 CONFIG_BASE_FULL=y 48 48 CONFIG_FUTEX=y 49 + CONFIG_ANON_INODES=y 49 50 CONFIG_EPOLL=y 51 + CONFIG_SIGNALFD=y 52 + CONFIG_TIMERFD=y 53 + CONFIG_EVENTFD=y 50 54 CONFIG_SHMEM=y 51 - CONFIG_SLAB=y 52 55 CONFIG_VM_EVENT_COUNTERS=y 56 + CONFIG_SLAB=y 57 + # CONFIG_SLUB is not set 58 + # CONFIG_SLOB is not set 53 59 CONFIG_RT_MUTEXES=y 54 60 # CONFIG_TINY_SHMEM is not set 55 61 CONFIG_BASE_SMALL=0 56 - # CONFIG_SLOB is not set 57 - 58 - # 59 - # Loadable module support 60 - # 61 62 CONFIG_MODULES=y 62 63 CONFIG_MODULE_UNLOAD=y 63 64 # CONFIG_MODULE_FORCE_UNLOAD is not set ··· 66 65 # CONFIG_MODULE_SRCVERSION_ALL is not set 67 66 CONFIG_KMOD=y 68 67 CONFIG_STOP_MACHINE=y 69 - 70 - # 71 - # Block layer 72 - # 73 68 CONFIG_BLOCK=y 74 69 # CONFIG_BLK_DEV_IO_TRACE is not set 70 + # CONFIG_BLK_DEV_BSG is not set 75 71 76 72 # 77 73 # IO Schedulers ··· 89 91 CONFIG_IA64=y 90 92 CONFIG_64BIT=y 91 93 CONFIG_ZONE_DMA=y 94 + CONFIG_QUICKLIST=y 92 95 CONFIG_MMU=y 93 96 CONFIG_SWIOTLB=y 94 97 CONFIG_RWSEM_XCHGADD_ALGORITHM=y ··· 97 98 # CONFIG_ARCH_HAS_ILOG2_U64 is not set 98 99 CONFIG_GENERIC_FIND_NEXT_BIT=y 99 100 CONFIG_GENERIC_CALIBRATE_DELAY=y 100 - CONFIG_TIME_INTERPOLATION=y 101 + CONFIG_GENERIC_TIME=y 101 102 CONFIG_DMI=y 102 103 CONFIG_EFI=y 103 104 CONFIG_GENERIC_IOMAP=y ··· 113 114 CONFIG_MCKINLEY=y 114 115 # CONFIG_IA64_PAGE_SIZE_4KB is not set 115 116 # CONFIG_IA64_PAGE_SIZE_8KB is not set 116 - CONFIG_IA64_PAGE_SIZE_16KB=y 117 - # CONFIG_IA64_PAGE_SIZE_64KB is not set 117 + # CONFIG_IA64_PAGE_SIZE_16KB is not set 118 + CONFIG_IA64_PAGE_SIZE_64KB=y 118 119 CONFIG_PGTABLE_3=y 119 120 # CONFIG_PGTABLE_4 is not set 120 121 # CONFIG_HZ_100 is not set ··· 146 147 CONFIG_MIGRATION=y 147 148 CONFIG_RESOURCES_64BIT=y 148 149 CONFIG_ZONE_DMA_FLAG=1 150 + CONFIG_BOUNCE=y 151 + CONFIG_NR_QUICK=1 152 + CONFIG_VIRT_TO_BUS=y 149 153 CONFIG_ARCH_SELECT_MEMORY_MODEL=y 150 154 CONFIG_ARCH_DISCONTIGMEM_ENABLE=y 151 155 CONFIG_ARCH_FLATMEM_ENABLE=y ··· 166 164 CONFIG_IA64_MCA_RECOVERY=y 167 165 CONFIG_PERFMON=y 168 166 CONFIG_IA64_PALINFO=y 169 - # CONFIG_MC_ERR_INJECT is not set 167 + # CONFIG_IA64_MC_ERR_INJECT is not set 170 168 CONFIG_SGI_SN=y 171 169 # CONFIG_IA64_ESI is not set 172 170 ··· 182 180 # 183 181 CONFIG_EFI_VARS=y 184 182 CONFIG_EFI_PCDP=y 183 + CONFIG_DMIID=y 185 184 CONFIG_BINFMT_ELF=y 186 185 CONFIG_BINFMT_MISC=m 187 186 ··· 192 189 CONFIG_PM=y 193 190 CONFIG_PM_LEGACY=y 194 191 # CONFIG_PM_DEBUG is not set 195 - # CONFIG_PM_SYSFS_DEPRECATED is not set 196 192 197 193 # 198 194 # ACPI (Advanced Configuration and Power Interface) Support ··· 222 220 # 223 221 CONFIG_PCI=y 224 222 CONFIG_PCI_DOMAINS=y 223 + CONFIG_PCI_SYSCALL=y 225 224 # CONFIG_PCIEPORTBUS is not set 225 + CONFIG_ARCH_SUPPORTS_MSI=y 226 226 # CONFIG_PCI_MSI is not set 227 227 # CONFIG_PCI_DEBUG is not set 228 - 229 - # 230 - # PCI Hotplug Support 231 - # 232 228 CONFIG_HOTPLUG_PCI=m 233 229 # CONFIG_HOTPLUG_PCI_FAKE is not set 234 230 CONFIG_HOTPLUG_PCI_ACPI=m ··· 248 248 # 249 249 # Networking options 250 250 # 251 - # CONFIG_NETDEBUG is not set 252 251 CONFIG_PACKET=y 253 252 # CONFIG_PACKET_MMAP is not set 254 253 CONFIG_UNIX=y ··· 285 286 # CONFIG_INET6_TUNNEL is not set 286 287 # CONFIG_NETWORK_SECMARK is not set 287 288 # CONFIG_NETFILTER is not set 288 - 289 - # 290 - # DCCP Configuration (EXPERIMENTAL) 291 - # 292 289 # CONFIG_IP_DCCP is not set 293 - 294 - # 295 - # SCTP Configuration (EXPERIMENTAL) 296 - # 297 290 # CONFIG_IP_SCTP is not set 298 - 299 - # 300 - # TIPC Configuration (EXPERIMENTAL) 301 - # 302 291 # CONFIG_TIPC is not set 303 292 # CONFIG_ATM is not set 304 293 # CONFIG_BRIDGE is not set ··· 312 325 # CONFIG_HAMRADIO is not set 313 326 # CONFIG_IRDA is not set 314 327 # CONFIG_BT is not set 328 + # CONFIG_AF_RXRPC is not set 329 + 330 + # 331 + # Wireless 332 + # 333 + # CONFIG_CFG80211 is not set 334 + # CONFIG_WIRELESS_EXT is not set 335 + # CONFIG_MAC80211 is not set 315 336 # CONFIG_IEEE80211 is not set 337 + # CONFIG_RFKILL is not set 338 + # CONFIG_NET_9P is not set 316 339 317 340 # 318 341 # Device Drivers ··· 337 340 # CONFIG_DEBUG_DRIVER is not set 338 341 # CONFIG_DEBUG_DEVRES is not set 339 342 # CONFIG_SYS_HYPERVISOR is not set 340 - 341 - # 342 - # Connector - unified userspace <-> kernelspace linker 343 - # 344 343 # CONFIG_CONNECTOR is not set 345 - 346 - # 347 - # Memory Technology Devices (MTD) 348 - # 349 344 # CONFIG_MTD is not set 350 - 351 - # 352 - # Parallel port support 353 - # 354 345 # CONFIG_PARPORT is not set 355 - 356 - # 357 - # Plug and Play support 358 - # 359 346 CONFIG_PNP=y 360 347 # CONFIG_PNP_DEBUG is not set 361 348 ··· 347 366 # Protocols 348 367 # 349 368 CONFIG_PNPACPI=y 350 - 351 - # 352 - # Block devices 353 - # 369 + CONFIG_BLK_DEV=y 354 370 # CONFIG_BLK_CPQ_DA is not set 355 371 # CONFIG_BLK_CPQ_CISS_DA is not set 356 372 # CONFIG_BLK_DEV_DAC960 is not set ··· 364 386 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 365 387 # CONFIG_CDROM_PKTCDVD is not set 366 388 # CONFIG_ATA_OVER_ETH is not set 367 - 368 - # 369 - # Misc devices 370 - # 389 + CONFIG_MISC_DEVICES=y 390 + # CONFIG_PHANTOM is not set 391 + # CONFIG_EEPROM_93CX6 is not set 371 392 CONFIG_SGI_IOC4=y 372 393 # CONFIG_TIFM_CORE is not set 373 - 374 - # 375 - # ATA/ATAPI/MFM/RLL support 376 - # 377 394 CONFIG_IDE=y 378 395 CONFIG_IDE_MAX_HWIFS=4 379 396 CONFIG_BLK_DEV_IDE=y ··· 385 412 CONFIG_BLK_DEV_IDESCSI=m 386 413 # CONFIG_BLK_DEV_IDEACPI is not set 387 414 # CONFIG_IDE_TASK_IOCTL is not set 415 + CONFIG_IDE_PROC_FS=y 388 416 389 417 # 390 418 # IDE chipset support/bugfixes ··· 394 420 # CONFIG_BLK_DEV_IDEPNP is not set 395 421 CONFIG_BLK_DEV_IDEPCI=y 396 422 CONFIG_IDEPCI_SHARE_IRQ=y 423 + CONFIG_IDEPCI_PCIBUS_ORDER=y 397 424 # CONFIG_BLK_DEV_OFFBOARD is not set 398 425 CONFIG_BLK_DEV_GENERIC=y 399 426 # CONFIG_BLK_DEV_OPTI621 is not set 400 427 CONFIG_BLK_DEV_IDEDMA_PCI=y 401 428 # CONFIG_BLK_DEV_IDEDMA_FORCED is not set 402 - CONFIG_IDEDMA_PCI_AUTO=y 403 429 # CONFIG_IDEDMA_ONLYDISK is not set 404 430 # CONFIG_BLK_DEV_AEC62XX is not set 405 431 # CONFIG_BLK_DEV_ALI15X3 is not set ··· 429 455 # CONFIG_IDE_ARM is not set 430 456 CONFIG_BLK_DEV_IDEDMA=y 431 457 # CONFIG_IDEDMA_IVB is not set 432 - CONFIG_IDEDMA_AUTO=y 433 458 # CONFIG_BLK_DEV_HD is not set 434 459 435 460 # ··· 436 463 # 437 464 # CONFIG_RAID_ATTRS is not set 438 465 CONFIG_SCSI=y 466 + CONFIG_SCSI_DMA=y 439 467 # CONFIG_SCSI_TGT is not set 440 468 CONFIG_SCSI_NETLINK=y 441 469 CONFIG_SCSI_PROC_FS=y ··· 459 485 # CONFIG_SCSI_CONSTANTS is not set 460 486 # CONFIG_SCSI_LOGGING is not set 461 487 # CONFIG_SCSI_SCAN_ASYNC is not set 488 + CONFIG_SCSI_WAIT_SCAN=m 462 489 463 490 # 464 491 # SCSI Transports ··· 467 492 CONFIG_SCSI_SPI_ATTRS=y 468 493 CONFIG_SCSI_FC_ATTRS=y 469 494 # CONFIG_SCSI_ISCSI_ATTRS is not set 470 - # CONFIG_SCSI_SAS_ATTRS is not set 495 + CONFIG_SCSI_SAS_ATTRS=y 471 496 # CONFIG_SCSI_SAS_LIBSAS is not set 472 497 473 498 # ··· 506 531 # CONFIG_SCSI_DC390T is not set 507 532 # CONFIG_SCSI_DEBUG is not set 508 533 # CONFIG_SCSI_SRP is not set 509 - 510 - # 511 - # Serial ATA (prod) and Parallel ATA (experimental) drivers 512 - # 513 534 # CONFIG_ATA is not set 514 - 515 - # 516 - # Multi-device support (RAID and LVM) 517 - # 518 535 CONFIG_MD=y 519 536 CONFIG_BLK_DEV_MD=m 520 537 CONFIG_MD_LINEAR=m ··· 524 557 CONFIG_DM_ZERO=m 525 558 CONFIG_DM_MULTIPATH=m 526 559 # CONFIG_DM_MULTIPATH_EMC is not set 560 + # CONFIG_DM_MULTIPATH_RDAC is not set 561 + # CONFIG_DM_DELAY is not set 527 562 528 563 # 529 564 # Fusion MPT device support ··· 533 564 CONFIG_FUSION=y 534 565 CONFIG_FUSION_SPI=y 535 566 CONFIG_FUSION_FC=m 536 - # CONFIG_FUSION_SAS is not set 567 + CONFIG_FUSION_SAS=y 537 568 CONFIG_FUSION_MAX_SGE=128 538 569 # CONFIG_FUSION_CTL is not set 539 570 540 571 # 541 572 # IEEE 1394 (FireWire) support 542 573 # 574 + # CONFIG_FIREWIRE is not set 543 575 # CONFIG_IEEE1394 is not set 544 - 545 - # 546 - # I2O device support 547 - # 548 576 # CONFIG_I2O is not set 549 - 550 - # 551 - # Network device support 552 - # 553 577 CONFIG_NETDEVICES=y 578 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 554 579 CONFIG_DUMMY=m 555 580 # CONFIG_BONDING is not set 581 + # CONFIG_MACVLAN is not set 556 582 # CONFIG_EQUALIZER is not set 557 583 # CONFIG_TUN is not set 558 584 # CONFIG_NET_SB1000 is not set 559 - 560 - # 561 - # ARCnet devices 562 - # 563 585 # CONFIG_ARCNET is not set 564 - 565 - # 566 - # PHY device support 567 - # 568 586 # CONFIG_PHYLIB is not set 569 - 570 - # 571 - # Ethernet (10 or 100Mbit) 572 - # 573 587 CONFIG_NET_ETHERNET=y 574 588 CONFIG_MII=m 575 589 # CONFIG_HAPPYMEAL is not set 576 590 # CONFIG_SUNGEM is not set 577 591 # CONFIG_CASSINI is not set 578 592 # CONFIG_NET_VENDOR_3COM is not set 579 - 580 - # 581 - # Tulip family network device support 582 - # 583 593 CONFIG_NET_TULIP=y 584 594 # CONFIG_DE2104X is not set 585 595 CONFIG_TULIP=m ··· 589 641 # CONFIG_SUNDANCE is not set 590 642 # CONFIG_VIA_RHINE is not set 591 643 # CONFIG_SC92031 is not set 592 - 593 - # 594 - # Ethernet (1000 Mbit) 595 - # 644 + CONFIG_NETDEV_1000=y 596 645 # CONFIG_ACENIC is not set 597 646 # CONFIG_DL2K is not set 598 647 CONFIG_E1000=y ··· 602 657 # CONFIG_SIS190 is not set 603 658 # CONFIG_SKGE is not set 604 659 # CONFIG_SKY2 is not set 605 - # CONFIG_SK98LIN is not set 606 660 # CONFIG_VIA_VELOCITY is not set 607 661 CONFIG_TIGON3=y 608 662 # CONFIG_BNX2 is not set 609 663 # CONFIG_QLA3XXX is not set 610 664 # CONFIG_ATL1 is not set 611 - 612 - # 613 - # Ethernet (10000 Mbit) 614 - # 665 + CONFIG_NETDEV_10000=y 615 666 # CONFIG_CHELSIO_T1 is not set 616 667 # CONFIG_CHELSIO_T3 is not set 617 668 # CONFIG_IXGB is not set 618 669 # CONFIG_S2IO is not set 619 670 # CONFIG_MYRI10GE is not set 620 671 # CONFIG_NETXEN_NIC is not set 621 - 622 - # 623 - # Token Ring devices 624 - # 672 + # CONFIG_MLX4_CORE is not set 625 673 # CONFIG_TR is not set 626 674 627 675 # 628 - # Wireless LAN (non-hamradio) 676 + # Wireless LAN 629 677 # 630 - # CONFIG_NET_RADIO is not set 678 + # CONFIG_WLAN_PRE80211 is not set 679 + # CONFIG_WLAN_80211 is not set 631 680 632 681 # 633 - # Wan interfaces 682 + # USB Network Adapters 634 683 # 684 + # CONFIG_USB_CATC is not set 685 + # CONFIG_USB_KAWETH is not set 686 + # CONFIG_USB_PEGASUS is not set 687 + # CONFIG_USB_RTL8150 is not set 688 + # CONFIG_USB_USBNET_MII is not set 689 + # CONFIG_USB_USBNET is not set 635 690 # CONFIG_WAN is not set 636 691 # CONFIG_FDDI is not set 637 692 # CONFIG_HIPPI is not set ··· 641 696 # CONFIG_SHAPER is not set 642 697 CONFIG_NETCONSOLE=y 643 698 CONFIG_NETPOLL=y 644 - # CONFIG_NETPOLL_RX is not set 645 699 # CONFIG_NETPOLL_TRAP is not set 646 700 CONFIG_NET_POLL_CONTROLLER=y 647 - 648 - # 649 - # ISDN subsystem 650 - # 651 701 # CONFIG_ISDN is not set 652 - 653 - # 654 - # Telephony Support 655 - # 656 702 # CONFIG_PHONE is not set 657 703 658 704 # ··· 651 715 # 652 716 CONFIG_INPUT=y 653 717 # CONFIG_INPUT_FF_MEMLESS is not set 718 + # CONFIG_INPUT_POLLDEV is not set 654 719 655 720 # 656 721 # Userland interfaces ··· 677 740 # CONFIG_KEYBOARD_STOWAWAY is not set 678 741 CONFIG_INPUT_MOUSE=y 679 742 CONFIG_MOUSE_PS2=y 743 + CONFIG_MOUSE_PS2_ALPS=y 744 + CONFIG_MOUSE_PS2_LOGIPS2PP=y 745 + CONFIG_MOUSE_PS2_SYNAPTICS=y 746 + CONFIG_MOUSE_PS2_LIFEBOOK=y 747 + CONFIG_MOUSE_PS2_TRACKPOINT=y 748 + # CONFIG_MOUSE_PS2_TOUCHKIT is not set 680 749 # CONFIG_MOUSE_SERIAL is not set 750 + # CONFIG_MOUSE_APPLETOUCH is not set 681 751 # CONFIG_MOUSE_VSXXXAA is not set 682 752 # CONFIG_INPUT_JOYSTICK is not set 753 + # CONFIG_INPUT_TABLET is not set 683 754 # CONFIG_INPUT_TOUCHSCREEN is not set 684 755 # CONFIG_INPUT_MISC is not set 685 756 ··· 759 814 CONFIG_UNIX98_PTYS=y 760 815 CONFIG_LEGACY_PTYS=y 761 816 CONFIG_LEGACY_PTY_COUNT=256 762 - 763 - # 764 - # IPMI 765 - # 766 817 # CONFIG_IPMI_HANDLER is not set 767 - 768 - # 769 - # Watchdog Cards 770 - # 771 818 # CONFIG_WATCHDOG is not set 772 819 # CONFIG_HW_RANDOM is not set 773 820 CONFIG_EFI_RTC=y 774 - # CONFIG_DTLK is not set 775 821 # CONFIG_R3964 is not set 776 822 # CONFIG_APPLICOM is not set 777 823 CONFIG_AGP=m ··· 784 848 CONFIG_HPET_MMAP=y 785 849 # CONFIG_HANGCHECK_TIMER is not set 786 850 CONFIG_MMTIMER=y 787 - 788 - # 789 - # TPM devices 790 - # 791 851 # CONFIG_TCG_TPM is not set 792 - 793 - # 794 - # I2C support 795 - # 852 + CONFIG_DEVPORT=y 796 853 # CONFIG_I2C is not set 797 854 798 855 # ··· 793 864 # 794 865 # CONFIG_SPI is not set 795 866 # CONFIG_SPI_MASTER is not set 796 - 797 - # 798 - # Dallas's 1-wire bus 799 - # 800 867 # CONFIG_W1 is not set 801 - 802 - # 803 - # Hardware Monitoring support 804 - # 868 + # CONFIG_POWER_SUPPLY is not set 805 869 CONFIG_HWMON=y 806 870 # CONFIG_HWMON_VID is not set 807 871 # CONFIG_SENSORS_ABITUGURU is not set 808 872 # CONFIG_SENSORS_F71805F is not set 809 873 # CONFIG_SENSORS_PC87427 is not set 874 + # CONFIG_SENSORS_SMSC47M1 is not set 875 + # CONFIG_SENSORS_SMSC47B397 is not set 810 876 # CONFIG_SENSORS_VT1211 is not set 877 + # CONFIG_SENSORS_W83627HF is not set 811 878 # CONFIG_HWMON_DEBUG_CHIP is not set 812 879 813 880 # ··· 815 890 # Multimedia devices 816 891 # 817 892 # CONFIG_VIDEO_DEV is not set 818 - 819 - # 820 - # Digital Video Broadcasting Devices 821 - # 822 - # CONFIG_DVB is not set 893 + # CONFIG_DVB_CORE is not set 894 + CONFIG_DAB=y 823 895 # CONFIG_USB_DABUSB is not set 824 896 825 897 # 826 898 # Graphics support 827 899 # 828 900 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 901 + 902 + # 903 + # Display device support 904 + # 905 + # CONFIG_DISPLAY_SUPPORT is not set 906 + # CONFIG_VGASTATE is not set 829 907 # CONFIG_FB is not set 830 908 831 909 # ··· 942 1014 # USB devices 943 1015 # 944 1016 # CONFIG_SND_USB_AUDIO is not set 1017 + # CONFIG_SND_USB_CAIAQ is not set 945 1018 946 1019 # 947 - # SoC audio support 1020 + # System on Chip audio support 948 1021 # 949 1022 # CONFIG_SND_SOC is not set 950 1023 ··· 954 1025 # 955 1026 # CONFIG_SOUND_PRIME is not set 956 1027 CONFIG_AC97_BUS=m 957 - 958 - # 959 - # HID Devices 960 - # 1028 + CONFIG_HID_SUPPORT=y 961 1029 CONFIG_HID=y 962 1030 # CONFIG_HID_DEBUG is not set 963 1031 964 1032 # 965 - # USB support 1033 + # USB Input Devices 966 1034 # 1035 + CONFIG_USB_HID=m 1036 + # CONFIG_USB_HIDINPUT_POWERBOOK is not set 1037 + # CONFIG_HID_FF is not set 1038 + # CONFIG_USB_HIDDEV is not set 1039 + 1040 + # 1041 + # USB HID Boot Protocol drivers 1042 + # 1043 + # CONFIG_USB_KBD is not set 1044 + # CONFIG_USB_MOUSE is not set 1045 + CONFIG_USB_SUPPORT=y 967 1046 CONFIG_USB_ARCH_HAS_HCD=y 968 1047 CONFIG_USB_ARCH_HAS_OHCI=y 969 1048 CONFIG_USB_ARCH_HAS_EHCI=y ··· 982 1045 # Miscellaneous USB options 983 1046 # 984 1047 CONFIG_USB_DEVICEFS=y 1048 + CONFIG_USB_DEVICE_CLASS=y 985 1049 # CONFIG_USB_DYNAMIC_MINORS is not set 986 1050 # CONFIG_USB_SUSPEND is not set 1051 + # CONFIG_USB_PERSIST is not set 987 1052 # CONFIG_USB_OTG is not set 988 1053 989 1054 # ··· 995 1056 # CONFIG_USB_EHCI_SPLIT_ISO is not set 996 1057 # CONFIG_USB_EHCI_ROOT_HUB_TT is not set 997 1058 # CONFIG_USB_EHCI_TT_NEWSCHED is not set 998 - # CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set 999 1059 # CONFIG_USB_ISP116X_HCD is not set 1000 1060 CONFIG_USB_OHCI_HCD=m 1001 1061 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set ··· 1002 1064 CONFIG_USB_OHCI_LITTLE_ENDIAN=y 1003 1065 CONFIG_USB_UHCI_HCD=m 1004 1066 # CONFIG_USB_SL811_HCD is not set 1067 + # CONFIG_USB_R8A66597_HCD is not set 1005 1068 1006 1069 # 1007 1070 # USB Device Class drivers ··· 1032 1093 # CONFIG_USB_LIBUSUAL is not set 1033 1094 1034 1095 # 1035 - # USB Input Devices 1036 - # 1037 - CONFIG_USB_HID=m 1038 - # CONFIG_USB_HIDINPUT_POWERBOOK is not set 1039 - # CONFIG_HID_FF is not set 1040 - # CONFIG_USB_HIDDEV is not set 1041 - 1042 - # 1043 - # USB HID Boot Protocol drivers 1044 - # 1045 - # CONFIG_USB_KBD is not set 1046 - # CONFIG_USB_MOUSE is not set 1047 - # CONFIG_USB_AIPTEK is not set 1048 - # CONFIG_USB_WACOM is not set 1049 - # CONFIG_USB_ACECAD is not set 1050 - # CONFIG_USB_KBTAB is not set 1051 - # CONFIG_USB_POWERMATE is not set 1052 - # CONFIG_USB_TOUCHSCREEN is not set 1053 - # CONFIG_USB_YEALINK is not set 1054 - # CONFIG_USB_XPAD is not set 1055 - # CONFIG_USB_ATI_REMOTE is not set 1056 - # CONFIG_USB_ATI_REMOTE2 is not set 1057 - # CONFIG_USB_KEYSPAN_REMOTE is not set 1058 - # CONFIG_USB_APPLETOUCH is not set 1059 - # CONFIG_USB_GTCO is not set 1060 - 1061 - # 1062 1096 # USB Imaging devices 1063 1097 # 1064 1098 # CONFIG_USB_MDC800 is not set 1065 1099 # CONFIG_USB_MICROTEK is not set 1066 - 1067 - # 1068 - # USB Network Adapters 1069 - # 1070 - # CONFIG_USB_CATC is not set 1071 - # CONFIG_USB_KAWETH is not set 1072 - # CONFIG_USB_PEGASUS is not set 1073 - # CONFIG_USB_RTL8150 is not set 1074 - # CONFIG_USB_USBNET_MII is not set 1075 - # CONFIG_USB_USBNET is not set 1076 1100 CONFIG_USB_MON=y 1077 1101 1078 1102 # ··· 1079 1177 # USB Gadget Support 1080 1178 # 1081 1179 # CONFIG_USB_GADGET is not set 1082 - 1083 - # 1084 - # MMC/SD Card support 1085 - # 1086 1180 # CONFIG_MMC is not set 1087 1181 1088 1182 # ··· 1093 1195 # 1094 1196 # LED Triggers 1095 1197 # 1096 - 1097 - # 1098 - # InfiniBand support 1099 - # 1100 1198 CONFIG_INFINIBAND=m 1101 1199 # CONFIG_INFINIBAND_USER_MAD is not set 1102 1200 # CONFIG_INFINIBAND_USER_ACCESS is not set ··· 1100 1206 CONFIG_INFINIBAND_MTHCA=m 1101 1207 CONFIG_INFINIBAND_MTHCA_DEBUG=y 1102 1208 # CONFIG_INFINIBAND_AMSO1100 is not set 1209 + # CONFIG_MLX4_INFINIBAND is not set 1103 1210 CONFIG_INFINIBAND_IPOIB=m 1104 1211 # CONFIG_INFINIBAND_IPOIB_CM is not set 1105 1212 CONFIG_INFINIBAND_IPOIB_DEBUG=y 1106 1213 # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set 1107 1214 # CONFIG_INFINIBAND_SRP is not set 1108 1215 # CONFIG_INFINIBAND_ISER is not set 1109 - 1110 - # 1111 - # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 1112 - # 1113 1216 1114 1217 # 1115 1218 # Real Time Clock ··· 1127 1236 # 1128 1237 1129 1238 # 1130 - # Auxiliary Display support 1239 + # Userspace I/O 1131 1240 # 1132 - 1133 - # 1134 - # Virtualization 1135 - # 1241 + # CONFIG_UIO is not set 1136 1242 # CONFIG_MSPEC is not set 1137 1243 1138 1244 # ··· 1245 1357 CONFIG_NFS_COMMON=y 1246 1358 CONFIG_SUNRPC=m 1247 1359 CONFIG_SUNRPC_GSS=m 1248 - CONFIG_RPCSEC_GSS_KRB5=m 1360 + # CONFIG_SUNRPC_BIND34 is not set 1361 + CONFIG_RPCSEC_GSS_KRB5=y 1249 1362 # CONFIG_RPCSEC_GSS_SPKM3 is not set 1250 1363 CONFIG_SMB_FS=m 1251 1364 CONFIG_SMB_NLS_DEFAULT=y ··· 1260 1371 # CONFIG_NCP_FS is not set 1261 1372 # CONFIG_CODA_FS is not set 1262 1373 # CONFIG_AFS_FS is not set 1263 - # CONFIG_9P_FS is not set 1264 1374 1265 1375 # 1266 1376 # Partition Types ··· 1281 1393 # CONFIG_SUN_PARTITION is not set 1282 1394 # CONFIG_KARMA_PARTITION is not set 1283 1395 CONFIG_EFI_PARTITION=y 1396 + # CONFIG_SYSV68_PARTITION is not set 1284 1397 1285 1398 # 1286 1399 # Native Language Support ··· 1338 1449 CONFIG_BITREVERSE=y 1339 1450 # CONFIG_CRC_CCITT is not set 1340 1451 # CONFIG_CRC16 is not set 1452 + # CONFIG_CRC_ITU_T is not set 1341 1453 CONFIG_CRC32=y 1454 + # CONFIG_CRC7 is not set 1342 1455 # CONFIG_LIBCRC32C is not set 1343 1456 CONFIG_PLIST=y 1344 1457 CONFIG_HAS_IOMEM=y 1345 1458 CONFIG_HAS_IOPORT=y 1459 + CONFIG_HAS_DMA=y 1346 1460 CONFIG_GENERIC_HARDIRQS=y 1347 1461 CONFIG_GENERIC_IRQ_PROBE=y 1348 1462 CONFIG_GENERIC_PENDING_IRQ=y ··· 1375 1483 # CONFIG_HEADERS_CHECK is not set 1376 1484 CONFIG_DEBUG_KERNEL=y 1377 1485 # CONFIG_DEBUG_SHIRQ is not set 1378 - CONFIG_LOG_BUF_SHIFT=20 1379 1486 CONFIG_DETECT_SOFTLOCKUP=y 1487 + CONFIG_SCHED_DEBUG=y 1380 1488 # CONFIG_SCHEDSTATS is not set 1381 1489 # CONFIG_TIMER_STATS is not set 1382 1490 # CONFIG_DEBUG_SLAB is not set ··· 1406 1514 # 1407 1515 # CONFIG_KEYS is not set 1408 1516 # CONFIG_SECURITY is not set 1409 - 1410 - # 1411 - # Cryptographic options 1412 - # 1413 1517 CONFIG_CRYPTO=y 1414 1518 CONFIG_CRYPTO_ALGAPI=y 1415 1519 CONFIG_CRYPTO_BLKCIPHER=m ··· 1425 1537 CONFIG_CRYPTO_CBC=m 1426 1538 CONFIG_CRYPTO_PCBC=m 1427 1539 # CONFIG_CRYPTO_LRW is not set 1540 + # CONFIG_CRYPTO_CRYPTD is not set 1428 1541 CONFIG_CRYPTO_DES=m 1429 1542 # CONFIG_CRYPTO_FCRYPT is not set 1430 1543 # CONFIG_CRYPTO_BLOWFISH is not set ··· 1443 1554 # CONFIG_CRYPTO_CRC32C is not set 1444 1555 # CONFIG_CRYPTO_CAMELLIA is not set 1445 1556 # CONFIG_CRYPTO_TEST is not set 1446 - 1447 - # 1448 - # Hardware crypto devices 1449 - # 1557 + CONFIG_CRYPTO_HW=y
+22 -13
arch/ia64/kernel/asm-offsets.c
··· 7 7 #define ASM_OFFSETS_C 1 8 8 9 9 #include <linux/sched.h> 10 + #include <linux/clocksource.h> 10 11 11 12 #include <asm-ia64/processor.h> 12 13 #include <asm-ia64/ptrace.h> ··· 16 15 #include <asm-ia64/mca.h> 17 16 18 17 #include "../kernel/sigframe.h" 18 + #include "../kernel/fsyscall_gtod_data.h" 19 19 20 20 #define DEFINE(sym, val) \ 21 21 asm volatile("\n->" #sym " %0 " #val : : "i" (val)) ··· 258 256 BLANK(); 259 257 260 258 /* used by fsys_gettimeofday in arch/ia64/kernel/fsys.S */ 261 - DEFINE(IA64_TIME_INTERPOLATOR_ADDRESS_OFFSET, offsetof (struct time_interpolator, addr)); 262 - DEFINE(IA64_TIME_INTERPOLATOR_SOURCE_OFFSET, offsetof (struct time_interpolator, source)); 263 - DEFINE(IA64_TIME_INTERPOLATOR_SHIFT_OFFSET, offsetof (struct time_interpolator, shift)); 264 - DEFINE(IA64_TIME_INTERPOLATOR_NSEC_OFFSET, offsetof (struct time_interpolator, nsec_per_cyc)); 265 - DEFINE(IA64_TIME_INTERPOLATOR_OFFSET_OFFSET, offsetof (struct time_interpolator, offset)); 266 - DEFINE(IA64_TIME_INTERPOLATOR_LAST_CYCLE_OFFSET, offsetof (struct time_interpolator, last_cycle)); 267 - DEFINE(IA64_TIME_INTERPOLATOR_LAST_COUNTER_OFFSET, offsetof (struct time_interpolator, last_counter)); 268 - DEFINE(IA64_TIME_INTERPOLATOR_JITTER_OFFSET, offsetof (struct time_interpolator, jitter)); 269 - DEFINE(IA64_TIME_INTERPOLATOR_MASK_OFFSET, offsetof (struct time_interpolator, mask)); 270 - DEFINE(IA64_TIME_SOURCE_CPU, TIME_SOURCE_CPU); 271 - DEFINE(IA64_TIME_SOURCE_MMIO64, TIME_SOURCE_MMIO64); 272 - DEFINE(IA64_TIME_SOURCE_MMIO32, TIME_SOURCE_MMIO32); 273 - DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, offsetof (struct timespec, tv_nsec)); 259 + DEFINE(IA64_GTOD_LOCK_OFFSET, 260 + offsetof (struct fsyscall_gtod_data_t, lock)); 261 + DEFINE(IA64_GTOD_WALL_TIME_OFFSET, 262 + offsetof (struct fsyscall_gtod_data_t, wall_time)); 263 + DEFINE(IA64_GTOD_MONO_TIME_OFFSET, 264 + offsetof (struct fsyscall_gtod_data_t, monotonic_time)); 265 + DEFINE(IA64_CLKSRC_MASK_OFFSET, 266 + offsetof (struct fsyscall_gtod_data_t, clk_mask)); 267 + DEFINE(IA64_CLKSRC_MULT_OFFSET, 268 + offsetof (struct fsyscall_gtod_data_t, clk_mult)); 269 + DEFINE(IA64_CLKSRC_SHIFT_OFFSET, 270 + offsetof (struct fsyscall_gtod_data_t, clk_shift)); 271 + DEFINE(IA64_CLKSRC_MMIO_OFFSET, 272 + offsetof (struct fsyscall_gtod_data_t, clk_fsys_mmio)); 273 + DEFINE(IA64_CLKSRC_CYCLE_LAST_OFFSET, 274 + offsetof (struct fsyscall_gtod_data_t, clk_cycle_last)); 275 + DEFINE(IA64_ITC_JITTER_OFFSET, 276 + offsetof (struct itc_jitter_data_t, itc_jitter)); 277 + DEFINE(IA64_ITC_LASTCYCLE_OFFSET, 278 + offsetof (struct itc_jitter_data_t, itc_lastcycle)); 274 279 }
+32 -14
arch/ia64/kernel/cyclone.c
··· 3 3 #include <linux/time.h> 4 4 #include <linux/errno.h> 5 5 #include <linux/timex.h> 6 + #include <linux/clocksource.h> 6 7 #include <asm/io.h> 7 8 8 9 /* IBM Summit (EXA) Cyclone counter code*/ ··· 19 18 use_cyclone = 1; 20 19 } 21 20 21 + static void __iomem *cyclone_mc; 22 22 23 - struct time_interpolator cyclone_interpolator = { 24 - .source = TIME_SOURCE_MMIO64, 25 - .shift = 16, 26 - .frequency = CYCLONE_TIMER_FREQ, 27 - .drift = -100, 28 - .mask = (1LL << 40) - 1 23 + static cycle_t read_cyclone(void) 24 + { 25 + return (cycle_t)readq((void __iomem *)cyclone_mc); 26 + } 27 + 28 + static struct clocksource clocksource_cyclone = { 29 + .name = "cyclone", 30 + .rating = 300, 31 + .read = read_cyclone, 32 + .mask = (1LL << 40) - 1, 33 + .mult = 0, /*to be caluclated*/ 34 + .shift = 16, 35 + .flags = CLOCK_SOURCE_IS_CONTINUOUS, 29 36 }; 30 37 31 38 int __init init_cyclone_clock(void) ··· 53 44 offset = (CYCLONE_CBAR_ADDR); 54 45 reg = (u64*)ioremap_nocache(offset, sizeof(u64)); 55 46 if(!reg){ 56 - printk(KERN_ERR "Summit chipset: Could not find valid CBAR register.\n"); 47 + printk(KERN_ERR "Summit chipset: Could not find valid CBAR" 48 + " register.\n"); 57 49 use_cyclone = 0; 58 50 return -ENODEV; 59 51 } 60 52 base = readq(reg); 61 53 if(!base){ 62 - printk(KERN_ERR "Summit chipset: Could not find valid CBAR value.\n"); 54 + printk(KERN_ERR "Summit chipset: Could not find valid CBAR" 55 + " value.\n"); 63 56 use_cyclone = 0; 64 57 return -ENODEV; 65 58 } ··· 71 60 offset = (base + CYCLONE_PMCC_OFFSET); 72 61 reg = (u64*)ioremap_nocache(offset, sizeof(u64)); 73 62 if(!reg){ 74 - printk(KERN_ERR "Summit chipset: Could not find valid PMCC register.\n"); 63 + printk(KERN_ERR "Summit chipset: Could not find valid PMCC" 64 + " register.\n"); 75 65 use_cyclone = 0; 76 66 return -ENODEV; 77 67 } ··· 83 71 offset = (base + CYCLONE_MPCS_OFFSET); 84 72 reg = (u64*)ioremap_nocache(offset, sizeof(u64)); 85 73 if(!reg){ 86 - printk(KERN_ERR "Summit chipset: Could not find valid MPCS register.\n"); 74 + printk(KERN_ERR "Summit chipset: Could not find valid MPCS" 75 + " register.\n"); 87 76 use_cyclone = 0; 88 77 return -ENODEV; 89 78 } ··· 95 82 offset = (base + CYCLONE_MPMC_OFFSET); 96 83 cyclone_timer = (u32*)ioremap_nocache(offset, sizeof(u32)); 97 84 if(!cyclone_timer){ 98 - printk(KERN_ERR "Summit chipset: Could not find valid MPMC register.\n"); 85 + printk(KERN_ERR "Summit chipset: Could not find valid MPMC" 86 + " register.\n"); 99 87 use_cyclone = 0; 100 88 return -ENODEV; 101 89 } ··· 107 93 int stall = 100; 108 94 while(stall--) barrier(); 109 95 if(readl(cyclone_timer) == old){ 110 - printk(KERN_ERR "Summit chipset: Counter not counting! DISABLED\n"); 96 + printk(KERN_ERR "Summit chipset: Counter not counting!" 97 + " DISABLED\n"); 111 98 iounmap(cyclone_timer); 112 99 cyclone_timer = 0; 113 100 use_cyclone = 0; ··· 116 101 } 117 102 } 118 103 /* initialize last tick */ 119 - cyclone_interpolator.addr = cyclone_timer; 120 - register_time_interpolator(&cyclone_interpolator); 104 + cyclone_mc = cyclone_timer; 105 + clocksource_cyclone.fsys_mmio = cyclone_timer; 106 + clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ, 107 + clocksource_cyclone.shift); 108 + clocksource_register(&clocksource_cyclone); 121 109 122 110 return 0; 123 111 }
+1 -1
arch/ia64/kernel/entry.S
··· 1581 1581 data8 sys_sync_file_range // 1300 1582 1582 data8 sys_tee 1583 1583 data8 sys_vmsplice 1584 - data8 sys_ni_syscall // reserved for move_pages 1584 + data8 sys_fallocate 1585 1585 data8 sys_getcpu 1586 1586 data8 sys_epoll_pwait // 1305 1587 1587 data8 sys_utimensat
+87 -90
arch/ia64/kernel/fsys.S
··· 147 147 FSYS_RETURN 148 148 END(fsys_set_tid_address) 149 149 150 - /* 151 - * Ensure that the time interpolator structure is compatible with the asm code 152 - */ 153 - #if IA64_TIME_INTERPOLATOR_SOURCE_OFFSET !=0 || IA64_TIME_INTERPOLATOR_SHIFT_OFFSET != 2 \ 154 - || IA64_TIME_INTERPOLATOR_JITTER_OFFSET != 3 || IA64_TIME_INTERPOLATOR_NSEC_OFFSET != 4 155 - #error fsys_gettimeofday incompatible with changes to struct time_interpolator 150 + #if IA64_GTOD_LOCK_OFFSET !=0 151 + #error fsys_gettimeofday incompatible with changes to struct fsyscall_gtod_data_t 152 + #endif 153 + #if IA64_ITC_JITTER_OFFSET !=0 154 + #error fsys_gettimeofday incompatible with changes to struct itc_jitter_data_t 156 155 #endif 157 156 #define CLOCK_REALTIME 0 158 157 #define CLOCK_MONOTONIC 1 ··· 178 179 // r11 = preserved: saved ar.pfs 179 180 // r12 = preserved: memory stack 180 181 // r13 = preserved: thread pointer 181 - // r14 = address of mask / mask 182 + // r14 = address of mask / mask value 182 183 // r15 = preserved: system call number 183 184 // r16 = preserved: current task pointer 184 - // r17 = wall to monotonic use 185 - // r18 = time_interpolator->offset 186 - // r19 = address of wall_to_monotonic 187 - // r20 = pointer to struct time_interpolator / pointer to time_interpolator->address 188 - // r21 = shift factor 189 - // r22 = address of time interpolator->last_counter 190 - // r23 = address of time_interpolator->last_cycle 191 - // r24 = adress of time_interpolator->offset 192 - // r25 = last_cycle value 193 - // r26 = last_counter value 194 - // r27 = pointer to xtime 185 + // r17 = (not used) 186 + // r18 = (not used) 187 + // r19 = address of itc_lastcycle 188 + // r20 = struct fsyscall_gtod_data (= address of gtod_lock.sequence) 189 + // r21 = address of mmio_ptr 190 + // r22 = address of wall_time or monotonic_time 191 + // r23 = address of shift / value 192 + // r24 = address mult factor / cycle_last value 193 + // r25 = itc_lastcycle value 194 + // r26 = address clocksource cycle_last 195 + // r27 = (not used) 195 196 // r28 = sequence number at the beginning of critcal section 196 - // r29 = address of seqlock 197 + // r29 = address of itc_jitter 197 198 // r30 = time processing flags / memory address 198 199 // r31 = pointer to result 199 200 // Predicates 200 201 // p6,p7 short term use 201 202 // p8 = timesource ar.itc 202 203 // p9 = timesource mmio64 203 - // p10 = timesource mmio32 204 + // p10 = timesource mmio32 - not used 204 205 // p11 = timesource not to be handled by asm code 205 - // p12 = memory time source ( = p9 | p10) 206 - // p13 = do cmpxchg with time_interpolator_last_cycle 206 + // p12 = memory time source ( = p9 | p10) - not used 207 + // p13 = do cmpxchg with itc_lastcycle 207 208 // p14 = Divide by 1000 208 209 // p15 = Add monotonic 209 210 // 210 - // Note that instructions are optimized for McKinley. McKinley can process two 211 - // bundles simultaneously and therefore we continuously try to feed the CPU 212 - // two bundles and then a stop. 213 - tnat.nz p6,p0 = r31 // branch deferred since it does not fit into bundle structure 211 + // Note that instructions are optimized for McKinley. McKinley can 212 + // process two bundles simultaneously and therefore we continuously 213 + // try to feed the CPU two bundles and then a stop. 214 + // 215 + // Additional note that code has changed a lot. Optimization is TBD. 216 + // Comments begin with "?" are maybe outdated. 217 + tnat.nz p6,p0 = r31 // ? branch deferred to fit later bundle 214 218 mov pr = r30,0xc000 // Set predicates according to function 215 219 add r2 = TI_FLAGS+IA64_TASK_SIZE,r16 216 - movl r20 = time_interpolator 220 + movl r20 = fsyscall_gtod_data // load fsyscall gettimeofday data address 217 221 ;; 218 - ld8 r20 = [r20] // get pointer to time_interpolator structure 219 - movl r29 = xtime_lock 222 + movl r29 = itc_jitter_data // itc_jitter 223 + add r22 = IA64_GTOD_WALL_TIME_OFFSET,r20 // wall_time 220 224 ld4 r2 = [r2] // process work pending flags 221 - movl r27 = xtime 222 - ;; // only one bundle here 223 - ld8 r21 = [r20] // first quad with control information 224 - and r2 = TIF_ALLWORK_MASK,r2 225 - (p6) br.cond.spnt.few .fail_einval // deferred branch 226 225 ;; 227 - add r10 = IA64_TIME_INTERPOLATOR_ADDRESS_OFFSET,r20 228 - extr r3 = r21,32,32 // time_interpolator->nsec_per_cyc 229 - extr r8 = r21,0,16 // time_interpolator->source 226 + (p15) add r22 = IA64_GTOD_MONO_TIME_OFFSET,r20 // monotonic_time 227 + add r21 = IA64_CLKSRC_MMIO_OFFSET,r20 228 + add r19 = IA64_ITC_LASTCYCLE_OFFSET,r29 229 + and r2 = TIF_ALLWORK_MASK,r2 230 + (p6) br.cond.spnt.few .fail_einval // ? deferred branch 231 + ;; 232 + add r26 = IA64_CLKSRC_CYCLE_LAST_OFFSET,r20 // clksrc_cycle_last 230 233 cmp.ne p6, p0 = 0, r2 // Fallback if work is scheduled 231 234 (p6) br.cond.spnt.many fsys_fallback_syscall 232 235 ;; 233 - cmp.eq p8,p12 = 0,r8 // Check for cpu timer 234 - cmp.eq p9,p0 = 1,r8 // MMIO64 ? 235 - extr r2 = r21,24,8 // time_interpolator->jitter 236 - cmp.eq p10,p0 = 2,r8 // MMIO32 ? 237 - cmp.ltu p11,p0 = 2,r8 // function or other clock 238 - (p11) br.cond.spnt.many fsys_fallback_syscall 239 - ;; 240 - setf.sig f7 = r3 // Setup for scaling of counter 241 - (p15) movl r19 = wall_to_monotonic 242 - (p12) ld8 r30 = [r10] 243 - cmp.ne p13,p0 = r2,r0 // need jitter compensation? 244 - extr r21 = r21,16,8 // shift factor 245 - ;; 236 + // Begin critical section 246 237 .time_redo: 247 - .pred.rel.mutex p8,p9,p10 248 - ld4.acq r28 = [r29] // xtime_lock.sequence. Must come first for locking purposes 238 + ld4.acq r28 = [r20] // gtod_lock.sequence, Must take first 249 239 ;; 250 - and r28 = ~1,r28 // Make sequence even to force retry if odd 240 + and r28 = ~1,r28 // And make sequence even to force retry if odd 251 241 ;; 242 + ld8 r30 = [r21] // clocksource->mmio_ptr 243 + add r24 = IA64_CLKSRC_MULT_OFFSET,r20 244 + ld4 r2 = [r29] // itc_jitter value 245 + add r23 = IA64_CLKSRC_SHIFT_OFFSET,r20 246 + add r14 = IA64_CLKSRC_MASK_OFFSET,r20 247 + ;; 248 + ld4 r3 = [r24] // clocksource mult value 249 + ld8 r14 = [r14] // clocksource mask value 250 + cmp.eq p8,p9 = 0,r30 // use cpu timer if no mmio_ptr 251 + ;; 252 + setf.sig f7 = r3 // Setup for mult scaling of counter 253 + (p8) cmp.ne p13,p0 = r2,r0 // need itc_jitter compensation, set p13 254 + ld4 r23 = [r23] // clocksource shift value 255 + ld8 r24 = [r26] // get clksrc_cycle_last value 256 + (p9) cmp.eq p13,p0 = 0,r30 // if mmio_ptr, clear p13 jitter control 257 + ;; 258 + .pred.rel.mutex p8,p9 252 259 (p8) mov r2 = ar.itc // CPU_TIMER. 36 clocks latency!!! 253 - add r22 = IA64_TIME_INTERPOLATOR_LAST_COUNTER_OFFSET,r20 254 - (p9) ld8 r2 = [r30] // readq(ti->address). Could also have latency issues.. 255 - (p10) ld4 r2 = [r30] // readw(ti->address) 256 - (p13) add r23 = IA64_TIME_INTERPOLATOR_LAST_CYCLE_OFFSET,r20 257 - ;; // could be removed by moving the last add upward 258 - ld8 r26 = [r22] // time_interpolator->last_counter 259 - (p13) ld8 r25 = [r23] // time interpolator->last_cycle 260 - add r24 = IA64_TIME_INTERPOLATOR_OFFSET_OFFSET,r20 261 - (p15) ld8 r17 = [r19],IA64_TIMESPEC_TV_NSEC_OFFSET 262 - ld8 r9 = [r27],IA64_TIMESPEC_TV_NSEC_OFFSET 263 - add r14 = IA64_TIME_INTERPOLATOR_MASK_OFFSET, r20 260 + (p9) ld8 r2 = [r30] // MMIO_TIMER. Could also have latency issues.. 261 + (p13) ld8 r25 = [r19] // get itc_lastcycle value 262 + ;; // ? could be removed by moving the last add upward 263 + ld8 r9 = [r22],IA64_TIMESPEC_TV_NSEC_OFFSET // tv_sec 264 264 ;; 265 - ld8 r18 = [r24] // time_interpolator->offset 266 - ld8 r8 = [r27],-IA64_TIMESPEC_TV_NSEC_OFFSET // xtime.tv_nsec 267 - (p13) sub r3 = r25,r2 // Diff needed before comparison (thanks davidm) 265 + ld8 r8 = [r22],-IA64_TIMESPEC_TV_NSEC_OFFSET // tv_nsec 266 + (p13) sub r3 = r25,r2 // Diff needed before comparison (thanks davidm) 268 267 ;; 269 - ld8 r14 = [r14] // time_interpolator->mask 270 - (p13) cmp.gt.unc p6,p7 = r3,r0 // check if it is less than last. p6,p7 cleared 271 - sub r10 = r2,r26 // current_counter - last_counter 268 + (p13) cmp.gt.unc p6,p7 = r3,r0 // check if it is less than last. p6,p7 cleared 269 + sub r10 = r2,r24 // current_cycle - last_cycle 272 270 ;; 273 - (p6) sub r10 = r25,r26 // time we got was less than last_cycle 271 + (p6) sub r10 = r25,r24 // time we got was less than last_cycle 274 272 (p7) mov ar.ccv = r25 // more than last_cycle. Prep for cmpxchg 273 + ;; 274 + (p7) cmpxchg8.rel r3 = [r19],r2,ar.ccv 275 + ;; 276 + (p7) cmp.ne p7,p0 = r25,r3 // if cmpxchg not successful 277 + ;; 278 + (p7) sub r10 = r3,r24 // then use new last_cycle instead 275 279 ;; 276 280 and r10 = r10,r14 // Apply mask 277 281 ;; 278 282 setf.sig f8 = r10 279 283 nop.i 123 280 284 ;; 281 - (p7) cmpxchg8.rel r3 = [r23],r2,ar.ccv 282 - EX(.fail_efault, probe.w.fault r31, 3) // This takes 5 cycles and we have spare time 285 + // fault check takes 5 cycles and we have spare time 286 + EX(.fail_efault, probe.w.fault r31, 3) 283 287 xmpy.l f8 = f8,f7 // nsec_per_cyc*(counter-last_counter) 284 - (p15) add r9 = r9,r17 // Add wall to monotonic.secs to result secs 285 288 ;; 286 - (p15) ld8 r17 = [r19],-IA64_TIMESPEC_TV_NSEC_OFFSET 287 - (p7) cmp.ne p7,p0 = r25,r3 // if cmpxchg not successful redo 288 - // simulate tbit.nz.or p7,p0 = r28,0 289 + // ? simulate tbit.nz.or p7,p0 = r28,0 289 290 getf.sig r2 = f8 290 291 mf 291 - add r8 = r8,r18 // Add time interpolator offset 292 292 ;; 293 - ld4 r10 = [r29] // xtime_lock.sequence 294 - (p15) add r8 = r8, r17 // Add monotonic.nsecs to nsecs 295 - shr.u r2 = r2,r21 296 - ;; // overloaded 3 bundles! 297 - // End critical section. 293 + ld4 r10 = [r20] // gtod_lock.sequence 294 + shr.u r2 = r2,r23 // shift by factor 295 + ;; // ? overloaded 3 bundles! 298 296 add r8 = r8,r2 // Add xtime.nsecs 299 - cmp4.ne.or p7,p0 = r28,r10 300 - (p7) br.cond.dpnt.few .time_redo // sequence number changed ? 297 + cmp4.ne p7,p0 = r28,r10 298 + (p7) br.cond.dpnt.few .time_redo // sequence number changed, redo 299 + // End critical section. 301 300 // Now r8=tv->tv_nsec and r9=tv->tv_sec 302 301 mov r10 = r0 303 302 movl r2 = 1000000000 ··· 305 308 .time_normalize: 306 309 mov r21 = r8 307 310 cmp.ge p6,p0 = r8,r2 308 - (p14) shr.u r20 = r8, 3 // We can repeat this if necessary just wasting some time 311 + (p14) shr.u r20 = r8, 3 // We can repeat this if necessary just wasting time 309 312 ;; 310 313 (p14) setf.sig f8 = r20 311 314 (p6) sub r8 = r8,r2 312 - (p6) add r9 = 1,r9 // two nops before the branch. 313 - (p14) setf.sig f7 = r3 // Chances for repeats are 1 in 10000 for gettod 315 + (p6) add r9 = 1,r9 // two nops before the branch. 316 + (p14) setf.sig f7 = r3 // Chances for repeats are 1 in 10000 for gettod 314 317 (p6) br.cond.dpnt.few .time_normalize 315 318 ;; 316 319 // Divided by 8 though shift. Now divide by 125 317 320 // The compiler was able to do that with a multiply 318 321 // and a shift and we do the same 319 - EX(.fail_efault, probe.w.fault r23, 3) // This also costs 5 cycles 320 - (p14) xmpy.hu f8 = f8, f7 // xmpy has 5 cycles latency so use it... 322 + EX(.fail_efault, probe.w.fault r23, 3) // This also costs 5 cycles 323 + (p14) xmpy.hu f8 = f8, f7 // xmpy has 5 cycles latency so use it 321 324 ;; 322 325 mov r8 = r0 323 326 (p14) getf.sig r2 = f8
+23
arch/ia64/kernel/fsyscall_gtod_data.h
··· 1 + /* 2 + * (c) Copyright 2007 Hewlett-Packard Development Company, L.P. 3 + * Contributed by Peter Keilty <peter.keilty@hp.com> 4 + * 5 + * fsyscall gettimeofday data 6 + */ 7 + 8 + struct fsyscall_gtod_data_t { 9 + seqlock_t lock; 10 + struct timespec wall_time; 11 + struct timespec monotonic_time; 12 + cycle_t clk_mask; 13 + u32 clk_mult; 14 + u32 clk_shift; 15 + void *clk_fsys_mmio; 16 + cycle_t clk_cycle_last; 17 + } __attribute__ ((aligned (L1_CACHE_BYTES))); 18 + 19 + struct itc_jitter_data_t { 20 + int itc_jitter; 21 + cycle_t itc_lastcycle; 22 + } __attribute__ ((aligned (L1_CACHE_BYTES))); 23 +
+303 -359
arch/ia64/kernel/iosapic.c
··· 118 118 * vector. 119 119 */ 120 120 121 - struct iosapic_rte_info { 122 - struct list_head rte_list; /* node in list of RTEs sharing the 123 - * same vector */ 121 + #define NO_REF_RTE 0 122 + 123 + static struct iosapic { 124 124 char __iomem *addr; /* base address of IOSAPIC */ 125 - unsigned int gsi_base; /* first GSI assigned to this 126 - * IOSAPIC */ 125 + unsigned int gsi_base; /* GSI base */ 126 + unsigned short num_rte; /* # of RTEs on this IOSAPIC */ 127 + int rtes_inuse; /* # of RTEs in use on this IOSAPIC */ 128 + #ifdef CONFIG_NUMA 129 + unsigned short node; /* numa node association via pxm */ 130 + #endif 131 + spinlock_t lock; /* lock for indirect reg access */ 132 + } iosapic_lists[NR_IOSAPICS]; 133 + 134 + struct iosapic_rte_info { 135 + struct list_head rte_list; /* RTEs sharing the same vector */ 127 136 char rte_index; /* IOSAPIC RTE index */ 128 137 int refcnt; /* reference counter */ 129 138 unsigned int flags; /* flags */ 139 + struct iosapic *iosapic; 130 140 } ____cacheline_aligned; 131 141 132 142 static struct iosapic_intr_info { ··· 150 140 unsigned char polarity: 1; /* interrupt polarity 151 141 * (see iosapic.h) */ 152 142 unsigned char trigger : 1; /* trigger mode (see iosapic.h) */ 153 - } iosapic_intr_info[IA64_NUM_VECTORS]; 154 - 155 - static struct iosapic { 156 - char __iomem *addr; /* base address of IOSAPIC */ 157 - unsigned int gsi_base; /* first GSI assigned to this 158 - * IOSAPIC */ 159 - unsigned short num_rte; /* # of RTEs on this IOSAPIC */ 160 - int rtes_inuse; /* # of RTEs in use on this IOSAPIC */ 161 - #ifdef CONFIG_NUMA 162 - unsigned short node; /* numa node association via pxm */ 163 - #endif 164 - } iosapic_lists[NR_IOSAPICS]; 143 + } iosapic_intr_info[NR_IRQS]; 165 144 166 145 static unsigned char pcat_compat __devinitdata; /* 8259 compatibility flag */ 167 146 168 147 static int iosapic_kmalloc_ok; 169 148 static LIST_HEAD(free_rte_list); 149 + 150 + static inline void 151 + iosapic_write(struct iosapic *iosapic, unsigned int reg, u32 val) 152 + { 153 + unsigned long flags; 154 + 155 + spin_lock_irqsave(&iosapic->lock, flags); 156 + __iosapic_write(iosapic->addr, reg, val); 157 + spin_unlock_irqrestore(&iosapic->lock, flags); 158 + } 170 159 171 160 /* 172 161 * Find an IOSAPIC associated with a GSI ··· 184 175 return -1; 185 176 } 186 177 187 - static inline int 188 - _gsi_to_vector (unsigned int gsi) 178 + static inline int __gsi_to_irq(unsigned int gsi) 189 179 { 180 + int irq; 190 181 struct iosapic_intr_info *info; 191 182 struct iosapic_rte_info *rte; 192 183 193 - for (info = iosapic_intr_info; info < 194 - iosapic_intr_info + IA64_NUM_VECTORS; ++info) 184 + for (irq = 0; irq < NR_IRQS; irq++) { 185 + info = &iosapic_intr_info[irq]; 195 186 list_for_each_entry(rte, &info->rtes, rte_list) 196 - if (rte->gsi_base + rte->rte_index == gsi) 197 - return info - iosapic_intr_info; 187 + if (rte->iosapic->gsi_base + rte->rte_index == gsi) 188 + return irq; 189 + } 198 190 return -1; 199 191 } 200 192 ··· 206 196 inline int 207 197 gsi_to_vector (unsigned int gsi) 208 198 { 209 - return _gsi_to_vector(gsi); 199 + int irq = __gsi_to_irq(gsi); 200 + if (check_irq_used(irq) < 0) 201 + return -1; 202 + return irq_to_vector(irq); 210 203 } 211 204 212 205 int ··· 217 204 { 218 205 unsigned long flags; 219 206 int irq; 220 - /* 221 - * XXX fix me: this assumes an identity mapping between IA-64 vector 222 - * and Linux irq numbers... 223 - */ 224 - spin_lock_irqsave(&iosapic_lock, flags); 225 - { 226 - irq = _gsi_to_vector(gsi); 227 - } 228 - spin_unlock_irqrestore(&iosapic_lock, flags); 229 207 208 + spin_lock_irqsave(&iosapic_lock, flags); 209 + irq = __gsi_to_irq(gsi); 210 + spin_unlock_irqrestore(&iosapic_lock, flags); 230 211 return irq; 231 212 } 232 213 233 - static struct iosapic_rte_info *gsi_vector_to_rte(unsigned int gsi, 234 - unsigned int vec) 214 + static struct iosapic_rte_info *find_rte(unsigned int irq, unsigned int gsi) 235 215 { 236 216 struct iosapic_rte_info *rte; 237 217 238 - list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list) 239 - if (rte->gsi_base + rte->rte_index == gsi) 218 + list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) 219 + if (rte->iosapic->gsi_base + rte->rte_index == gsi) 240 220 return rte; 241 221 return NULL; 242 222 } 243 223 244 224 static void 245 - set_rte (unsigned int gsi, unsigned int vector, unsigned int dest, int mask) 225 + set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask) 246 226 { 247 227 unsigned long pol, trigger, dmode; 248 228 u32 low32, high32; 249 - char __iomem *addr; 250 229 int rte_index; 251 230 char redir; 252 231 struct iosapic_rte_info *rte; 232 + ia64_vector vector = irq_to_vector(irq); 253 233 254 234 DBG(KERN_DEBUG"IOSAPIC: routing vector %d to 0x%x\n", vector, dest); 255 235 256 - rte = gsi_vector_to_rte(gsi, vector); 236 + rte = find_rte(irq, gsi); 257 237 if (!rte) 258 238 return; /* not an IOSAPIC interrupt */ 259 239 260 240 rte_index = rte->rte_index; 261 - addr = rte->addr; 262 - pol = iosapic_intr_info[vector].polarity; 263 - trigger = iosapic_intr_info[vector].trigger; 264 - dmode = iosapic_intr_info[vector].dmode; 241 + pol = iosapic_intr_info[irq].polarity; 242 + trigger = iosapic_intr_info[irq].trigger; 243 + dmode = iosapic_intr_info[irq].dmode; 265 244 266 245 redir = (dmode == IOSAPIC_LOWEST_PRIORITY) ? 1 : 0; 267 246 268 247 #ifdef CONFIG_SMP 269 - { 270 - unsigned int irq; 271 - 272 - for (irq = 0; irq < NR_IRQS; ++irq) 273 - if (irq_to_vector(irq) == vector) { 274 - set_irq_affinity_info(irq, 275 - (int)(dest & 0xffff), 276 - redir); 277 - break; 278 - } 279 - } 248 + set_irq_affinity_info(irq, (int)(dest & 0xffff), redir); 280 249 #endif 281 250 282 251 low32 = ((pol << IOSAPIC_POLARITY_SHIFT) | ··· 270 275 /* dest contains both id and eid */ 271 276 high32 = (dest << IOSAPIC_DEST_SHIFT); 272 277 273 - iosapic_write(addr, IOSAPIC_RTE_HIGH(rte_index), high32); 274 - iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32); 275 - iosapic_intr_info[vector].low32 = low32; 276 - iosapic_intr_info[vector].dest = dest; 278 + iosapic_write(rte->iosapic, IOSAPIC_RTE_HIGH(rte_index), high32); 279 + iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32); 280 + iosapic_intr_info[irq].low32 = low32; 281 + iosapic_intr_info[irq].dest = dest; 277 282 } 278 283 279 284 static void ··· 289 294 { 290 295 struct iosapic_intr_info *info; 291 296 struct iosapic_rte_info *rte; 292 - u8 vec = 0; 293 - for (info = iosapic_intr_info; info < 294 - iosapic_intr_info + IA64_NUM_VECTORS; ++info, ++vec) { 297 + ia64_vector vec; 298 + int irq; 299 + 300 + for (irq = 0; irq < NR_IRQS; irq++) { 301 + info = &iosapic_intr_info[irq]; 302 + vec = irq_to_vector(irq); 295 303 list_for_each_entry(rte, &info->rtes, 296 304 rte_list) { 297 - iosapic_write(rte->addr, 305 + iosapic_write(rte->iosapic, 298 306 IOSAPIC_RTE_LOW(rte->rte_index), 299 307 IOSAPIC_MASK|vec); 300 - iosapic_eoi(rte->addr, vec); 308 + iosapic_eoi(rte->iosapic->addr, vec); 301 309 } 302 310 } 303 311 } ··· 309 311 static void 310 312 mask_irq (unsigned int irq) 311 313 { 312 - unsigned long flags; 313 - char __iomem *addr; 314 314 u32 low32; 315 315 int rte_index; 316 - ia64_vector vec = irq_to_vector(irq); 317 316 struct iosapic_rte_info *rte; 318 317 319 - if (list_empty(&iosapic_intr_info[vec].rtes)) 318 + if (list_empty(&iosapic_intr_info[irq].rtes)) 320 319 return; /* not an IOSAPIC interrupt! */ 321 320 322 - spin_lock_irqsave(&iosapic_lock, flags); 323 - { 324 - /* set only the mask bit */ 325 - low32 = iosapic_intr_info[vec].low32 |= IOSAPIC_MASK; 326 - list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, 327 - rte_list) { 328 - addr = rte->addr; 329 - rte_index = rte->rte_index; 330 - iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32); 331 - } 321 + /* set only the mask bit */ 322 + low32 = iosapic_intr_info[irq].low32 |= IOSAPIC_MASK; 323 + list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) { 324 + rte_index = rte->rte_index; 325 + iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32); 332 326 } 333 - spin_unlock_irqrestore(&iosapic_lock, flags); 334 327 } 335 328 336 329 static void 337 330 unmask_irq (unsigned int irq) 338 331 { 339 - unsigned long flags; 340 - char __iomem *addr; 341 332 u32 low32; 342 333 int rte_index; 343 - ia64_vector vec = irq_to_vector(irq); 344 334 struct iosapic_rte_info *rte; 345 335 346 - if (list_empty(&iosapic_intr_info[vec].rtes)) 336 + if (list_empty(&iosapic_intr_info[irq].rtes)) 347 337 return; /* not an IOSAPIC interrupt! */ 348 338 349 - spin_lock_irqsave(&iosapic_lock, flags); 350 - { 351 - low32 = iosapic_intr_info[vec].low32 &= ~IOSAPIC_MASK; 352 - list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, 353 - rte_list) { 354 - addr = rte->addr; 355 - rte_index = rte->rte_index; 356 - iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32); 357 - } 339 + low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK; 340 + list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) { 341 + rte_index = rte->rte_index; 342 + iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32); 358 343 } 359 - spin_unlock_irqrestore(&iosapic_lock, flags); 360 344 } 361 345 362 346 ··· 346 366 iosapic_set_affinity (unsigned int irq, cpumask_t mask) 347 367 { 348 368 #ifdef CONFIG_SMP 349 - unsigned long flags; 350 369 u32 high32, low32; 351 370 int dest, rte_index; 352 - char __iomem *addr; 353 371 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; 354 - ia64_vector vec; 355 372 struct iosapic_rte_info *rte; 373 + struct iosapic *iosapic; 356 374 357 375 irq &= (~IA64_IRQ_REDIRECTED); 358 - vec = irq_to_vector(irq); 359 376 377 + cpus_and(mask, mask, cpu_online_map); 360 378 if (cpus_empty(mask)) 379 + return; 380 + 381 + if (reassign_irq_vector(irq, first_cpu(mask))) 361 382 return; 362 383 363 384 dest = cpu_physical_id(first_cpu(mask)); 364 385 365 - if (list_empty(&iosapic_intr_info[vec].rtes)) 386 + if (list_empty(&iosapic_intr_info[irq].rtes)) 366 387 return; /* not an IOSAPIC interrupt */ 367 388 368 389 set_irq_affinity_info(irq, dest, redir); ··· 371 390 /* dest contains both id and eid */ 372 391 high32 = dest << IOSAPIC_DEST_SHIFT; 373 392 374 - spin_lock_irqsave(&iosapic_lock, flags); 375 - { 376 - low32 = iosapic_intr_info[vec].low32 & 377 - ~(7 << IOSAPIC_DELIVERY_SHIFT); 393 + low32 = iosapic_intr_info[irq].low32 & ~(7 << IOSAPIC_DELIVERY_SHIFT); 394 + if (redir) 395 + /* change delivery mode to lowest priority */ 396 + low32 |= (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT); 397 + else 398 + /* change delivery mode to fixed */ 399 + low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT); 400 + low32 &= IOSAPIC_VECTOR_MASK; 401 + low32 |= irq_to_vector(irq); 378 402 379 - if (redir) 380 - /* change delivery mode to lowest priority */ 381 - low32 |= (IOSAPIC_LOWEST_PRIORITY << 382 - IOSAPIC_DELIVERY_SHIFT); 383 - else 384 - /* change delivery mode to fixed */ 385 - low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT); 386 - 387 - iosapic_intr_info[vec].low32 = low32; 388 - iosapic_intr_info[vec].dest = dest; 389 - list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, 390 - rte_list) { 391 - addr = rte->addr; 392 - rte_index = rte->rte_index; 393 - iosapic_write(addr, IOSAPIC_RTE_HIGH(rte_index), 394 - high32); 395 - iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32); 396 - } 403 + iosapic_intr_info[irq].low32 = low32; 404 + iosapic_intr_info[irq].dest = dest; 405 + list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) { 406 + iosapic = rte->iosapic; 407 + rte_index = rte->rte_index; 408 + iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32); 409 + iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32); 397 410 } 398 - spin_unlock_irqrestore(&iosapic_lock, flags); 399 411 #endif 400 412 } 401 413 ··· 408 434 { 409 435 ia64_vector vec = irq_to_vector(irq); 410 436 struct iosapic_rte_info *rte; 437 + int do_unmask_irq = 0; 411 438 412 - move_native_irq(irq); 413 - list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list) 414 - iosapic_eoi(rte->addr, vec); 439 + if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { 440 + do_unmask_irq = 1; 441 + mask_irq(irq); 442 + } 443 + 444 + list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) 445 + iosapic_eoi(rte->iosapic->addr, vec); 446 + 447 + if (unlikely(do_unmask_irq)) { 448 + move_masked_irq(irq); 449 + unmask_irq(irq); 450 + } 415 451 } 416 452 417 453 #define iosapic_shutdown_level_irq mask_irq ··· 503 519 * unsigned int reserved2 : 8; 504 520 * } 505 521 */ 506 - return iosapic_read(addr, IOSAPIC_VERSION); 522 + return __iosapic_read(addr, IOSAPIC_VERSION); 507 523 } 508 524 509 - static int iosapic_find_sharable_vector (unsigned long trigger, 510 - unsigned long pol) 525 + static int iosapic_find_sharable_irq(unsigned long trigger, unsigned long pol) 511 526 { 512 - int i, vector = -1, min_count = -1; 527 + int i, irq = -ENOSPC, min_count = -1; 513 528 struct iosapic_intr_info *info; 514 529 515 530 /* ··· 516 533 * supported yet 517 534 */ 518 535 if (trigger == IOSAPIC_EDGE) 519 - return -1; 536 + return -EINVAL; 520 537 521 - for (i = IA64_FIRST_DEVICE_VECTOR; i <= IA64_LAST_DEVICE_VECTOR; i++) { 538 + for (i = 0; i <= NR_IRQS; i++) { 522 539 info = &iosapic_intr_info[i]; 523 540 if (info->trigger == trigger && info->polarity == pol && 524 - (info->dmode == IOSAPIC_FIXED || info->dmode == 525 - IOSAPIC_LOWEST_PRIORITY)) { 541 + (info->dmode == IOSAPIC_FIXED || 542 + info->dmode == IOSAPIC_LOWEST_PRIORITY) && 543 + can_request_irq(i, IRQF_SHARED)) { 526 544 if (min_count == -1 || info->count < min_count) { 527 - vector = i; 545 + irq = i; 528 546 min_count = info->count; 529 547 } 530 548 } 531 549 } 532 - 533 - return vector; 550 + return irq; 534 551 } 535 552 536 553 /* ··· 538 555 * assign a new vector for the other and make the vector available 539 556 */ 540 557 static void __init 541 - iosapic_reassign_vector (int vector) 558 + iosapic_reassign_vector (int irq) 542 559 { 543 - int new_vector; 560 + int new_irq; 544 561 545 - if (!list_empty(&iosapic_intr_info[vector].rtes)) { 546 - new_vector = assign_irq_vector(AUTO_ASSIGN); 547 - if (new_vector < 0) 562 + if (!list_empty(&iosapic_intr_info[irq].rtes)) { 563 + new_irq = create_irq(); 564 + if (new_irq < 0) 548 565 panic("%s: out of interrupt vectors!\n", __FUNCTION__); 549 566 printk(KERN_INFO "Reassigning vector %d to %d\n", 550 - vector, new_vector); 551 - memcpy(&iosapic_intr_info[new_vector], &iosapic_intr_info[vector], 567 + irq_to_vector(irq), irq_to_vector(new_irq)); 568 + memcpy(&iosapic_intr_info[new_irq], &iosapic_intr_info[irq], 552 569 sizeof(struct iosapic_intr_info)); 553 - INIT_LIST_HEAD(&iosapic_intr_info[new_vector].rtes); 554 - list_move(iosapic_intr_info[vector].rtes.next, 555 - &iosapic_intr_info[new_vector].rtes); 556 - memset(&iosapic_intr_info[vector], 0, 570 + INIT_LIST_HEAD(&iosapic_intr_info[new_irq].rtes); 571 + list_move(iosapic_intr_info[irq].rtes.next, 572 + &iosapic_intr_info[new_irq].rtes); 573 + memset(&iosapic_intr_info[irq], 0, 557 574 sizeof(struct iosapic_intr_info)); 558 - iosapic_intr_info[vector].low32 = IOSAPIC_MASK; 559 - INIT_LIST_HEAD(&iosapic_intr_info[vector].rtes); 575 + iosapic_intr_info[irq].low32 = IOSAPIC_MASK; 576 + INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes); 560 577 } 561 578 } 562 579 ··· 593 610 return rte; 594 611 } 595 612 596 - static void iosapic_free_rte (struct iosapic_rte_info *rte) 613 + static inline int irq_is_shared (int irq) 597 614 { 598 - if (rte->flags & RTE_PREALLOCATED) 599 - list_add_tail(&rte->rte_list, &free_rte_list); 600 - else 601 - kfree(rte); 602 - } 603 - 604 - static inline int vector_is_shared (int vector) 605 - { 606 - return (iosapic_intr_info[vector].count > 1); 615 + return (iosapic_intr_info[irq].count > 1); 607 616 } 608 617 609 618 static int 610 - register_intr (unsigned int gsi, int vector, unsigned char delivery, 619 + register_intr (unsigned int gsi, int irq, unsigned char delivery, 611 620 unsigned long polarity, unsigned long trigger) 612 621 { 613 622 irq_desc_t *idesc; 614 623 struct hw_interrupt_type *irq_type; 615 - int rte_index; 616 624 int index; 617 - unsigned long gsi_base; 618 - void __iomem *iosapic_address; 619 625 struct iosapic_rte_info *rte; 620 626 621 627 index = find_iosapic(gsi); ··· 614 642 return -ENODEV; 615 643 } 616 644 617 - iosapic_address = iosapic_lists[index].addr; 618 - gsi_base = iosapic_lists[index].gsi_base; 619 - 620 - rte = gsi_vector_to_rte(gsi, vector); 645 + rte = find_rte(irq, gsi); 621 646 if (!rte) { 622 647 rte = iosapic_alloc_rte(); 623 648 if (!rte) { ··· 623 654 return -ENOMEM; 624 655 } 625 656 626 - rte_index = gsi - gsi_base; 627 - rte->rte_index = rte_index; 628 - rte->addr = iosapic_address; 629 - rte->gsi_base = gsi_base; 657 + rte->iosapic = &iosapic_lists[index]; 658 + rte->rte_index = gsi - rte->iosapic->gsi_base; 630 659 rte->refcnt++; 631 - list_add_tail(&rte->rte_list, &iosapic_intr_info[vector].rtes); 632 - iosapic_intr_info[vector].count++; 660 + list_add_tail(&rte->rte_list, &iosapic_intr_info[irq].rtes); 661 + iosapic_intr_info[irq].count++; 633 662 iosapic_lists[index].rtes_inuse++; 634 663 } 635 - else if (vector_is_shared(vector)) { 636 - struct iosapic_intr_info *info = &iosapic_intr_info[vector]; 637 - if (info->trigger != trigger || info->polarity != polarity) { 664 + else if (rte->refcnt == NO_REF_RTE) { 665 + struct iosapic_intr_info *info = &iosapic_intr_info[irq]; 666 + if (info->count > 0 && 667 + (info->trigger != trigger || info->polarity != polarity)){ 638 668 printk (KERN_WARNING 639 669 "%s: cannot override the interrupt\n", 640 670 __FUNCTION__); 641 671 return -EINVAL; 642 672 } 673 + rte->refcnt++; 674 + iosapic_intr_info[irq].count++; 675 + iosapic_lists[index].rtes_inuse++; 643 676 } 644 677 645 - iosapic_intr_info[vector].polarity = polarity; 646 - iosapic_intr_info[vector].dmode = delivery; 647 - iosapic_intr_info[vector].trigger = trigger; 678 + iosapic_intr_info[irq].polarity = polarity; 679 + iosapic_intr_info[irq].dmode = delivery; 680 + iosapic_intr_info[irq].trigger = trigger; 648 681 649 682 if (trigger == IOSAPIC_EDGE) 650 683 irq_type = &irq_type_iosapic_edge; 651 684 else 652 685 irq_type = &irq_type_iosapic_level; 653 686 654 - idesc = irq_desc + vector; 687 + idesc = irq_desc + irq; 655 688 if (idesc->chip != irq_type) { 656 689 if (idesc->chip != &no_irq_type) 657 690 printk(KERN_WARNING 658 691 "%s: changing vector %d from %s to %s\n", 659 - __FUNCTION__, vector, 692 + __FUNCTION__, irq_to_vector(irq), 660 693 idesc->chip->name, irq_type->name); 661 694 idesc->chip = irq_type; 662 695 } ··· 666 695 } 667 696 668 697 static unsigned int 669 - get_target_cpu (unsigned int gsi, int vector) 698 + get_target_cpu (unsigned int gsi, int irq) 670 699 { 671 700 #ifdef CONFIG_SMP 672 701 static int cpu = -1; 673 702 extern int cpe_vector; 703 + cpumask_t domain = irq_to_domain(irq); 674 704 675 705 /* 676 706 * In case of vector shared by multiple RTEs, all RTEs that 677 707 * share the vector need to use the same destination CPU. 678 708 */ 679 - if (!list_empty(&iosapic_intr_info[vector].rtes)) 680 - return iosapic_intr_info[vector].dest; 709 + if (!list_empty(&iosapic_intr_info[irq].rtes)) 710 + return iosapic_intr_info[irq].dest; 681 711 682 712 /* 683 713 * If the platform supports redirection via XTP, let it ··· 695 723 return cpu_physical_id(smp_processor_id()); 696 724 697 725 #ifdef CONFIG_ACPI 698 - if (cpe_vector > 0 && vector == IA64_CPEP_VECTOR) 726 + if (cpe_vector > 0 && irq_to_vector(irq) == IA64_CPEP_VECTOR) 699 727 return get_cpei_target_cpu(); 700 728 #endif 701 729 ··· 710 738 goto skip_numa_setup; 711 739 712 740 cpu_mask = node_to_cpumask(iosapic_lists[iosapic_index].node); 713 - 741 + cpus_and(cpu_mask, cpu_mask, domain); 714 742 for_each_cpu_mask(numa_cpu, cpu_mask) { 715 743 if (!cpu_online(numa_cpu)) 716 744 cpu_clear(numa_cpu, cpu_mask); ··· 721 749 if (!num_cpus) 722 750 goto skip_numa_setup; 723 751 724 - /* Use vector assignment to distribute across cpus in node */ 725 - cpu_index = vector % num_cpus; 752 + /* Use irq assignment to distribute across cpus in node */ 753 + cpu_index = irq % num_cpus; 726 754 727 755 for (numa_cpu = first_cpu(cpu_mask) ; i < cpu_index ; i++) 728 756 numa_cpu = next_cpu(numa_cpu, cpu_mask); ··· 740 768 do { 741 769 if (++cpu >= NR_CPUS) 742 770 cpu = 0; 743 - } while (!cpu_online(cpu)); 771 + } while (!cpu_online(cpu) || !cpu_isset(cpu, domain)); 744 772 745 773 return cpu_physical_id(cpu); 746 774 #else /* CONFIG_SMP */ ··· 757 785 iosapic_register_intr (unsigned int gsi, 758 786 unsigned long polarity, unsigned long trigger) 759 787 { 760 - int vector, mask = 1, err; 788 + int irq, mask = 1, err; 761 789 unsigned int dest; 762 790 unsigned long flags; 763 791 struct iosapic_rte_info *rte; 764 792 u32 low32; 765 - again: 793 + 766 794 /* 767 795 * If this GSI has already been registered (i.e., it's a 768 796 * shared interrupt, or we lost a race to register it), 769 797 * don't touch the RTE. 770 798 */ 771 799 spin_lock_irqsave(&iosapic_lock, flags); 772 - { 773 - vector = gsi_to_vector(gsi); 774 - if (vector > 0) { 775 - rte = gsi_vector_to_rte(gsi, vector); 800 + irq = __gsi_to_irq(gsi); 801 + if (irq > 0) { 802 + rte = find_rte(irq, gsi); 803 + if(iosapic_intr_info[irq].count == 0) { 804 + assign_irq_vector(irq); 805 + dynamic_irq_init(irq); 806 + } else if (rte->refcnt != NO_REF_RTE) { 776 807 rte->refcnt++; 777 - spin_unlock_irqrestore(&iosapic_lock, flags); 778 - return vector; 808 + goto unlock_iosapic_lock; 779 809 } 780 - } 781 - spin_unlock_irqrestore(&iosapic_lock, flags); 810 + } else 811 + irq = create_irq(); 782 812 783 813 /* If vector is running out, we try to find a sharable vector */ 784 - vector = assign_irq_vector(AUTO_ASSIGN); 785 - if (vector < 0) { 786 - vector = iosapic_find_sharable_vector(trigger, polarity); 787 - if (vector < 0) 788 - return -ENOSPC; 814 + if (irq < 0) { 815 + irq = iosapic_find_sharable_irq(trigger, polarity); 816 + if (irq < 0) 817 + goto unlock_iosapic_lock; 789 818 } 790 819 791 - spin_lock_irqsave(&irq_desc[vector].lock, flags); 792 - spin_lock(&iosapic_lock); 793 - { 794 - if (gsi_to_vector(gsi) > 0) { 795 - if (list_empty(&iosapic_intr_info[vector].rtes)) 796 - free_irq_vector(vector); 797 - spin_unlock(&iosapic_lock); 798 - spin_unlock_irqrestore(&irq_desc[vector].lock, 799 - flags); 800 - goto again; 801 - } 802 - 803 - dest = get_target_cpu(gsi, vector); 804 - err = register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, 805 - polarity, trigger); 806 - if (err < 0) { 807 - spin_unlock(&iosapic_lock); 808 - spin_unlock_irqrestore(&irq_desc[vector].lock, 809 - flags); 810 - return err; 811 - } 812 - 813 - /* 814 - * If the vector is shared and already unmasked for 815 - * other interrupt sources, don't mask it. 816 - */ 817 - low32 = iosapic_intr_info[vector].low32; 818 - if (vector_is_shared(vector) && !(low32 & IOSAPIC_MASK)) 819 - mask = 0; 820 - set_rte(gsi, vector, dest, mask); 820 + spin_lock(&irq_desc[irq].lock); 821 + dest = get_target_cpu(gsi, irq); 822 + err = register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, 823 + polarity, trigger); 824 + if (err < 0) { 825 + irq = err; 826 + goto unlock_all; 821 827 } 822 - spin_unlock(&iosapic_lock); 823 - spin_unlock_irqrestore(&irq_desc[vector].lock, flags); 828 + 829 + /* 830 + * If the vector is shared and already unmasked for other 831 + * interrupt sources, don't mask it. 832 + */ 833 + low32 = iosapic_intr_info[irq].low32; 834 + if (irq_is_shared(irq) && !(low32 & IOSAPIC_MASK)) 835 + mask = 0; 836 + set_rte(gsi, irq, dest, mask); 824 837 825 838 printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n", 826 839 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), 827 840 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 828 - cpu_logical_id(dest), dest, vector); 829 - 830 - return vector; 841 + cpu_logical_id(dest), dest, irq_to_vector(irq)); 842 + unlock_all: 843 + spin_unlock(&irq_desc[irq].lock); 844 + unlock_iosapic_lock: 845 + spin_unlock_irqrestore(&iosapic_lock, flags); 846 + return irq; 831 847 } 832 848 833 849 void 834 850 iosapic_unregister_intr (unsigned int gsi) 835 851 { 836 852 unsigned long flags; 837 - int irq, vector, index; 853 + int irq, index; 838 854 irq_desc_t *idesc; 839 855 u32 low32; 840 856 unsigned long trigger, polarity; ··· 841 881 WARN_ON(1); 842 882 return; 843 883 } 844 - vector = irq_to_vector(irq); 884 + 885 + spin_lock_irqsave(&iosapic_lock, flags); 886 + if ((rte = find_rte(irq, gsi)) == NULL) { 887 + printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n", 888 + gsi); 889 + WARN_ON(1); 890 + goto out; 891 + } 892 + 893 + if (--rte->refcnt > 0) 894 + goto out; 845 895 846 896 idesc = irq_desc + irq; 847 - spin_lock_irqsave(&idesc->lock, flags); 848 - spin_lock(&iosapic_lock); 849 - { 850 - if ((rte = gsi_vector_to_rte(gsi, vector)) == NULL) { 851 - printk(KERN_ERR 852 - "iosapic_unregister_intr(%u) unbalanced\n", 853 - gsi); 854 - WARN_ON(1); 855 - goto out; 856 - } 897 + rte->refcnt = NO_REF_RTE; 857 898 858 - if (--rte->refcnt > 0) 859 - goto out; 899 + /* Mask the interrupt */ 900 + low32 = iosapic_intr_info[irq].low32 | IOSAPIC_MASK; 901 + iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte->rte_index), low32); 860 902 861 - /* Mask the interrupt */ 862 - low32 = iosapic_intr_info[vector].low32 | IOSAPIC_MASK; 863 - iosapic_write(rte->addr, IOSAPIC_RTE_LOW(rte->rte_index), 864 - low32); 903 + iosapic_intr_info[irq].count--; 904 + index = find_iosapic(gsi); 905 + iosapic_lists[index].rtes_inuse--; 906 + WARN_ON(iosapic_lists[index].rtes_inuse < 0); 865 907 866 - /* Remove the rte entry from the list */ 867 - list_del(&rte->rte_list); 868 - iosapic_intr_info[vector].count--; 869 - iosapic_free_rte(rte); 870 - index = find_iosapic(gsi); 871 - iosapic_lists[index].rtes_inuse--; 872 - WARN_ON(iosapic_lists[index].rtes_inuse < 0); 908 + trigger = iosapic_intr_info[irq].trigger; 909 + polarity = iosapic_intr_info[irq].polarity; 910 + dest = iosapic_intr_info[irq].dest; 911 + printk(KERN_INFO 912 + "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d unregistered\n", 913 + gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), 914 + (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 915 + cpu_logical_id(dest), dest, irq_to_vector(irq)); 873 916 874 - trigger = iosapic_intr_info[vector].trigger; 875 - polarity = iosapic_intr_info[vector].polarity; 876 - dest = iosapic_intr_info[vector].dest; 877 - printk(KERN_INFO 878 - "GSI %u (%s, %s) -> CPU %d (0x%04x)" 879 - " vector %d unregistered\n", 880 - gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), 881 - (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 882 - cpu_logical_id(dest), dest, vector); 883 - 884 - if (list_empty(&iosapic_intr_info[vector].rtes)) { 885 - /* Sanity check */ 886 - BUG_ON(iosapic_intr_info[vector].count); 887 - 888 - /* Clear the interrupt controller descriptor */ 889 - idesc->chip = &no_irq_type; 890 - 917 + if (iosapic_intr_info[irq].count == 0) { 891 918 #ifdef CONFIG_SMP 892 - /* Clear affinity */ 893 - cpus_setall(idesc->affinity); 919 + /* Clear affinity */ 920 + cpus_setall(idesc->affinity); 894 921 #endif 922 + /* Clear the interrupt information */ 923 + iosapic_intr_info[irq].dest = 0; 924 + iosapic_intr_info[irq].dmode = 0; 925 + iosapic_intr_info[irq].polarity = 0; 926 + iosapic_intr_info[irq].trigger = 0; 927 + iosapic_intr_info[irq].low32 |= IOSAPIC_MASK; 895 928 896 - /* Clear the interrupt information */ 897 - memset(&iosapic_intr_info[vector], 0, 898 - sizeof(struct iosapic_intr_info)); 899 - iosapic_intr_info[vector].low32 |= IOSAPIC_MASK; 900 - INIT_LIST_HEAD(&iosapic_intr_info[vector].rtes); 901 - 902 - if (idesc->action) { 903 - printk(KERN_ERR 904 - "interrupt handlers still exist on" 905 - "IRQ %u\n", irq); 906 - WARN_ON(1); 907 - } 908 - 909 - /* Free the interrupt vector */ 910 - free_irq_vector(vector); 911 - } 929 + /* Destroy and reserve IRQ */ 930 + destroy_and_reserve_irq(irq); 912 931 } 913 932 out: 914 - spin_unlock(&iosapic_lock); 915 - spin_unlock_irqrestore(&idesc->lock, flags); 933 + spin_unlock_irqrestore(&iosapic_lock, flags); 916 934 } 917 935 918 936 /* ··· 903 965 { 904 966 static const char * const name[] = {"unknown", "PMI", "INIT", "CPEI"}; 905 967 unsigned char delivery; 906 - int vector, mask = 0; 968 + int irq, vector, mask = 0; 907 969 unsigned int dest = ((id << 8) | eid) & 0xffff; 908 970 909 971 switch (int_type) { 910 972 case ACPI_INTERRUPT_PMI: 911 - vector = iosapic_vector; 973 + irq = vector = iosapic_vector; 974 + bind_irq_vector(irq, vector, CPU_MASK_ALL); 912 975 /* 913 976 * since PMI vector is alloc'd by FW(ACPI) not by kernel, 914 977 * we need to make sure the vector is available 915 978 */ 916 - iosapic_reassign_vector(vector); 979 + iosapic_reassign_vector(irq); 917 980 delivery = IOSAPIC_PMI; 918 981 break; 919 982 case ACPI_INTERRUPT_INIT: 920 - vector = assign_irq_vector(AUTO_ASSIGN); 921 - if (vector < 0) 983 + irq = create_irq(); 984 + if (irq < 0) 922 985 panic("%s: out of interrupt vectors!\n", __FUNCTION__); 986 + vector = irq_to_vector(irq); 923 987 delivery = IOSAPIC_INIT; 924 988 break; 925 989 case ACPI_INTERRUPT_CPEI: 926 - vector = IA64_CPE_VECTOR; 990 + irq = vector = IA64_CPE_VECTOR; 991 + BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL)); 927 992 delivery = IOSAPIC_LOWEST_PRIORITY; 928 993 mask = 1; 929 994 break; ··· 936 995 return -1; 937 996 } 938 997 939 - register_intr(gsi, vector, delivery, polarity, trigger); 998 + register_intr(gsi, irq, delivery, polarity, trigger); 940 999 941 1000 printk(KERN_INFO 942 1001 "PLATFORM int %s (0x%x): GSI %u (%s, %s) -> CPU %d (0x%04x)" ··· 946 1005 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 947 1006 cpu_logical_id(dest), dest, vector); 948 1007 949 - set_rte(gsi, vector, dest, mask); 1008 + set_rte(gsi, irq, dest, mask); 950 1009 return vector; 951 1010 } 952 1011 ··· 958 1017 unsigned long polarity, 959 1018 unsigned long trigger) 960 1019 { 961 - int vector; 1020 + int vector, irq; 962 1021 unsigned int dest = cpu_physical_id(smp_processor_id()); 963 1022 964 - vector = isa_irq_to_vector(isa_irq); 965 - 966 - register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, polarity, trigger); 1023 + irq = vector = isa_irq_to_vector(isa_irq); 1024 + BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL)); 1025 + register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, polarity, trigger); 967 1026 968 1027 DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n", 969 1028 isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level", 970 1029 polarity == IOSAPIC_POL_HIGH ? "high" : "low", 971 1030 cpu_logical_id(dest), dest, vector); 972 1031 973 - set_rte(gsi, vector, dest, 1); 1032 + set_rte(gsi, irq, dest, 1); 974 1033 } 975 1034 976 1035 void __init 977 1036 iosapic_system_init (int system_pcat_compat) 978 1037 { 979 - int vector; 1038 + int irq; 980 1039 981 - for (vector = 0; vector < IA64_NUM_VECTORS; ++vector) { 982 - iosapic_intr_info[vector].low32 = IOSAPIC_MASK; 1040 + for (irq = 0; irq < NR_IRQS; ++irq) { 1041 + iosapic_intr_info[irq].low32 = IOSAPIC_MASK; 983 1042 /* mark as unused */ 984 - INIT_LIST_HEAD(&iosapic_intr_info[vector].rtes); 1043 + INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes); 1044 + 1045 + iosapic_intr_info[irq].count = 0; 985 1046 } 986 1047 987 1048 pcat_compat = system_pcat_compat; ··· 1051 1108 unsigned long flags; 1052 1109 1053 1110 spin_lock_irqsave(&iosapic_lock, flags); 1054 - { 1055 - addr = ioremap(phys_addr, 0); 1056 - ver = iosapic_version(addr); 1057 - 1058 - if ((err = iosapic_check_gsi_range(gsi_base, ver))) { 1059 - iounmap(addr); 1060 - spin_unlock_irqrestore(&iosapic_lock, flags); 1061 - return err; 1062 - } 1063 - 1064 - /* 1065 - * The MAX_REDIR register holds the highest input pin 1066 - * number (starting from 0). 1067 - * We add 1 so that we can use it for number of pins (= RTEs) 1068 - */ 1069 - num_rte = ((ver >> 16) & 0xff) + 1; 1070 - 1071 - index = iosapic_alloc(); 1072 - iosapic_lists[index].addr = addr; 1073 - iosapic_lists[index].gsi_base = gsi_base; 1074 - iosapic_lists[index].num_rte = num_rte; 1075 - #ifdef CONFIG_NUMA 1076 - iosapic_lists[index].node = MAX_NUMNODES; 1077 - #endif 1111 + index = find_iosapic(gsi_base); 1112 + if (index >= 0) { 1113 + spin_unlock_irqrestore(&iosapic_lock, flags); 1114 + return -EBUSY; 1078 1115 } 1116 + 1117 + addr = ioremap(phys_addr, 0); 1118 + ver = iosapic_version(addr); 1119 + if ((err = iosapic_check_gsi_range(gsi_base, ver))) { 1120 + iounmap(addr); 1121 + spin_unlock_irqrestore(&iosapic_lock, flags); 1122 + return err; 1123 + } 1124 + 1125 + /* 1126 + * The MAX_REDIR register holds the highest input pin number 1127 + * (starting from 0). We add 1 so that we can use it for 1128 + * number of pins (= RTEs) 1129 + */ 1130 + num_rte = ((ver >> 16) & 0xff) + 1; 1131 + 1132 + index = iosapic_alloc(); 1133 + iosapic_lists[index].addr = addr; 1134 + iosapic_lists[index].gsi_base = gsi_base; 1135 + iosapic_lists[index].num_rte = num_rte; 1136 + #ifdef CONFIG_NUMA 1137 + iosapic_lists[index].node = MAX_NUMNODES; 1138 + #endif 1139 + spin_lock_init(&iosapic_lists[index].lock); 1079 1140 spin_unlock_irqrestore(&iosapic_lock, flags); 1080 1141 1081 1142 if ((gsi_base == 0) && pcat_compat) { ··· 1104 1157 unsigned long flags; 1105 1158 1106 1159 spin_lock_irqsave(&iosapic_lock, flags); 1107 - { 1108 - index = find_iosapic(gsi_base); 1109 - if (index < 0) { 1110 - printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n", 1111 - __FUNCTION__, gsi_base); 1112 - goto out; 1113 - } 1114 - 1115 - if (iosapic_lists[index].rtes_inuse) { 1116 - err = -EBUSY; 1117 - printk(KERN_WARNING 1118 - "%s: IOSAPIC for GSI base %u is busy\n", 1119 - __FUNCTION__, gsi_base); 1120 - goto out; 1121 - } 1122 - 1123 - iounmap(iosapic_lists[index].addr); 1124 - iosapic_free(index); 1160 + index = find_iosapic(gsi_base); 1161 + if (index < 0) { 1162 + printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n", 1163 + __FUNCTION__, gsi_base); 1164 + goto out; 1125 1165 } 1166 + 1167 + if (iosapic_lists[index].rtes_inuse) { 1168 + err = -EBUSY; 1169 + printk(KERN_WARNING "%s: IOSAPIC for GSI base %u is busy\n", 1170 + __FUNCTION__, gsi_base); 1171 + goto out; 1172 + } 1173 + 1174 + iounmap(iosapic_lists[index].addr); 1175 + iosapic_free(index); 1126 1176 out: 1127 1177 spin_unlock_irqrestore(&iosapic_lock, flags); 1128 1178 return err;
+1 -1
arch/ia64/kernel/irq.c
··· 35 35 #ifdef CONFIG_IA64_GENERIC 36 36 unsigned int __ia64_local_vector_to_irq (ia64_vector vec) 37 37 { 38 - return (unsigned int) vec; 38 + return __get_cpu_var(vector_irq)[vec]; 39 39 } 40 40 #endif 41 41
+281 -34
arch/ia64/kernel/irq_ia64.c
··· 46 46 47 47 #define IRQ_DEBUG 0 48 48 49 + #define IRQ_VECTOR_UNASSIGNED (0) 50 + 51 + #define IRQ_UNUSED (0) 52 + #define IRQ_USED (1) 53 + #define IRQ_RSVD (2) 54 + 49 55 /* These can be overridden in platform_irq_init */ 50 56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR; 51 57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR; ··· 59 53 /* default base addr of IPI table */ 60 54 void __iomem *ipi_base_addr = ((void __iomem *) 61 55 (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR)); 56 + 57 + static cpumask_t vector_allocation_domain(int cpu); 62 58 63 59 /* 64 60 * Legacy IRQ to IA-64 vector translation table. ··· 72 64 }; 73 65 EXPORT_SYMBOL(isa_irq_to_vector_map); 74 66 75 - static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_MAX_DEVICE_VECTORS)]; 67 + DEFINE_SPINLOCK(vector_lock); 68 + 69 + struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { 70 + [0 ... NR_IRQS - 1] = { 71 + .vector = IRQ_VECTOR_UNASSIGNED, 72 + .domain = CPU_MASK_NONE 73 + } 74 + }; 75 + 76 + DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = { 77 + [0 ... IA64_NUM_VECTORS - 1] = IA64_SPURIOUS_INT_VECTOR 78 + }; 79 + 80 + static cpumask_t vector_table[IA64_MAX_DEVICE_VECTORS] = { 81 + [0 ... IA64_MAX_DEVICE_VECTORS - 1] = CPU_MASK_NONE 82 + }; 83 + 84 + static int irq_status[NR_IRQS] = { 85 + [0 ... NR_IRQS -1] = IRQ_UNUSED 86 + }; 87 + 88 + int check_irq_used(int irq) 89 + { 90 + if (irq_status[irq] == IRQ_USED) 91 + return 1; 92 + 93 + return -1; 94 + } 95 + 96 + static void reserve_irq(unsigned int irq) 97 + { 98 + unsigned long flags; 99 + 100 + spin_lock_irqsave(&vector_lock, flags); 101 + irq_status[irq] = IRQ_RSVD; 102 + spin_unlock_irqrestore(&vector_lock, flags); 103 + } 104 + 105 + static inline int find_unassigned_irq(void) 106 + { 107 + int irq; 108 + 109 + for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) 110 + if (irq_status[irq] == IRQ_UNUSED) 111 + return irq; 112 + return -ENOSPC; 113 + } 114 + 115 + static inline int find_unassigned_vector(cpumask_t domain) 116 + { 117 + cpumask_t mask; 118 + int pos; 119 + 120 + cpus_and(mask, domain, cpu_online_map); 121 + if (cpus_empty(mask)) 122 + return -EINVAL; 123 + 124 + for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) { 125 + cpus_and(mask, domain, vector_table[pos]); 126 + if (!cpus_empty(mask)) 127 + continue; 128 + return IA64_FIRST_DEVICE_VECTOR + pos; 129 + } 130 + return -ENOSPC; 131 + } 132 + 133 + static int __bind_irq_vector(int irq, int vector, cpumask_t domain) 134 + { 135 + cpumask_t mask; 136 + int cpu, pos; 137 + struct irq_cfg *cfg = &irq_cfg[irq]; 138 + 139 + cpus_and(mask, domain, cpu_online_map); 140 + if (cpus_empty(mask)) 141 + return -EINVAL; 142 + if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain)) 143 + return 0; 144 + if (cfg->vector != IRQ_VECTOR_UNASSIGNED) 145 + return -EBUSY; 146 + for_each_cpu_mask(cpu, mask) 147 + per_cpu(vector_irq, cpu)[vector] = irq; 148 + cfg->vector = vector; 149 + cfg->domain = domain; 150 + irq_status[irq] = IRQ_USED; 151 + pos = vector - IA64_FIRST_DEVICE_VECTOR; 152 + cpus_or(vector_table[pos], vector_table[pos], domain); 153 + return 0; 154 + } 155 + 156 + int bind_irq_vector(int irq, int vector, cpumask_t domain) 157 + { 158 + unsigned long flags; 159 + int ret; 160 + 161 + spin_lock_irqsave(&vector_lock, flags); 162 + ret = __bind_irq_vector(irq, vector, domain); 163 + spin_unlock_irqrestore(&vector_lock, flags); 164 + return ret; 165 + } 166 + 167 + static void __clear_irq_vector(int irq) 168 + { 169 + int vector, cpu, pos; 170 + cpumask_t mask; 171 + cpumask_t domain; 172 + struct irq_cfg *cfg = &irq_cfg[irq]; 173 + 174 + BUG_ON((unsigned)irq >= NR_IRQS); 175 + BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED); 176 + vector = cfg->vector; 177 + domain = cfg->domain; 178 + cpus_and(mask, cfg->domain, cpu_online_map); 179 + for_each_cpu_mask(cpu, mask) 180 + per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR; 181 + cfg->vector = IRQ_VECTOR_UNASSIGNED; 182 + cfg->domain = CPU_MASK_NONE; 183 + irq_status[irq] = IRQ_UNUSED; 184 + pos = vector - IA64_FIRST_DEVICE_VECTOR; 185 + cpus_andnot(vector_table[pos], vector_table[pos], domain); 186 + } 187 + 188 + static void clear_irq_vector(int irq) 189 + { 190 + unsigned long flags; 191 + 192 + spin_lock_irqsave(&vector_lock, flags); 193 + __clear_irq_vector(irq); 194 + spin_unlock_irqrestore(&vector_lock, flags); 195 + } 76 196 77 197 int 78 198 assign_irq_vector (int irq) 79 199 { 80 - int pos, vector; 81 - again: 82 - pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS); 83 - vector = IA64_FIRST_DEVICE_VECTOR + pos; 84 - if (vector > IA64_LAST_DEVICE_VECTOR) 85 - return -ENOSPC; 86 - if (test_and_set_bit(pos, ia64_vector_mask)) 87 - goto again; 200 + unsigned long flags; 201 + int vector, cpu; 202 + cpumask_t domain; 203 + 204 + vector = -ENOSPC; 205 + 206 + spin_lock_irqsave(&vector_lock, flags); 207 + if (irq < 0) { 208 + goto out; 209 + } 210 + for_each_online_cpu(cpu) { 211 + domain = vector_allocation_domain(cpu); 212 + vector = find_unassigned_vector(domain); 213 + if (vector >= 0) 214 + break; 215 + } 216 + if (vector < 0) 217 + goto out; 218 + BUG_ON(__bind_irq_vector(irq, vector, domain)); 219 + out: 220 + spin_unlock_irqrestore(&vector_lock, flags); 88 221 return vector; 89 222 } 90 223 91 224 void 92 225 free_irq_vector (int vector) 93 226 { 94 - int pos; 95 - 96 - if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR) 227 + if (vector < IA64_FIRST_DEVICE_VECTOR || 228 + vector > IA64_LAST_DEVICE_VECTOR) 97 229 return; 98 - 99 - pos = vector - IA64_FIRST_DEVICE_VECTOR; 100 - if (!test_and_clear_bit(pos, ia64_vector_mask)) 101 - printk(KERN_WARNING "%s: double free!\n", __FUNCTION__); 230 + clear_irq_vector(vector); 102 231 } 103 232 104 233 int 105 234 reserve_irq_vector (int vector) 106 235 { 107 - int pos; 108 - 109 236 if (vector < IA64_FIRST_DEVICE_VECTOR || 110 237 vector > IA64_LAST_DEVICE_VECTOR) 111 238 return -EINVAL; 239 + return !!bind_irq_vector(vector, vector, CPU_MASK_ALL); 240 + } 112 241 113 - pos = vector - IA64_FIRST_DEVICE_VECTOR; 114 - return test_and_set_bit(pos, ia64_vector_mask); 242 + /* 243 + * Initialize vector_irq on a new cpu. This function must be called 244 + * with vector_lock held. 245 + */ 246 + void __setup_vector_irq(int cpu) 247 + { 248 + int irq, vector; 249 + 250 + /* Clear vector_irq */ 251 + for (vector = 0; vector < IA64_NUM_VECTORS; ++vector) 252 + per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR; 253 + /* Mark the inuse vectors */ 254 + for (irq = 0; irq < NR_IRQS; ++irq) { 255 + if (!cpu_isset(cpu, irq_cfg[irq].domain)) 256 + continue; 257 + vector = irq_to_vector(irq); 258 + per_cpu(vector_irq, cpu)[vector] = irq; 259 + } 260 + } 261 + 262 + #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG)) 263 + static enum vector_domain_type { 264 + VECTOR_DOMAIN_NONE, 265 + VECTOR_DOMAIN_PERCPU 266 + } vector_domain_type = VECTOR_DOMAIN_NONE; 267 + 268 + static cpumask_t vector_allocation_domain(int cpu) 269 + { 270 + if (vector_domain_type == VECTOR_DOMAIN_PERCPU) 271 + return cpumask_of_cpu(cpu); 272 + return CPU_MASK_ALL; 273 + } 274 + 275 + static int __init parse_vector_domain(char *arg) 276 + { 277 + if (!arg) 278 + return -EINVAL; 279 + if (!strcmp(arg, "percpu")) { 280 + vector_domain_type = VECTOR_DOMAIN_PERCPU; 281 + no_int_routing = 1; 282 + } 283 + return 1; 284 + } 285 + early_param("vector", parse_vector_domain); 286 + #else 287 + static cpumask_t vector_allocation_domain(int cpu) 288 + { 289 + return CPU_MASK_ALL; 290 + } 291 + #endif 292 + 293 + 294 + void destroy_and_reserve_irq(unsigned int irq) 295 + { 296 + dynamic_irq_cleanup(irq); 297 + 298 + clear_irq_vector(irq); 299 + reserve_irq(irq); 300 + } 301 + 302 + static int __reassign_irq_vector(int irq, int cpu) 303 + { 304 + struct irq_cfg *cfg = &irq_cfg[irq]; 305 + int vector; 306 + cpumask_t domain; 307 + 308 + if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu)) 309 + return -EINVAL; 310 + if (cpu_isset(cpu, cfg->domain)) 311 + return 0; 312 + domain = vector_allocation_domain(cpu); 313 + vector = find_unassigned_vector(domain); 314 + if (vector < 0) 315 + return -ENOSPC; 316 + __clear_irq_vector(irq); 317 + BUG_ON(__bind_irq_vector(irq, vector, domain)); 318 + return 0; 319 + } 320 + 321 + int reassign_irq_vector(int irq, int cpu) 322 + { 323 + unsigned long flags; 324 + int ret; 325 + 326 + spin_lock_irqsave(&vector_lock, flags); 327 + ret = __reassign_irq_vector(irq, cpu); 328 + spin_unlock_irqrestore(&vector_lock, flags); 329 + return ret; 115 330 } 116 331 117 332 /* ··· 342 111 */ 343 112 int create_irq(void) 344 113 { 345 - int vector = assign_irq_vector(AUTO_ASSIGN); 114 + unsigned long flags; 115 + int irq, vector, cpu; 116 + cpumask_t domain; 346 117 347 - if (vector >= 0) 348 - dynamic_irq_init(vector); 349 - 350 - return vector; 118 + irq = vector = -ENOSPC; 119 + spin_lock_irqsave(&vector_lock, flags); 120 + for_each_online_cpu(cpu) { 121 + domain = vector_allocation_domain(cpu); 122 + vector = find_unassigned_vector(domain); 123 + if (vector >= 0) 124 + break; 125 + } 126 + if (vector < 0) 127 + goto out; 128 + irq = find_unassigned_irq(); 129 + if (irq < 0) 130 + goto out; 131 + BUG_ON(__bind_irq_vector(irq, vector, domain)); 132 + out: 133 + spin_unlock_irqrestore(&vector_lock, flags); 134 + if (irq >= 0) 135 + dynamic_irq_init(irq); 136 + return irq; 351 137 } 352 138 353 139 void destroy_irq(unsigned int irq) 354 140 { 355 141 dynamic_irq_cleanup(irq); 356 - free_irq_vector(irq); 142 + clear_irq_vector(irq); 357 143 } 358 144 359 145 #ifdef CONFIG_SMP ··· 549 301 irq_desc_t *desc; 550 302 unsigned int irq; 551 303 552 - for (irq = 0; irq < NR_IRQS; ++irq) 553 - if (irq_to_vector(irq) == vec) { 554 - desc = irq_desc + irq; 555 - desc->status |= IRQ_PER_CPU; 556 - desc->chip = &irq_type_ia64_lsapic; 557 - if (action) 558 - setup_irq(irq, action); 559 - } 304 + irq = vec; 305 + BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); 306 + desc = irq_desc + irq; 307 + desc->status |= IRQ_PER_CPU; 308 + desc->chip = &irq_type_ia64_lsapic; 309 + if (action) 310 + setup_irq(irq, action); 560 311 } 561 312 562 313 void __init
+19 -4
arch/ia64/kernel/msi_ia64.c
··· 13 13 14 14 #define MSI_DATA_VECTOR_SHIFT 0 15 15 #define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT) 16 + #define MSI_DATA_VECTOR_MASK 0xffffff00 16 17 17 18 #define MSI_DATA_DELIVERY_SHIFT 8 18 19 #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_SHIFT) ··· 51 50 static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask) 52 51 { 53 52 struct msi_msg msg; 54 - u32 addr; 53 + u32 addr, data; 54 + int cpu = first_cpu(cpu_mask); 55 + 56 + if (!cpu_online(cpu)) 57 + return; 58 + 59 + if (reassign_irq_vector(irq, cpu)) 60 + return; 55 61 56 62 read_msi_msg(irq, &msg); 57 63 58 64 addr = msg.address_lo; 59 65 addr &= MSI_ADDR_DESTID_MASK; 60 - addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(first_cpu(cpu_mask))); 66 + addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu)); 61 67 msg.address_lo = addr; 62 68 69 + data = msg.data; 70 + data &= MSI_DATA_VECTOR_MASK; 71 + data |= MSI_DATA_VECTOR(irq_to_vector(irq)); 72 + msg.data = data; 73 + 63 74 write_msi_msg(irq, &msg); 64 - irq_desc[irq].affinity = cpu_mask; 75 + irq_desc[irq].affinity = cpumask_of_cpu(cpu); 65 76 } 66 77 #endif /* CONFIG_SMP */ 67 78 ··· 82 69 struct msi_msg msg; 83 70 unsigned long dest_phys_id; 84 71 int irq, vector; 72 + cpumask_t mask; 85 73 86 74 irq = create_irq(); 87 75 if (irq < 0) 88 76 return irq; 89 77 90 78 set_irq_msi(irq, desc); 91 - dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map)); 79 + cpus_and(mask, irq_to_domain(irq), cpu_online_map); 80 + dest_phys_id = cpu_physical_id(first_cpu(mask)); 92 81 vector = irq_to_vector(irq); 93 82 94 83 msg.address_hi = 0;
+4
arch/ia64/kernel/smpboot.c
··· 395 395 fix_b0_for_bsp(); 396 396 397 397 lock_ipi_calllock(); 398 + spin_lock(&vector_lock); 399 + /* Setup the per cpu irq handling data structures */ 400 + __setup_vector_irq(cpuid); 398 401 cpu_set(cpuid, cpu_online_map); 399 402 unlock_ipi_calllock(); 400 403 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 404 + spin_unlock(&vector_lock); 401 405 402 406 smp_setup_percpu_timer(); 403 407
+88 -8
arch/ia64/kernel/time.c
··· 19 19 #include <linux/interrupt.h> 20 20 #include <linux/efi.h> 21 21 #include <linux/timex.h> 22 + #include <linux/clocksource.h> 22 23 23 24 #include <asm/machvec.h> 24 25 #include <asm/delay.h> ··· 28 27 #include <asm/sal.h> 29 28 #include <asm/sections.h> 30 29 #include <asm/system.h> 30 + 31 + #include "fsyscall_gtod_data.h" 32 + 33 + static cycle_t itc_get_cycles(void); 34 + 35 + struct fsyscall_gtod_data_t fsyscall_gtod_data = { 36 + .lock = SEQLOCK_UNLOCKED, 37 + }; 38 + 39 + struct itc_jitter_data_t itc_jitter_data; 31 40 32 41 volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */ 33 42 ··· 48 37 49 38 #endif 50 39 51 - static struct time_interpolator itc_interpolator = { 52 - .shift = 16, 53 - .mask = 0xffffffffffffffffLL, 54 - .source = TIME_SOURCE_CPU 40 + static struct clocksource clocksource_itc = { 41 + .name = "itc", 42 + .rating = 350, 43 + .read = itc_get_cycles, 44 + .mask = 0xffffffffffffffff, 45 + .mult = 0, /*to be caluclated*/ 46 + .shift = 16, 47 + .flags = CLOCK_SOURCE_IS_CONTINUOUS, 55 48 }; 49 + static struct clocksource *itc_clocksource; 56 50 57 51 static irqreturn_t 58 52 timer_interrupt (int irq, void *dev_id) ··· 226 210 + itc_freq/2)/itc_freq; 227 211 228 212 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { 229 - itc_interpolator.frequency = local_cpu_data->itc_freq; 230 - itc_interpolator.drift = itc_drift; 231 213 #ifdef CONFIG_SMP 232 214 /* On IA64 in an SMP configuration ITCs are never accurately synchronized. 233 215 * Jitter compensation requires a cmpxchg which may limit ··· 237 223 * even going backward) if the ITC offsets between the individual CPUs 238 224 * are too large. 239 225 */ 240 - if (!nojitter) itc_interpolator.jitter = 1; 226 + if (!nojitter) 227 + itc_jitter_data.itc_jitter = 1; 241 228 #endif 242 - register_time_interpolator(&itc_interpolator); 243 229 } 244 230 245 231 /* Setup the CPU local timer tick */ 246 232 ia64_cpu_local_tick(); 233 + 234 + if (!itc_clocksource) { 235 + /* Sort out mult/shift values: */ 236 + clocksource_itc.mult = 237 + clocksource_hz2mult(local_cpu_data->itc_freq, 238 + clocksource_itc.shift); 239 + clocksource_register(&clocksource_itc); 240 + itc_clocksource = &clocksource_itc; 241 + } 247 242 } 243 + 244 + static cycle_t itc_get_cycles() 245 + { 246 + u64 lcycle, now, ret; 247 + 248 + if (!itc_jitter_data.itc_jitter) 249 + return get_cycles(); 250 + 251 + lcycle = itc_jitter_data.itc_lastcycle; 252 + now = get_cycles(); 253 + if (lcycle && time_after(lcycle, now)) 254 + return lcycle; 255 + 256 + /* 257 + * Keep track of the last timer value returned. 258 + * In an SMP environment, you could lose out in contention of 259 + * cmpxchg. If so, your cmpxchg returns new value which the 260 + * winner of contention updated to. Use the new value instead. 261 + */ 262 + ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now); 263 + if (unlikely(ret != lcycle)) 264 + return ret; 265 + 266 + return now; 267 + } 268 + 248 269 249 270 static struct irqaction timer_irqaction = { 250 271 .handler = timer_interrupt, ··· 356 307 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) 357 308 ia64_printk_clock = ia64_itc_printk_clock; 358 309 } 310 + 311 + void update_vsyscall(struct timespec *wall, struct clocksource *c) 312 + { 313 + unsigned long flags; 314 + 315 + write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags); 316 + 317 + /* copy fsyscall clock data */ 318 + fsyscall_gtod_data.clk_mask = c->mask; 319 + fsyscall_gtod_data.clk_mult = c->mult; 320 + fsyscall_gtod_data.clk_shift = c->shift; 321 + fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio; 322 + fsyscall_gtod_data.clk_cycle_last = c->cycle_last; 323 + 324 + /* copy kernel time structures */ 325 + fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec; 326 + fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec; 327 + fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec 328 + + wall->tv_sec; 329 + fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec 330 + + wall->tv_nsec; 331 + 332 + /* normalize */ 333 + while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) { 334 + fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC; 335 + fsyscall_gtod_data.monotonic_time.tv_sec++; 336 + } 337 + 338 + write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags); 339 + } 340 +
+21 -8
arch/ia64/sn/kernel/sn2/timer.c
··· 11 11 #include <linux/sched.h> 12 12 #include <linux/time.h> 13 13 #include <linux/interrupt.h> 14 + #include <linux/clocksource.h> 14 15 15 16 #include <asm/hw_irq.h> 16 17 #include <asm/system.h> ··· 23 22 24 23 extern unsigned long sn_rtc_cycles_per_second; 25 24 26 - static struct time_interpolator sn2_interpolator = { 27 - .drift = -1, 28 - .shift = 10, 29 - .mask = (1LL << 55) - 1, 30 - .source = TIME_SOURCE_MMIO64 25 + static void __iomem *sn2_mc; 26 + 27 + static cycle_t read_sn2(void) 28 + { 29 + return (cycle_t)readq(sn2_mc); 30 + } 31 + 32 + static struct clocksource clocksource_sn2 = { 33 + .name = "sn2_rtc", 34 + .rating = 300, 35 + .read = read_sn2, 36 + .mask = (1LL << 55) - 1, 37 + .mult = 0, 38 + .shift = 10, 39 + .flags = CLOCK_SOURCE_IS_CONTINUOUS, 31 40 }; 32 41 33 42 /* ··· 58 47 59 48 void __init sn_timer_init(void) 60 49 { 61 - sn2_interpolator.frequency = sn_rtc_cycles_per_second; 62 - sn2_interpolator.addr = RTC_COUNTER_ADDR; 63 - register_time_interpolator(&sn2_interpolator); 50 + sn2_mc = RTC_COUNTER_ADDR; 51 + clocksource_sn2.fsys_mmio = RTC_COUNTER_ADDR; 52 + clocksource_sn2.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, 53 + clocksource_sn2.shift); 54 + clocksource_register(&clocksource_sn2); 64 55 65 56 ia64_udelay = &ia64_sn_udelay; 66 57 }
+2 -2
drivers/acpi/processor_idle.c
··· 475 475 /* Get end time (ticks) */ 476 476 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); 477 477 478 - #ifdef CONFIG_GENERIC_TIME 478 + #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC) 479 479 /* TSC halts in C2, so notify users */ 480 480 mark_tsc_unstable("possible TSC halt in C2"); 481 481 #endif ··· 517 517 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); 518 518 } 519 519 520 - #ifdef CONFIG_GENERIC_TIME 520 + #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC) 521 521 /* TSC halts in C3, so notify users */ 522 522 mark_tsc_unstable("TSC halts in C3"); 523 523 #endif
+39 -31
drivers/char/hpet.c
··· 29 29 #include <linux/bcd.h> 30 30 #include <linux/seq_file.h> 31 31 #include <linux/bitops.h> 32 + #include <linux/clocksource.h> 32 33 33 34 #include <asm/current.h> 34 35 #include <asm/uaccess.h> ··· 52 51 53 52 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 54 53 54 + #if BITS_PER_LONG == 64 55 + #define write_counter(V, MC) writeq(V, MC) 56 + #define read_counter(MC) readq(MC) 57 + #else 58 + #define write_counter(V, MC) writel(V, MC) 59 + #define read_counter(MC) readl(MC) 60 + #endif 61 + 55 62 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 63 + 64 + static void __iomem *hpet_mctr; 65 + 66 + static cycle_t read_hpet(void) 67 + { 68 + return (cycle_t)read_counter((void __iomem *)hpet_mctr); 69 + } 70 + 71 + static struct clocksource clocksource_hpet = { 72 + .name = "hpet", 73 + .rating = 250, 74 + .read = read_hpet, 75 + .mask = 0xffffffffffffffff, 76 + .mult = 0, /*to be caluclated*/ 77 + .shift = 10, 78 + .flags = CLOCK_SOURCE_IS_CONTINUOUS, 79 + }; 80 + static struct clocksource *hpet_clocksource; 56 81 57 82 /* A lock for concurrent access by app and isr hpet activity. */ 58 83 static DEFINE_SPINLOCK(hpet_lock); ··· 106 79 struct hpets *hp_next; 107 80 struct hpet __iomem *hp_hpet; 108 81 unsigned long hp_hpet_phys; 109 - struct time_interpolator *hp_interpolator; 82 + struct clocksource *hp_clocksource; 110 83 unsigned long long hp_tick_freq; 111 84 unsigned long hp_delta; 112 85 unsigned int hp_ntimer; ··· 121 94 #define HPET_PERIODIC 0x0004 122 95 #define HPET_SHARED_IRQ 0x0008 123 96 124 - #if BITS_PER_LONG == 64 125 - #define write_counter(V, MC) writeq(V, MC) 126 - #define read_counter(MC) readq(MC) 127 - #else 128 - #define write_counter(V, MC) writel(V, MC) 129 - #define read_counter(MC) readl(MC) 130 - #endif 131 97 132 98 #ifndef readq 133 99 static inline unsigned long long readq(void __iomem *addr) ··· 757 737 758 738 static struct ctl_table_header *sysctl_header; 759 739 760 - static void hpet_register_interpolator(struct hpets *hpetp) 761 - { 762 - #ifdef CONFIG_TIME_INTERPOLATION 763 - struct time_interpolator *ti; 764 - 765 - ti = kzalloc(sizeof(*ti), GFP_KERNEL); 766 - if (!ti) 767 - return; 768 - 769 - ti->source = TIME_SOURCE_MMIO64; 770 - ti->shift = 10; 771 - ti->addr = &hpetp->hp_hpet->hpet_mc; 772 - ti->frequency = hpetp->hp_tick_freq; 773 - ti->drift = HPET_DRIFT; 774 - ti->mask = -1; 775 - 776 - hpetp->hp_interpolator = ti; 777 - register_time_interpolator(ti); 778 - #endif 779 - } 780 - 781 740 /* 782 741 * Adjustment for when arming the timer with 783 742 * initial conditions. That is, main counter ··· 908 909 } 909 910 910 911 hpetp->hp_delta = hpet_calibrate(hpetp); 911 - hpet_register_interpolator(hpetp); 912 + 913 + if (!hpet_clocksource) { 914 + hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; 915 + CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); 916 + clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, 917 + clocksource_hpet.shift); 918 + clocksource_register(&clocksource_hpet); 919 + hpetp->hp_clocksource = &clocksource_hpet; 920 + hpet_clocksource = &clocksource_hpet; 921 + } 912 922 913 923 return 0; 914 924 } ··· 1003 995 1004 996 static int hpet_acpi_remove(struct acpi_device *device, int type) 1005 997 { 1006 - /* XXX need to unregister interpolator, dealloc mem, etc */ 998 + /* XXX need to unregister clocksource, dealloc mem, etc */ 1007 999 return -EINVAL; 1008 1000 } 1009 1001
+16 -2
include/asm-ia64/hw_irq.h
··· 90 90 extern __u8 isa_irq_to_vector_map[16]; 91 91 #define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)] 92 92 93 + struct irq_cfg { 94 + ia64_vector vector; 95 + cpumask_t domain; 96 + }; 97 + extern spinlock_t vector_lock; 98 + extern struct irq_cfg irq_cfg[NR_IRQS]; 99 + #define irq_to_domain(x) irq_cfg[(x)].domain 100 + DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq); 101 + 93 102 extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */ 94 103 104 + extern int bind_irq_vector(int irq, int vector, cpumask_t domain); 95 105 extern int assign_irq_vector (int irq); /* allocate a free vector */ 96 106 extern void free_irq_vector (int vector); 97 107 extern int reserve_irq_vector (int vector); 108 + extern void __setup_vector_irq(int cpu); 109 + extern int reassign_irq_vector(int irq, int cpu); 98 110 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect); 99 111 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action); 112 + extern int check_irq_used (int irq); 113 + extern void destroy_and_reserve_irq (unsigned int irq); 100 114 101 115 static inline void ia64_resend_irq(unsigned int vector) 102 116 { ··· 127 113 static inline unsigned int 128 114 __ia64_local_vector_to_irq (ia64_vector vec) 129 115 { 130 - return (unsigned int) vec; 116 + return __get_cpu_var(vector_irq)[vec]; 131 117 } 132 118 #endif 133 119 ··· 145 131 static inline ia64_vector 146 132 irq_to_vector (int irq) 147 133 { 148 - return (ia64_vector) irq; 134 + return irq_cfg[irq].vector; 149 135 } 150 136 151 137 /*
+4 -2
include/asm-ia64/iosapic.h
··· 47 47 #define IOSAPIC_MASK_SHIFT 16 48 48 #define IOSAPIC_MASK (1<<IOSAPIC_MASK_SHIFT) 49 49 50 + #define IOSAPIC_VECTOR_MASK 0xffffff00 51 + 50 52 #ifndef __ASSEMBLY__ 51 53 52 54 #ifdef CONFIG_IOSAPIC 53 55 54 56 #define NR_IOSAPICS 256 55 57 56 - static inline unsigned int iosapic_read(char __iomem *iosapic, unsigned int reg) 58 + static inline unsigned int __iosapic_read(char __iomem *iosapic, unsigned int reg) 57 59 { 58 60 writel(reg, iosapic + IOSAPIC_REG_SELECT); 59 61 return readl(iosapic + IOSAPIC_WINDOW); 60 62 } 61 63 62 - static inline void iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) 64 + static inline void __iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) 63 65 { 64 66 writel(reg, iosapic + IOSAPIC_REG_SELECT); 65 67 writel(val, iosapic + IOSAPIC_WINDOW);
+7 -2
include/asm-ia64/irq.h
··· 14 14 #include <linux/types.h> 15 15 #include <linux/cpumask.h> 16 16 17 - #define NR_IRQS 256 18 - #define NR_IRQ_VECTORS NR_IRQS 17 + #define NR_VECTORS 256 18 + 19 + #if (NR_VECTORS + 32 * NR_CPUS) < 1024 20 + #define NR_IRQS (NR_VECTORS + 32 * NR_CPUS) 21 + #else 22 + #define NR_IRQS 1024 23 + #endif 19 24 20 25 static __inline__ int 21 26 irq_canonicalize (int irq)
+4
include/asm-ia64/rwsem.h
··· 21 21 #ifndef _ASM_IA64_RWSEM_H 22 22 #define _ASM_IA64_RWSEM_H 23 23 24 + #ifndef _LINUX_RWSEM_H 25 + #error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead." 26 + #endif 27 + 24 28 #include <linux/list.h> 25 29 #include <linux/spinlock.h> 26 30
+1 -1
include/asm-ia64/unistd.h
··· 292 292 #define __NR_sync_file_range 1300 293 293 #define __NR_tee 1301 294 294 #define __NR_vmsplice 1302 295 - /* 1303 reserved for move_pages */ 295 + #define __NR_fallocate 1303 296 296 #define __NR_getcpu 1304 297 297 #define __NR_epoll_pwait 1305 298 298 #define __NR_utimensat 1306
+6
include/linux/clocksource.h
··· 67 67 unsigned long flags; 68 68 cycle_t (*vread)(void); 69 69 void (*resume)(void); 70 + #ifdef CONFIG_IA64 71 + void *fsys_mmio; /* used by fsyscall asm code */ 72 + #define CLKSRC_FSYS_MMIO_SET(mmio, addr) ((mmio) = (addr)) 73 + #else 74 + #define CLKSRC_FSYS_MMIO_SET(mmio, addr) do { } while (0) 75 + #endif 70 76 71 77 /* timekeeping specific data, ignore */ 72 78 cycle_t cycle_interval;
-60
include/linux/timex.h
··· 224 224 __x < 0 ? -(-__x >> __s) : __x >> __s; \ 225 225 }) 226 226 227 - 228 - #ifdef CONFIG_TIME_INTERPOLATION 229 - 230 - #define TIME_SOURCE_CPU 0 231 - #define TIME_SOURCE_MMIO64 1 232 - #define TIME_SOURCE_MMIO32 2 233 - #define TIME_SOURCE_FUNCTION 3 234 - 235 - /* For proper operations time_interpolator clocks must run slightly slower 236 - * than the standard clock since the interpolator may only correct by having 237 - * time jump forward during a tick. A slower clock is usually a side effect 238 - * of the integer divide of the nanoseconds in a second by the frequency. 239 - * The accuracy of the division can be increased by specifying a shift. 240 - * However, this may cause the clock not to be slow enough. 241 - * The interpolator will self-tune the clock by slowing down if no 242 - * resets occur or speeding up if the time jumps per analysis cycle 243 - * become too high. 244 - * 245 - * Setting jitter compensates for a fluctuating timesource by comparing 246 - * to the last value read from the timesource to insure that an earlier value 247 - * is not returned by a later call. The price to pay 248 - * for the compensation is that the timer routines are not as scalable anymore. 249 - */ 250 - 251 - struct time_interpolator { 252 - u16 source; /* time source flags */ 253 - u8 shift; /* increases accuracy of multiply by shifting. */ 254 - /* Note that bits may be lost if shift is set too high */ 255 - u8 jitter; /* if set compensate for fluctuations */ 256 - u32 nsec_per_cyc; /* set by register_time_interpolator() */ 257 - void *addr; /* address of counter or function */ 258 - cycles_t mask; /* mask the valid bits of the counter */ 259 - unsigned long offset; /* nsec offset at last update of interpolator */ 260 - u64 last_counter; /* counter value in units of the counter at last update */ 261 - cycles_t last_cycle; /* Last timer value if TIME_SOURCE_JITTER is set */ 262 - u64 frequency; /* frequency in counts/second */ 263 - long drift; /* drift in parts-per-million (or -1) */ 264 - unsigned long skips; /* skips forward */ 265 - unsigned long ns_skipped; /* nanoseconds skipped */ 266 - struct time_interpolator *next; 267 - }; 268 - 269 - extern void register_time_interpolator(struct time_interpolator *); 270 - extern void unregister_time_interpolator(struct time_interpolator *); 271 - extern void time_interpolator_reset(void); 272 - extern unsigned long time_interpolator_get_offset(void); 273 - extern void time_interpolator_update(long delta_nsec); 274 - 275 - #else /* !CONFIG_TIME_INTERPOLATION */ 276 - 277 - static inline void time_interpolator_reset(void) 278 - { 279 - } 280 - 281 - static inline void time_interpolator_update(long delta_nsec) 282 - { 283 - } 284 - 285 - #endif /* !CONFIG_TIME_INTERPOLATION */ 286 - 287 227 #define TICK_LENGTH_SHIFT 32 288 228 289 229 #ifdef CONFIG_NO_HZ
-88
kernel/time.c
··· 136 136 write_seqlock_irq(&xtime_lock); 137 137 wall_to_monotonic.tv_sec -= sys_tz.tz_minuteswest * 60; 138 138 xtime.tv_sec += sys_tz.tz_minuteswest * 60; 139 - time_interpolator_reset(); 140 139 write_sequnlock_irq(&xtime_lock); 141 140 clock_was_set(); 142 141 } ··· 308 309 } 309 310 EXPORT_SYMBOL(timespec_trunc); 310 311 311 - #ifdef CONFIG_TIME_INTERPOLATION 312 - void getnstimeofday (struct timespec *tv) 313 - { 314 - unsigned long seq,sec,nsec; 315 - 316 - do { 317 - seq = read_seqbegin(&xtime_lock); 318 - sec = xtime.tv_sec; 319 - nsec = xtime.tv_nsec+time_interpolator_get_offset(); 320 - } while (unlikely(read_seqretry(&xtime_lock, seq))); 321 - 322 - while (unlikely(nsec >= NSEC_PER_SEC)) { 323 - nsec -= NSEC_PER_SEC; 324 - ++sec; 325 - } 326 - tv->tv_sec = sec; 327 - tv->tv_nsec = nsec; 328 - } 329 - EXPORT_SYMBOL_GPL(getnstimeofday); 330 - 331 - int do_settimeofday (struct timespec *tv) 332 - { 333 - time_t wtm_sec, sec = tv->tv_sec; 334 - long wtm_nsec, nsec = tv->tv_nsec; 335 - 336 - if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) 337 - return -EINVAL; 338 - 339 - write_seqlock_irq(&xtime_lock); 340 - { 341 - wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); 342 - wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); 343 - 344 - set_normalized_timespec(&xtime, sec, nsec); 345 - set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); 346 - 347 - time_adjust = 0; /* stop active adjtime() */ 348 - time_status |= STA_UNSYNC; 349 - time_maxerror = NTP_PHASE_LIMIT; 350 - time_esterror = NTP_PHASE_LIMIT; 351 - time_interpolator_reset(); 352 - } 353 - write_sequnlock_irq(&xtime_lock); 354 - clock_was_set(); 355 - return 0; 356 - } 357 - EXPORT_SYMBOL(do_settimeofday); 358 - 359 - void do_gettimeofday (struct timeval *tv) 360 - { 361 - unsigned long seq, nsec, usec, sec, offset; 362 - do { 363 - seq = read_seqbegin(&xtime_lock); 364 - offset = time_interpolator_get_offset(); 365 - sec = xtime.tv_sec; 366 - nsec = xtime.tv_nsec; 367 - } while (unlikely(read_seqretry(&xtime_lock, seq))); 368 - 369 - usec = (nsec + offset) / 1000; 370 - 371 - while (unlikely(usec >= USEC_PER_SEC)) { 372 - usec -= USEC_PER_SEC; 373 - ++sec; 374 - } 375 - 376 - tv->tv_sec = sec; 377 - tv->tv_usec = usec; 378 - 379 - /* 380 - * Make sure xtime.tv_sec [returned by sys_time()] always 381 - * follows the gettimeofday() result precisely. This 382 - * condition is extremely unlikely, it can hit at most 383 - * once per second: 384 - */ 385 - if (unlikely(xtime.tv_sec != tv->tv_sec)) { 386 - unsigned long flags; 387 - 388 - write_seqlock_irqsave(&xtime_lock, flags); 389 - update_wall_time(); 390 - write_sequnlock_irqrestore(&xtime_lock, flags); 391 - } 392 - } 393 - EXPORT_SYMBOL(do_gettimeofday); 394 - 395 - #else /* CONFIG_TIME_INTERPOLATION */ 396 - 397 312 #ifndef CONFIG_GENERIC_TIME 398 313 /* 399 314 * Simulate gettimeofday using do_gettimeofday which only allows a timeval ··· 323 410 } 324 411 EXPORT_SYMBOL_GPL(getnstimeofday); 325 412 #endif 326 - #endif /* CONFIG_TIME_INTERPOLATION */ 327 413 328 414 /* Converts Gregorian date to seconds since 1970-01-01 00:00:00. 329 415 * Assumes input in normal date format, i.e. 1980-12-31 23:59:59
-10
kernel/time/ntp.c
··· 116 116 if (xtime.tv_sec % 86400 == 0) { 117 117 xtime.tv_sec--; 118 118 wall_to_monotonic.tv_sec++; 119 - /* 120 - * The timer interpolator will make time change 121 - * gradually instead of an immediate jump by one second 122 - */ 123 - time_interpolator_update(-NSEC_PER_SEC); 124 119 time_state = TIME_OOP; 125 120 printk(KERN_NOTICE "Clock: inserting leap second " 126 121 "23:59:60 UTC\n"); ··· 125 130 if ((xtime.tv_sec + 1) % 86400 == 0) { 126 131 xtime.tv_sec++; 127 132 wall_to_monotonic.tv_sec--; 128 - /* 129 - * Use of time interpolator for a gradual change of 130 - * time 131 - */ 132 - time_interpolator_update(NSEC_PER_SEC); 133 133 time_state = TIME_WAIT; 134 134 printk(KERN_NOTICE "Clock: deleting leap second " 135 135 "23:59:59 UTC\n");
-4
kernel/time/timekeeping.c
··· 466 466 second_overflow(); 467 467 } 468 468 469 - /* interpolator bits */ 470 - time_interpolator_update(clock->xtime_interval 471 - >> clock->shift); 472 - 473 469 /* accumulate error between NTP and clock interval */ 474 470 clock->error += current_tick_length(); 475 471 clock->error -= clock->xtime_interval << (TICK_LENGTH_SHIFT - clock->shift);
-188
kernel/timer.c
··· 1349 1349 open_softirq(TIMER_SOFTIRQ, run_timer_softirq, NULL); 1350 1350 } 1351 1351 1352 - #ifdef CONFIG_TIME_INTERPOLATION 1353 - 1354 - struct time_interpolator *time_interpolator __read_mostly; 1355 - static struct time_interpolator *time_interpolator_list __read_mostly; 1356 - static DEFINE_SPINLOCK(time_interpolator_lock); 1357 - 1358 - static inline cycles_t time_interpolator_get_cycles(unsigned int src) 1359 - { 1360 - unsigned long (*x)(void); 1361 - 1362 - switch (src) 1363 - { 1364 - case TIME_SOURCE_FUNCTION: 1365 - x = time_interpolator->addr; 1366 - return x(); 1367 - 1368 - case TIME_SOURCE_MMIO64 : 1369 - return readq_relaxed((void __iomem *)time_interpolator->addr); 1370 - 1371 - case TIME_SOURCE_MMIO32 : 1372 - return readl_relaxed((void __iomem *)time_interpolator->addr); 1373 - 1374 - default: return get_cycles(); 1375 - } 1376 - } 1377 - 1378 - static inline u64 time_interpolator_get_counter(int writelock) 1379 - { 1380 - unsigned int src = time_interpolator->source; 1381 - 1382 - if (time_interpolator->jitter) 1383 - { 1384 - cycles_t lcycle; 1385 - cycles_t now; 1386 - 1387 - do { 1388 - lcycle = time_interpolator->last_cycle; 1389 - now = time_interpolator_get_cycles(src); 1390 - if (lcycle && time_after(lcycle, now)) 1391 - return lcycle; 1392 - 1393 - /* When holding the xtime write lock, there's no need 1394 - * to add the overhead of the cmpxchg. Readers are 1395 - * force to retry until the write lock is released. 1396 - */ 1397 - if (writelock) { 1398 - time_interpolator->last_cycle = now; 1399 - return now; 1400 - } 1401 - /* Keep track of the last timer value returned. The use of cmpxchg here 1402 - * will cause contention in an SMP environment. 1403 - */ 1404 - } while (unlikely(cmpxchg(&time_interpolator->last_cycle, lcycle, now) != lcycle)); 1405 - return now; 1406 - } 1407 - else 1408 - return time_interpolator_get_cycles(src); 1409 - } 1410 - 1411 - void time_interpolator_reset(void) 1412 - { 1413 - time_interpolator->offset = 0; 1414 - time_interpolator->last_counter = time_interpolator_get_counter(1); 1415 - } 1416 - 1417 - #define GET_TI_NSECS(count,i) (((((count) - i->last_counter) & (i)->mask) * (i)->nsec_per_cyc) >> (i)->shift) 1418 - 1419 - unsigned long time_interpolator_get_offset(void) 1420 - { 1421 - /* If we do not have a time interpolator set up then just return zero */ 1422 - if (!time_interpolator) 1423 - return 0; 1424 - 1425 - return time_interpolator->offset + 1426 - GET_TI_NSECS(time_interpolator_get_counter(0), time_interpolator); 1427 - } 1428 - 1429 - #define INTERPOLATOR_ADJUST 65536 1430 - #define INTERPOLATOR_MAX_SKIP 10*INTERPOLATOR_ADJUST 1431 - 1432 - void time_interpolator_update(long delta_nsec) 1433 - { 1434 - u64 counter; 1435 - unsigned long offset; 1436 - 1437 - /* If there is no time interpolator set up then do nothing */ 1438 - if (!time_interpolator) 1439 - return; 1440 - 1441 - /* 1442 - * The interpolator compensates for late ticks by accumulating the late 1443 - * time in time_interpolator->offset. A tick earlier than expected will 1444 - * lead to a reset of the offset and a corresponding jump of the clock 1445 - * forward. Again this only works if the interpolator clock is running 1446 - * slightly slower than the regular clock and the tuning logic insures 1447 - * that. 1448 - */ 1449 - 1450 - counter = time_interpolator_get_counter(1); 1451 - offset = time_interpolator->offset + 1452 - GET_TI_NSECS(counter, time_interpolator); 1453 - 1454 - if (delta_nsec < 0 || (unsigned long) delta_nsec < offset) 1455 - time_interpolator->offset = offset - delta_nsec; 1456 - else { 1457 - time_interpolator->skips++; 1458 - time_interpolator->ns_skipped += delta_nsec - offset; 1459 - time_interpolator->offset = 0; 1460 - } 1461 - time_interpolator->last_counter = counter; 1462 - 1463 - /* Tuning logic for time interpolator invoked every minute or so. 1464 - * Decrease interpolator clock speed if no skips occurred and an offset is carried. 1465 - * Increase interpolator clock speed if we skip too much time. 1466 - */ 1467 - if (jiffies % INTERPOLATOR_ADJUST == 0) 1468 - { 1469 - if (time_interpolator->skips == 0 && time_interpolator->offset > tick_nsec) 1470 - time_interpolator->nsec_per_cyc--; 1471 - if (time_interpolator->ns_skipped > INTERPOLATOR_MAX_SKIP && time_interpolator->offset == 0) 1472 - time_interpolator->nsec_per_cyc++; 1473 - time_interpolator->skips = 0; 1474 - time_interpolator->ns_skipped = 0; 1475 - } 1476 - } 1477 - 1478 - static inline int 1479 - is_better_time_interpolator(struct time_interpolator *new) 1480 - { 1481 - if (!time_interpolator) 1482 - return 1; 1483 - return new->frequency > 2*time_interpolator->frequency || 1484 - (unsigned long)new->drift < (unsigned long)time_interpolator->drift; 1485 - } 1486 - 1487 - void 1488 - register_time_interpolator(struct time_interpolator *ti) 1489 - { 1490 - unsigned long flags; 1491 - 1492 - /* Sanity check */ 1493 - BUG_ON(ti->frequency == 0 || ti->mask == 0); 1494 - 1495 - ti->nsec_per_cyc = ((u64)NSEC_PER_SEC << ti->shift) / ti->frequency; 1496 - spin_lock(&time_interpolator_lock); 1497 - write_seqlock_irqsave(&xtime_lock, flags); 1498 - if (is_better_time_interpolator(ti)) { 1499 - time_interpolator = ti; 1500 - time_interpolator_reset(); 1501 - } 1502 - write_sequnlock_irqrestore(&xtime_lock, flags); 1503 - 1504 - ti->next = time_interpolator_list; 1505 - time_interpolator_list = ti; 1506 - spin_unlock(&time_interpolator_lock); 1507 - } 1508 - 1509 - void 1510 - unregister_time_interpolator(struct time_interpolator *ti) 1511 - { 1512 - struct time_interpolator *curr, **prev; 1513 - unsigned long flags; 1514 - 1515 - spin_lock(&time_interpolator_lock); 1516 - prev = &time_interpolator_list; 1517 - for (curr = *prev; curr; curr = curr->next) { 1518 - if (curr == ti) { 1519 - *prev = curr->next; 1520 - break; 1521 - } 1522 - prev = &curr->next; 1523 - } 1524 - 1525 - write_seqlock_irqsave(&xtime_lock, flags); 1526 - if (ti == time_interpolator) { 1527 - /* we lost the best time-interpolator: */ 1528 - time_interpolator = NULL; 1529 - /* find the next-best interpolator */ 1530 - for (curr = time_interpolator_list; curr; curr = curr->next) 1531 - if (is_better_time_interpolator(curr)) 1532 - time_interpolator = curr; 1533 - time_interpolator_reset(); 1534 - } 1535 - write_sequnlock_irqrestore(&xtime_lock, flags); 1536 - spin_unlock(&time_interpolator_lock); 1537 - } 1538 - #endif /* CONFIG_TIME_INTERPOLATION */ 1539 - 1540 1352 /** 1541 1353 * msleep - sleep safely even with waitqueue interruptions 1542 1354 * @msecs: Time in milliseconds to sleep for