commit ef9f2fa17f3d6973a479a7677a023ee3604a52cb · tjh.dev/kernel

tjh.dev / kernel

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegra

* 'for-linus' of git://android.git.kernel.org/kernel/tegra:
ARM: tegra: clock: Add forward reference to struct clk
ARM: tegra: irq: Rename gic pointers to avoid conflicts
arm/tegra: Fix tegra irq_data conversion

Linus Torvalds 15 years ago ef9f2fa1 1f0324ca

+15 -11

4 changed files

expand all

unified split

arch

arm

mach-tegra

gpio.c

include

mach

clk.h

clkdev.h

irq.c

+2 -2

arch/arm/mach-tegra/gpio.c

··· 207 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 208 209 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 210 - __set_irq_handler_unlocked(irq, handle_level_irq); 211 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 212 - __set_irq_handler_unlocked(irq, handle_edge_irq); 213 214 return 0; 215 }

··· 207 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 208 209 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 210 + __set_irq_handler_unlocked(d->irq, handle_level_irq); 211 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 212 + __set_irq_handler_unlocked(d->irq, handle_edge_irq); 213 214 return 0; 215 }

arch/arm/mach-tegra/include/mach/clk.h

··· 20 #ifndef __MACH_CLK_H 21 #define __MACH_CLK_H 22 23 void tegra_periph_reset_deassert(struct clk *c); 24 void tegra_periph_reset_assert(struct clk *c); 25

··· 20 #ifndef __MACH_CLK_H 21 #define __MACH_CLK_H 22 23 + struct clk; 24 + 25 void tegra_periph_reset_deassert(struct clk *c); 26 void tegra_periph_reset_assert(struct clk *c); 27

arch/arm/mach-tegra/include/mach/clkdev.h

··· 20 #ifndef __MACH_CLKDEV_H 21 #define __MACH_CLKDEV_H 22 23 static inline int __clk_get(struct clk *clk) 24 { 25 return 1;

··· 20 #ifndef __MACH_CLKDEV_H 21 #define __MACH_CLKDEV_H 22 23 + struct clk; 24 + 25 static inline int __clk_get(struct clk *clk) 26 { 27 return 1;

+9 -9

arch/arm/mach-tegra/irq.c

··· 46 #define ICTLR_COP_IER_CLR 0x38 47 #define ICTLR_COP_IEP_CLASS 0x3c 48 49 - static void (*gic_mask_irq)(struct irq_data *d); 50 - static void (*gic_unmask_irq)(struct irq_data *d); 51 52 - #define irq_to_ictlr(irq) (((irq)-32) >> 5) 53 static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); 54 - #define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) 55 56 static void tegra_mask(struct irq_data *d) 57 { 58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 59 - gic_mask_irq(d); 60 - writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR); 61 } 62 63 static void tegra_unmask(struct irq_data *d) 64 { 65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 66 - gic_unmask_irq(d); 67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); 68 } 69 ··· 98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 99 100 gic = get_irq_chip(29); 101 - gic_unmask_irq = gic->irq_unmask; 102 - gic_mask_irq = gic->irq_mask; 103 tegra_irq.irq_ack = gic->irq_ack; 104 #ifdef CONFIG_SMP 105 tegra_irq.irq_set_affinity = gic->irq_set_affinity;

··· 46 #define ICTLR_COP_IER_CLR 0x38 47 #define ICTLR_COP_IEP_CLASS 0x3c 48 49 + static void (*tegra_gic_mask_irq)(struct irq_data *d); 50 + static void (*tegra_gic_unmask_irq)(struct irq_data *d); 51 52 + #define irq_to_ictlr(irq) (((irq) - 32) >> 5) 53 static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); 54 + #define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr) * 0x100) 55 56 static void tegra_mask(struct irq_data *d) 57 { 58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 59 + tegra_gic_mask_irq(d); 60 + writel(1 << (d->irq & 31), addr+ICTLR_CPU_IER_CLR); 61 } 62 63 static void tegra_unmask(struct irq_data *d) 64 { 65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 66 + tegra_gic_unmask_irq(d); 67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); 68 } 69 ··· 98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 99 100 gic = get_irq_chip(29); 101 + tegra_gic_unmask_irq = gic->irq_unmask; 102 + tegra_gic_mask_irq = gic->irq_mask; 103 tegra_irq.irq_ack = gic->irq_ack; 104 #ifdef CONFIG_SMP 105 tegra_irq.irq_set_affinity = gic->irq_set_affinity;