Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-3.10a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First set of IIO new drivers and cleanup for the 3.10 cycle.

New stuff

1) Add OF support for specifying mappings between iio devices and their
in kernel consumers.
2) Driver for AD7923 (extra functionality and support for ad7904, ad7914 and
ad7924 added later in series)
3) Driver for Exynos adc (dt suppor for phy added later in series).
4) Make iio_push_event save IRQ context - necessary if it is to be used
within an interrupt handler. Users of this functionality to follow.
5) For iio use the device tree node name to provide the hwmon name attribute
if available.

Removal and moves out of staging

1) Drop the adt7410 driver from IIO now that there is a hmwon driver with
equivalent support. This device is very much targeted at hardware
monitoring so hwmon is a more appropriate host for the driver.
2) Move iio_hwmon driver to drivers/hwmon.

Cleanups

1) Minor cleanup in ST common library.
2) Large set of patches to break the info_mask element which previously used
odd and even bits to specify if a channel attribute was either shared across
similar channels or specific to only one. Now we have two bitmaps, one for
those parameters that are specific to this channel and one for those shared
by all channels with the same type as this one. This has no effect on the
userspace abi. It simplifies the core code and provides more space for new
channel parameters. It has been on the todo list for a long time!

Conflicts:
drivers/iio/dac/ad5064.c

+1716 -1711
+52
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
··· 1 + Samsung Exynos Analog to Digital Converter bindings 2 + 3 + This devicetree binding are for the new adc driver written fori 4 + Exynos4 and upward SoCs from Samsung. 5 + 6 + New driver handles the following 7 + 1. Supports ADC IF found on EXYNOS4412/EXYNOS5250 8 + and future SoCs from Samsung 9 + 2. Add ADC driver under iio/adc framework 10 + 3. Also adds the Documentation for device tree bindings 11 + 12 + Required properties: 13 + - compatible: Must be "samsung,exynos-adc-v1" 14 + for exynos4412/5250 controllers. 15 + Must be "samsung,exynos-adc-v2" for 16 + future controllers. 17 + - reg: Contains ADC register address range (base address and 18 + length) and the address of the phy enable register. 19 + - interrupts: Contains the interrupt information for the timer. The 20 + format is being dependent on which interrupt controller 21 + the Samsung device uses. 22 + - #io-channel-cells = <1>; As ADC has multiple outputs 23 + 24 + Note: child nodes can be added for auto probing from device tree. 25 + 26 + Example: adding device info in dtsi file 27 + 28 + adc: adc@12D10000 { 29 + compatible = "samsung,exynos-adc-v1"; 30 + reg = <0x12D10000 0x100>, <0x10040718 0x4>; 31 + interrupts = <0 106 0>; 32 + #io-channel-cells = <1>; 33 + io-channel-ranges; 34 + }; 35 + 36 + 37 + Example: Adding child nodes in dts file 38 + 39 + adc@12D10000 { 40 + 41 + /* NTC thermistor is a hwmon device */ 42 + ncp15wb473@0 { 43 + compatible = "ntc,ncp15wb473"; 44 + pullup-uV = <1800000>; 45 + pullup-ohm = <47000>; 46 + pulldown-ohm = <0>; 47 + io-channels = <&adc 4>; 48 + }; 49 + }; 50 + 51 + Note: Does not apply to ADC driver under arch/arm/plat-samsung/ 52 + Note: The child node can be added under the adc node or seperately.
+97
Documentation/devicetree/bindings/iio/iio-bindings.txt
··· 1 + This binding is derived from clock bindings, and based on suggestions 2 + from Lars-Peter Clausen [1]. 3 + 4 + Sources of IIO channels can be represented by any node in the device 5 + tree. Those nodes are designated as IIO providers. IIO consumer 6 + nodes use a phandle and IIO specifier pair to connect IIO provider 7 + outputs to IIO inputs. Similar to the gpio specifiers, an IIO 8 + specifier is an array of one or more cells identifying the IIO 9 + output on a device. The length of an IIO specifier is defined by the 10 + value of a #io-channel-cells property in the IIO provider node. 11 + 12 + [1] http://marc.info/?l=linux-iio&m=135902119507483&w=2 13 + 14 + ==IIO providers== 15 + 16 + Required properties: 17 + #io-channel-cells: Number of cells in an IIO specifier; Typically 0 for nodes 18 + with a single IIO output and 1 for nodes with multiple 19 + IIO outputs. 20 + 21 + Example for a simple configuration with no trigger: 22 + 23 + adc: voltage-sensor@35 { 24 + compatible = "maxim,max1139"; 25 + reg = <0x35>; 26 + #io-channel-cells = <1>; 27 + }; 28 + 29 + Example for a configuration with trigger: 30 + 31 + adc@35 { 32 + compatible = "some-vendor,some-adc"; 33 + reg = <0x35>; 34 + 35 + adc1: iio-device@0 { 36 + #io-channel-cells = <1>; 37 + /* other properties */ 38 + }; 39 + adc2: iio-device@1 { 40 + #io-channel-cells = <1>; 41 + /* other properties */ 42 + }; 43 + }; 44 + 45 + ==IIO consumers== 46 + 47 + Required properties: 48 + io-channels: List of phandle and IIO specifier pairs, one pair 49 + for each IIO input to the device. Note: if the 50 + IIO provider specifies '0' for #io-channel-cells, 51 + then only the phandle portion of the pair will appear. 52 + 53 + Optional properties: 54 + io-channel-names: 55 + List of IIO input name strings sorted in the same 56 + order as the io-channels property. Consumers drivers 57 + will use io-channel-names to match IIO input names 58 + with IIO specifiers. 59 + io-channel-ranges: 60 + Empty property indicating that child nodes can inherit named 61 + IIO channels from this node. Useful for bus nodes to provide 62 + and IIO channel to their children. 63 + 64 + For example: 65 + 66 + device { 67 + io-channels = <&adc 1>, <&ref 0>; 68 + io-channel-names = "vcc", "vdd"; 69 + }; 70 + 71 + This represents a device with two IIO inputs, named "vcc" and "vdd". 72 + The vcc channel is connected to output 1 of the &adc device, and the 73 + vdd channel is connected to output 0 of the &ref device. 74 + 75 + ==Example== 76 + 77 + adc: max1139@35 { 78 + compatible = "maxim,max1139"; 79 + reg = <0x35>; 80 + #io-channel-cells = <1>; 81 + }; 82 + 83 + ... 84 + 85 + iio_hwmon { 86 + compatible = "iio-hwmon"; 87 + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, 88 + <&adc 3>, <&adc 4>, <&adc 5>, 89 + <&adc 6>, <&adc 7>, <&adc 8>, 90 + <&adc 9>; 91 + }; 92 + 93 + some_consumer { 94 + compatible = "some-consumer"; 95 + io-channels = <&adc 10>, <&adc 11>; 96 + io-channel-names = "adc1", "adc2"; 97 + };
+9
drivers/hwmon/Kconfig
··· 499 499 This driver can also be built as a module. If so, the module 500 500 will be called ibmpex. 501 501 502 + config SENSORS_IIO_HWMON 503 + tristate "Hwmon driver that uses channels specified via iio maps" 504 + depends on IIO 505 + help 506 + This is a platform driver that in combination with a suitable 507 + map allows IIO devices to provide basic hwmon functionality 508 + for those channels specified in the map. This map can be provided 509 + either via platform data or the device tree bindings. 510 + 502 511 config SENSORS_IT87 503 512 tristate "ITE IT87xx and compatibles" 504 513 depends on !PPC
+1
drivers/hwmon/Makefile
··· 65 65 obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o 66 66 obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o 67 67 obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o 68 + obj-$(CONFIG_SENSORS_IIO_HWMON) += iio_hwmon.o 68 69 obj-$(CONFIG_SENSORS_INA209) += ina209.o 69 70 obj-$(CONFIG_SENSORS_INA2XX) += ina2xx.o 70 71 obj-$(CONFIG_SENSORS_IT87) += it87.o
+12 -12
drivers/iio/accel/hid-sensor-accel-3d.c
··· 60 60 .type = IIO_ACCEL, 61 61 .modified = 1, 62 62 .channel2 = IIO_MOD_X, 63 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 64 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 65 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 66 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 63 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 64 + BIT(IIO_CHAN_INFO_SCALE) | 65 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 66 + BIT(IIO_CHAN_INFO_HYSTERESIS), 67 67 .scan_index = CHANNEL_SCAN_INDEX_X, 68 68 }, { 69 69 .type = IIO_ACCEL, 70 70 .modified = 1, 71 71 .channel2 = IIO_MOD_Y, 72 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 73 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 74 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 75 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 72 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 73 + BIT(IIO_CHAN_INFO_SCALE) | 74 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 75 + BIT(IIO_CHAN_INFO_HYSTERESIS), 76 76 .scan_index = CHANNEL_SCAN_INDEX_Y, 77 77 }, { 78 78 .type = IIO_ACCEL, 79 79 .modified = 1, 80 80 .channel2 = IIO_MOD_Z, 81 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 82 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 83 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 84 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 81 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 82 + BIT(IIO_CHAN_INFO_SCALE) | 83 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 84 + BIT(IIO_CHAN_INFO_HYSTERESIS), 85 85 .scan_index = CHANNEL_SCAN_INDEX_Z, 86 86 } 87 87 };
+3 -3
drivers/iio/accel/kxsd9.c
··· 177 177 .type = IIO_ACCEL, \ 178 178 .modified = 1, \ 179 179 .channel2 = IIO_MOD_##axis, \ 180 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 181 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 180 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 181 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 182 182 .address = KXSD9_REG_##axis, \ 183 183 } 184 184 ··· 186 186 KXSD9_ACCEL_CHAN(X), KXSD9_ACCEL_CHAN(Y), KXSD9_ACCEL_CHAN(Z), 187 187 { 188 188 .type = IIO_VOLTAGE, 189 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 189 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 190 190 .indexed = 1, 191 191 .address = KXSD9_REG_AUX, 192 192 }
+20
drivers/iio/adc/Kconfig
··· 30 30 To compile this driver as a module, choose M here: the 31 31 module will be called ad7298. 32 32 33 + config AD7923 34 + tristate "Analog Devices AD7923 and similar ADCs driver" 35 + depends on SPI 36 + select IIO_BUFFER 37 + select IIO_TRIGGERED_BUFFER 38 + help 39 + Say yes here to build support for Analog Devices 40 + AD7904, AD7914, AD7923, AD7924 4 Channel ADCs. 41 + 42 + To compile this driver as a module, choose M here: the 43 + module will be called ad7923. 44 + 33 45 config AD7791 34 46 tristate "Analog Devices AD7791 ADC driver" 35 47 depends on SPI ··· 102 90 select SYSFS 103 91 help 104 92 Say yes here to build support for Atmel AT91 ADC. 93 + 94 + config EXYNOS_ADC 95 + bool "Exynos ADC driver support" 96 + depends on OF 97 + help 98 + Core support for the ADC block found in the Samsung EXYNOS series 99 + of SoCs for drivers such as the touchscreen and hwmon to use to share 100 + this resource. 105 101 106 102 config LP8788_ADC 107 103 bool "LP8788 ADC driver"
+2
drivers/iio/adc/Makefile
··· 5 5 obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o 6 6 obj-$(CONFIG_AD7266) += ad7266.o 7 7 obj-$(CONFIG_AD7298) += ad7298.o 8 + obj-$(CONFIG_AD7923) += ad7923.o 8 9 obj-$(CONFIG_AD7476) += ad7476.o 9 10 obj-$(CONFIG_AD7791) += ad7791.o 10 11 obj-$(CONFIG_AD7793) += ad7793.o 11 12 obj-$(CONFIG_AD7887) += ad7887.o 12 13 obj-$(CONFIG_AT91_ADC) += at91_adc.o 14 + obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o 13 15 obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o 14 16 obj-$(CONFIG_MAX1363) += max1363.o 15 17 obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
+6 -6
drivers/iio/adc/ad7266.c
··· 201 201 .indexed = 1, \ 202 202 .channel = (_chan), \ 203 203 .address = (_chan), \ 204 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \ 205 - | IIO_CHAN_INFO_SCALE_SHARED_BIT \ 206 - | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \ 204 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 205 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 206 + | BIT(IIO_CHAN_INFO_OFFSET), \ 207 207 .scan_index = (_chan), \ 208 208 .scan_type = { \ 209 209 .sign = (_sign), \ ··· 249 249 .channel = (_chan) * 2, \ 250 250 .channel2 = (_chan) * 2 + 1, \ 251 251 .address = (_chan), \ 252 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \ 253 - | IIO_CHAN_INFO_SCALE_SHARED_BIT \ 254 - | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \ 252 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 253 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 254 + | BIT(IIO_CHAN_INFO_OFFSET), \ 255 255 .scan_index = (_chan), \ 256 256 .scan_type = { \ 257 257 .sign = _sign, \
+5 -5
drivers/iio/adc/ad7298.c
··· 63 63 .type = IIO_VOLTAGE, \ 64 64 .indexed = 1, \ 65 65 .channel = index, \ 66 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 67 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 66 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 67 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 68 68 .address = index, \ 69 69 .scan_index = index, \ 70 70 .scan_type = { \ ··· 80 80 .type = IIO_TEMP, 81 81 .indexed = 1, 82 82 .channel = 0, 83 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 84 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 85 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, 83 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 84 + BIT(IIO_CHAN_INFO_SCALE) | 85 + BIT(IIO_CHAN_INFO_OFFSET), 86 86 .address = AD7298_CH_TEMP, 87 87 .scan_index = -1, 88 88 .scan_type = {
+5 -5
drivers/iio/adc/ad7476.c
··· 140 140 return -EINVAL; 141 141 } 142 142 143 - #define _AD7476_CHAN(bits, _shift, _info_mask) \ 143 + #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \ 144 144 { \ 145 145 .type = IIO_VOLTAGE, \ 146 146 .indexed = 1, \ 147 - .info_mask = _info_mask | \ 148 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 147 + .info_mask_separate = _info_mask_sep, \ 148 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 149 149 .scan_type = { \ 150 150 .sign = 'u', \ 151 151 .realbits = (bits), \ ··· 156 156 } 157 157 158 158 #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \ 159 - IIO_CHAN_INFO_RAW_SEPARATE_BIT) 159 + BIT(IIO_CHAN_INFO_RAW)) 160 160 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \ 161 - IIO_CHAN_INFO_RAW_SEPARATE_BIT) 161 + BIT(IIO_CHAN_INFO_RAW)) 162 162 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0) 163 163 164 164 static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
+4 -4
drivers/iio/adc/ad7887.c
··· 207 207 .type = IIO_VOLTAGE, 208 208 .indexed = 1, 209 209 .channel = 1, 210 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 211 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 210 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 211 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 212 212 .address = 1, 213 213 .scan_index = 1, 214 214 .scan_type = IIO_ST('u', 12, 16, 0), ··· 217 217 .type = IIO_VOLTAGE, 218 218 .indexed = 1, 219 219 .channel = 0, 220 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 221 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 220 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 221 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 222 222 .address = 0, 223 223 .scan_index = 0, 224 224 .scan_type = IIO_ST('u', 12, 16, 0),
+383
drivers/iio/adc/ad7923.c
··· 1 + /* 2 + * AD7904/AD7914/AD7923/AD7924 SPI ADC driver 3 + * 4 + * Copyright 2011 Analog Devices Inc (from AD7923 Driver) 5 + * Copyright 2012 CS Systemes d'Information 6 + * 7 + * Licensed under the GPL-2. 8 + */ 9 + 10 + #include <linux/device.h> 11 + #include <linux/kernel.h> 12 + #include <linux/slab.h> 13 + #include <linux/sysfs.h> 14 + #include <linux/spi/spi.h> 15 + #include <linux/regulator/consumer.h> 16 + #include <linux/err.h> 17 + #include <linux/delay.h> 18 + #include <linux/module.h> 19 + #include <linux/interrupt.h> 20 + 21 + #include <linux/iio/iio.h> 22 + #include <linux/iio/sysfs.h> 23 + #include <linux/iio/buffer.h> 24 + #include <linux/iio/trigger_consumer.h> 25 + #include <linux/iio/triggered_buffer.h> 26 + 27 + #define AD7923_WRITE_CR (1 << 11) /* write control register */ 28 + #define AD7923_RANGE (1 << 1) /* range to REFin */ 29 + #define AD7923_CODING (1 << 0) /* coding is straight binary */ 30 + #define AD7923_PM_MODE_AS (1) /* auto shutdown */ 31 + #define AD7923_PM_MODE_FS (2) /* full shutdown */ 32 + #define AD7923_PM_MODE_OPS (3) /* normal operation */ 33 + #define AD7923_CHANNEL_0 (0) /* analog input 0 */ 34 + #define AD7923_CHANNEL_1 (1) /* analog input 1 */ 35 + #define AD7923_CHANNEL_2 (2) /* analog input 2 */ 36 + #define AD7923_CHANNEL_3 (3) /* analog input 3 */ 37 + #define AD7923_SEQUENCE_OFF (0) /* no sequence fonction */ 38 + #define AD7923_SEQUENCE_PROTECT (2) /* no interrupt write cycle */ 39 + #define AD7923_SEQUENCE_ON (3) /* continuous sequence */ 40 + 41 + #define AD7923_MAX_CHAN 4 42 + 43 + #define AD7923_PM_MODE_WRITE(mode) (mode << 4) /* write mode */ 44 + #define AD7923_CHANNEL_WRITE(channel) (channel << 6) /* write channel */ 45 + #define AD7923_SEQUENCE_WRITE(sequence) (((sequence & 1) << 3) \ 46 + + ((sequence & 2) << 9)) 47 + /* write sequence fonction */ 48 + /* left shift for CR : bit 11 transmit in first */ 49 + #define AD7923_SHIFT_REGISTER 4 50 + 51 + /* val = value, dec = left shift, bits = number of bits of the mask */ 52 + #define EXTRACT(val, dec, bits) ((val >> dec) & ((1 << bits) - 1)) 53 + 54 + struct ad7923_state { 55 + struct spi_device *spi; 56 + struct spi_transfer ring_xfer[5]; 57 + struct spi_transfer scan_single_xfer[2]; 58 + struct spi_message ring_msg; 59 + struct spi_message scan_single_msg; 60 + 61 + struct regulator *reg; 62 + 63 + unsigned int settings; 64 + 65 + /* 66 + * DMA (thus cache coherency maintenance) requires the 67 + * transfer buffers to live in their own cache lines. 68 + */ 69 + __be16 rx_buf[4] ____cacheline_aligned; 70 + __be16 tx_buf[4]; 71 + }; 72 + 73 + struct ad7923_chip_info { 74 + const struct iio_chan_spec *channels; 75 + unsigned int num_channels; 76 + }; 77 + 78 + enum ad7923_id { 79 + AD7904, 80 + AD7914, 81 + AD7924, 82 + }; 83 + 84 + #define AD7923_V_CHAN(index, bits) \ 85 + { \ 86 + .type = IIO_VOLTAGE, \ 87 + .indexed = 1, \ 88 + .channel = index, \ 89 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 90 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 91 + .address = index, \ 92 + .scan_index = index, \ 93 + .scan_type = { \ 94 + .sign = 'u', \ 95 + .realbits = (bits), \ 96 + .storagebits = 16, \ 97 + .endianness = IIO_BE, \ 98 + }, \ 99 + } 100 + 101 + #define DECLARE_AD7923_CHANNELS(name, bits) \ 102 + const struct iio_chan_spec name ## _channels[] = { \ 103 + AD7923_V_CHAN(0, bits), \ 104 + AD7923_V_CHAN(1, bits), \ 105 + AD7923_V_CHAN(2, bits), \ 106 + AD7923_V_CHAN(3, bits), \ 107 + IIO_CHAN_SOFT_TIMESTAMP(4), \ 108 + } 109 + 110 + static DECLARE_AD7923_CHANNELS(ad7904, 8); 111 + static DECLARE_AD7923_CHANNELS(ad7914, 10); 112 + static DECLARE_AD7923_CHANNELS(ad7924, 12); 113 + 114 + static const struct ad7923_chip_info ad7923_chip_info[] = { 115 + [AD7904] = { 116 + .channels = ad7904_channels, 117 + .num_channels = ARRAY_SIZE(ad7904_channels), 118 + }, 119 + [AD7914] = { 120 + .channels = ad7914_channels, 121 + .num_channels = ARRAY_SIZE(ad7914_channels), 122 + }, 123 + [AD7924] = { 124 + .channels = ad7924_channels, 125 + .num_channels = ARRAY_SIZE(ad7924_channels), 126 + }, 127 + }; 128 + 129 + /** 130 + * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask 131 + **/ 132 + static int ad7923_update_scan_mode(struct iio_dev *indio_dev, 133 + const unsigned long *active_scan_mask) 134 + { 135 + struct ad7923_state *st = iio_priv(indio_dev); 136 + int i, cmd, len; 137 + 138 + len = 0; 139 + for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) { 140 + cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) | 141 + AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) | 142 + st->settings; 143 + cmd <<= AD7923_SHIFT_REGISTER; 144 + st->tx_buf[len++] = cpu_to_be16(cmd); 145 + } 146 + /* build spi ring message */ 147 + st->ring_xfer[0].tx_buf = &st->tx_buf[0]; 148 + st->ring_xfer[0].len = len; 149 + st->ring_xfer[0].cs_change = 1; 150 + 151 + spi_message_init(&st->ring_msg); 152 + spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg); 153 + 154 + for (i = 0; i < len; i++) { 155 + st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i]; 156 + st->ring_xfer[i + 1].len = 2; 157 + st->ring_xfer[i + 1].cs_change = 1; 158 + spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg); 159 + } 160 + /* make sure last transfer cs_change is not set */ 161 + st->ring_xfer[i + 1].cs_change = 0; 162 + 163 + return 0; 164 + } 165 + 166 + /** 167 + * ad7923_trigger_handler() bh of trigger launched polling to ring buffer 168 + * 169 + * Currently there is no option in this driver to disable the saving of 170 + * timestamps within the ring. 171 + **/ 172 + static irqreturn_t ad7923_trigger_handler(int irq, void *p) 173 + { 174 + struct iio_poll_func *pf = p; 175 + struct iio_dev *indio_dev = pf->indio_dev; 176 + struct ad7923_state *st = iio_priv(indio_dev); 177 + s64 time_ns = 0; 178 + int b_sent; 179 + 180 + b_sent = spi_sync(st->spi, &st->ring_msg); 181 + if (b_sent) 182 + goto done; 183 + 184 + if (indio_dev->scan_timestamp) { 185 + time_ns = iio_get_time_ns(); 186 + memcpy((u8 *)st->rx_buf + indio_dev->scan_bytes - sizeof(s64), 187 + &time_ns, sizeof(time_ns)); 188 + } 189 + 190 + iio_push_to_buffers(indio_dev, (u8 *)st->rx_buf); 191 + 192 + done: 193 + iio_trigger_notify_done(indio_dev->trig); 194 + 195 + return IRQ_HANDLED; 196 + } 197 + 198 + static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch) 199 + { 200 + int ret, cmd; 201 + 202 + cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(ch) | 203 + AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) | 204 + st->settings; 205 + cmd <<= AD7923_SHIFT_REGISTER; 206 + st->tx_buf[0] = cpu_to_be16(cmd); 207 + 208 + ret = spi_sync(st->spi, &st->scan_single_msg); 209 + if (ret) 210 + return ret; 211 + 212 + return be16_to_cpu(st->rx_buf[0]); 213 + } 214 + 215 + static int ad7923_get_range(struct ad7923_state *st) 216 + { 217 + int vref; 218 + 219 + vref = regulator_get_voltage(st->reg); 220 + if (vref < 0) 221 + return vref; 222 + 223 + vref /= 1000; 224 + 225 + if (!(st->settings & AD7923_RANGE)) 226 + vref *= 2; 227 + 228 + return vref; 229 + } 230 + 231 + static int ad7923_read_raw(struct iio_dev *indio_dev, 232 + struct iio_chan_spec const *chan, 233 + int *val, 234 + int *val2, 235 + long m) 236 + { 237 + int ret; 238 + struct ad7923_state *st = iio_priv(indio_dev); 239 + 240 + switch (m) { 241 + case IIO_CHAN_INFO_RAW: 242 + mutex_lock(&indio_dev->mlock); 243 + if (iio_buffer_enabled(indio_dev)) 244 + ret = -EBUSY; 245 + else 246 + ret = ad7923_scan_direct(st, chan->address); 247 + mutex_unlock(&indio_dev->mlock); 248 + 249 + if (ret < 0) 250 + return ret; 251 + 252 + if (chan->address == EXTRACT(ret, 12, 4)) 253 + *val = EXTRACT(ret, 0, 12); 254 + else 255 + return -EIO; 256 + 257 + return IIO_VAL_INT; 258 + case IIO_CHAN_INFO_SCALE: 259 + ret = ad7923_get_range(st); 260 + if (ret < 0) 261 + return ret; 262 + *val = ret; 263 + *val2 = chan->scan_type.realbits; 264 + return IIO_VAL_FRACTIONAL_LOG2; 265 + } 266 + return -EINVAL; 267 + } 268 + 269 + static const struct iio_info ad7923_info = { 270 + .read_raw = &ad7923_read_raw, 271 + .update_scan_mode = ad7923_update_scan_mode, 272 + .driver_module = THIS_MODULE, 273 + }; 274 + 275 + static int ad7923_probe(struct spi_device *spi) 276 + { 277 + struct ad7923_state *st; 278 + struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st)); 279 + const struct ad7923_chip_info *info; 280 + int ret; 281 + 282 + if (indio_dev == NULL) 283 + return -ENOMEM; 284 + 285 + st = iio_priv(indio_dev); 286 + 287 + spi_set_drvdata(spi, indio_dev); 288 + 289 + st->spi = spi; 290 + st->settings = AD7923_CODING | AD7923_RANGE | 291 + AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS); 292 + 293 + info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data]; 294 + 295 + indio_dev->name = spi_get_device_id(spi)->name; 296 + indio_dev->dev.parent = &spi->dev; 297 + indio_dev->modes = INDIO_DIRECT_MODE; 298 + indio_dev->channels = info->channels; 299 + indio_dev->num_channels = info->num_channels; 300 + indio_dev->info = &ad7923_info; 301 + 302 + /* Setup default message */ 303 + 304 + st->scan_single_xfer[0].tx_buf = &st->tx_buf[0]; 305 + st->scan_single_xfer[0].len = 2; 306 + st->scan_single_xfer[0].cs_change = 1; 307 + st->scan_single_xfer[1].rx_buf = &st->rx_buf[0]; 308 + st->scan_single_xfer[1].len = 2; 309 + 310 + spi_message_init(&st->scan_single_msg); 311 + spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg); 312 + spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg); 313 + 314 + st->reg = regulator_get(&spi->dev, "refin"); 315 + if (IS_ERR(st->reg)) { 316 + ret = PTR_ERR(st->reg); 317 + goto error_free; 318 + } 319 + ret = regulator_enable(st->reg); 320 + if (ret) 321 + goto error_put_reg; 322 + 323 + ret = iio_triggered_buffer_setup(indio_dev, NULL, 324 + &ad7923_trigger_handler, NULL); 325 + if (ret) 326 + goto error_disable_reg; 327 + 328 + ret = iio_device_register(indio_dev); 329 + if (ret) 330 + goto error_cleanup_ring; 331 + 332 + return 0; 333 + 334 + error_cleanup_ring: 335 + iio_triggered_buffer_cleanup(indio_dev); 336 + error_disable_reg: 337 + regulator_disable(st->reg); 338 + error_put_reg: 339 + regulator_put(st->reg); 340 + error_free: 341 + iio_device_free(indio_dev); 342 + 343 + return ret; 344 + } 345 + 346 + static int ad7923_remove(struct spi_device *spi) 347 + { 348 + struct iio_dev *indio_dev = spi_get_drvdata(spi); 349 + struct ad7923_state *st = iio_priv(indio_dev); 350 + 351 + iio_device_unregister(indio_dev); 352 + iio_triggered_buffer_cleanup(indio_dev); 353 + regulator_disable(st->reg); 354 + regulator_put(st->reg); 355 + iio_device_free(indio_dev); 356 + 357 + return 0; 358 + } 359 + 360 + static const struct spi_device_id ad7923_id[] = { 361 + {"ad7904", AD7904}, 362 + {"ad7914", AD7914}, 363 + {"ad7923", AD7924}, 364 + {"ad7924", AD7924}, 365 + {} 366 + }; 367 + MODULE_DEVICE_TABLE(spi, ad7923_id); 368 + 369 + static struct spi_driver ad7923_driver = { 370 + .driver = { 371 + .name = "ad7923", 372 + .owner = THIS_MODULE, 373 + }, 374 + .probe = ad7923_probe, 375 + .remove = ad7923_remove, 376 + .id_table = ad7923_id, 377 + }; 378 + module_spi_driver(ad7923_driver); 379 + 380 + MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 381 + MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>"); 382 + MODULE_DESCRIPTION("Analog Devices AD7904/AD7914/AD7923/AD7924 ADC"); 383 + MODULE_LICENSE("GPL v2");
+2 -2
drivers/iio/adc/at91_adc.c
··· 140 140 chan->scan_type.sign = 'u'; 141 141 chan->scan_type.realbits = 10; 142 142 chan->scan_type.storagebits = 16; 143 - chan->info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | 144 - IIO_CHAN_INFO_RAW_SEPARATE_BIT; 143 + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 144 + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 145 145 idx++; 146 146 } 147 147 timestamp = chan_array + idx;
+452
drivers/iio/adc/exynos_adc.c
··· 1 + /* 2 + * exynos_adc.c - Support for ADC in EXYNOS SoCs 3 + * 4 + * 8 ~ 10 channel, 10/12-bit ADC 5 + * 6 + * Copyright (C) 2013 Naveen Krishna Chatradhi <ch.naveen@samsung.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License as published by 10 + * the Free Software Foundation; either version 2 of the License, or 11 + * (at your option) any later version. 12 + * 13 + * This program is distributed in the hope that it will be useful, 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 + * GNU General Public License for more details. 17 + * 18 + * You should have received a copy of the GNU General Public License 19 + * along with this program; if not, write to the Free Software 20 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 + */ 22 + 23 + #include <linux/module.h> 24 + #include <linux/platform_device.h> 25 + #include <linux/interrupt.h> 26 + #include <linux/delay.h> 27 + #include <linux/kernel.h> 28 + #include <linux/slab.h> 29 + #include <linux/io.h> 30 + #include <linux/clk.h> 31 + #include <linux/completion.h> 32 + #include <linux/of.h> 33 + #include <linux/of_irq.h> 34 + #include <linux/regulator/consumer.h> 35 + #include <linux/of_platform.h> 36 + 37 + #include <linux/iio/iio.h> 38 + #include <linux/iio/machine.h> 39 + #include <linux/iio/driver.h> 40 + 41 + enum adc_version { 42 + ADC_V1, 43 + ADC_V2 44 + }; 45 + 46 + /* EXYNOS4412/5250 ADC_V1 registers definitions */ 47 + #define ADC_V1_CON(x) ((x) + 0x00) 48 + #define ADC_V1_DLY(x) ((x) + 0x08) 49 + #define ADC_V1_DATX(x) ((x) + 0x0C) 50 + #define ADC_V1_INTCLR(x) ((x) + 0x18) 51 + #define ADC_V1_MUX(x) ((x) + 0x1c) 52 + 53 + /* Future ADC_V2 registers definitions */ 54 + #define ADC_V2_CON1(x) ((x) + 0x00) 55 + #define ADC_V2_CON2(x) ((x) + 0x04) 56 + #define ADC_V2_STAT(x) ((x) + 0x08) 57 + #define ADC_V2_INT_EN(x) ((x) + 0x10) 58 + #define ADC_V2_INT_ST(x) ((x) + 0x14) 59 + #define ADC_V2_VER(x) ((x) + 0x20) 60 + 61 + /* Bit definitions for ADC_V1 */ 62 + #define ADC_V1_CON_RES (1u << 16) 63 + #define ADC_V1_CON_PRSCEN (1u << 14) 64 + #define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) 65 + #define ADC_V1_CON_STANDBY (1u << 2) 66 + 67 + /* Bit definitions for ADC_V2 */ 68 + #define ADC_V2_CON1_SOFT_RESET (1u << 2) 69 + 70 + #define ADC_V2_CON2_OSEL (1u << 10) 71 + #define ADC_V2_CON2_ESEL (1u << 9) 72 + #define ADC_V2_CON2_HIGHF (1u << 8) 73 + #define ADC_V2_CON2_C_TIME(x) (((x) & 7) << 4) 74 + #define ADC_V2_CON2_ACH_SEL(x) (((x) & 0xF) << 0) 75 + #define ADC_V2_CON2_ACH_MASK 0xF 76 + 77 + #define MAX_ADC_V2_CHANNELS 10 78 + #define MAX_ADC_V1_CHANNELS 8 79 + 80 + /* Bit definitions common for ADC_V1 and ADC_V2 */ 81 + #define ADC_CON_EN_START (1u << 0) 82 + #define ADC_DATX_MASK 0xFFF 83 + 84 + #define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(1000)) 85 + 86 + struct exynos_adc { 87 + void __iomem *regs; 88 + void __iomem *enable_reg; 89 + struct clk *clk; 90 + unsigned int irq; 91 + struct regulator *vdd; 92 + 93 + struct completion completion; 94 + 95 + u32 value; 96 + unsigned int version; 97 + }; 98 + 99 + static const struct of_device_id exynos_adc_match[] = { 100 + { .compatible = "samsung,exynos-adc-v1", .data = (void *)ADC_V1 }, 101 + { .compatible = "samsung,exynos-adc-v2", .data = (void *)ADC_V2 }, 102 + {}, 103 + }; 104 + MODULE_DEVICE_TABLE(of, exynos_adc_match); 105 + 106 + static inline unsigned int exynos_adc_get_version(struct platform_device *pdev) 107 + { 108 + const struct of_device_id *match; 109 + 110 + match = of_match_node(exynos_adc_match, pdev->dev.of_node); 111 + return (unsigned int)match->data; 112 + } 113 + 114 + static int exynos_read_raw(struct iio_dev *indio_dev, 115 + struct iio_chan_spec const *chan, 116 + int *val, 117 + int *val2, 118 + long mask) 119 + { 120 + struct exynos_adc *info = iio_priv(indio_dev); 121 + unsigned long timeout; 122 + u32 con1, con2; 123 + 124 + if (mask != IIO_CHAN_INFO_RAW) 125 + return -EINVAL; 126 + 127 + mutex_lock(&indio_dev->mlock); 128 + 129 + /* Select the channel to be used and Trigger conversion */ 130 + if (info->version == ADC_V2) { 131 + con2 = readl(ADC_V2_CON2(info->regs)); 132 + con2 &= ~ADC_V2_CON2_ACH_MASK; 133 + con2 |= ADC_V2_CON2_ACH_SEL(chan->address); 134 + writel(con2, ADC_V2_CON2(info->regs)); 135 + 136 + con1 = readl(ADC_V2_CON1(info->regs)); 137 + writel(con1 | ADC_CON_EN_START, 138 + ADC_V2_CON1(info->regs)); 139 + } else { 140 + writel(chan->address, ADC_V1_MUX(info->regs)); 141 + 142 + con1 = readl(ADC_V1_CON(info->regs)); 143 + writel(con1 | ADC_CON_EN_START, 144 + ADC_V1_CON(info->regs)); 145 + } 146 + 147 + timeout = wait_for_completion_interruptible_timeout 148 + (&info->completion, EXYNOS_ADC_TIMEOUT); 149 + *val = info->value; 150 + 151 + mutex_unlock(&indio_dev->mlock); 152 + 153 + if (timeout == 0) 154 + return -ETIMEDOUT; 155 + 156 + return IIO_VAL_INT; 157 + } 158 + 159 + static irqreturn_t exynos_adc_isr(int irq, void *dev_id) 160 + { 161 + struct exynos_adc *info = (struct exynos_adc *)dev_id; 162 + 163 + /* Read value */ 164 + info->value = readl(ADC_V1_DATX(info->regs)) & 165 + ADC_DATX_MASK; 166 + /* clear irq */ 167 + if (info->version == ADC_V2) 168 + writel(1, ADC_V2_INT_ST(info->regs)); 169 + else 170 + writel(1, ADC_V1_INTCLR(info->regs)); 171 + 172 + complete(&info->completion); 173 + 174 + return IRQ_HANDLED; 175 + } 176 + 177 + static int exynos_adc_reg_access(struct iio_dev *indio_dev, 178 + unsigned reg, unsigned writeval, 179 + unsigned *readval) 180 + { 181 + struct exynos_adc *info = iio_priv(indio_dev); 182 + 183 + if (readval == NULL) 184 + return -EINVAL; 185 + 186 + *readval = readl(info->regs + reg); 187 + 188 + return 0; 189 + } 190 + 191 + static const struct iio_info exynos_adc_iio_info = { 192 + .read_raw = &exynos_read_raw, 193 + .debugfs_reg_access = &exynos_adc_reg_access, 194 + .driver_module = THIS_MODULE, 195 + }; 196 + 197 + #define ADC_CHANNEL(_index, _id) { \ 198 + .type = IIO_VOLTAGE, \ 199 + .indexed = 1, \ 200 + .channel = _index, \ 201 + .address = _index, \ 202 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 203 + .datasheet_name = _id, \ 204 + } 205 + 206 + static const struct iio_chan_spec exynos_adc_iio_channels[] = { 207 + ADC_CHANNEL(0, "adc0"), 208 + ADC_CHANNEL(1, "adc1"), 209 + ADC_CHANNEL(2, "adc2"), 210 + ADC_CHANNEL(3, "adc3"), 211 + ADC_CHANNEL(4, "adc4"), 212 + ADC_CHANNEL(5, "adc5"), 213 + ADC_CHANNEL(6, "adc6"), 214 + ADC_CHANNEL(7, "adc7"), 215 + ADC_CHANNEL(8, "adc8"), 216 + ADC_CHANNEL(9, "adc9"), 217 + }; 218 + 219 + static int exynos_adc_remove_devices(struct device *dev, void *c) 220 + { 221 + struct platform_device *pdev = to_platform_device(dev); 222 + 223 + platform_device_unregister(pdev); 224 + 225 + return 0; 226 + } 227 + 228 + static void exynos_adc_hw_init(struct exynos_adc *info) 229 + { 230 + u32 con1, con2; 231 + 232 + if (info->version == ADC_V2) { 233 + con1 = ADC_V2_CON1_SOFT_RESET; 234 + writel(con1, ADC_V2_CON1(info->regs)); 235 + 236 + con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL | 237 + ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0); 238 + writel(con2, ADC_V2_CON2(info->regs)); 239 + 240 + /* Enable interrupts */ 241 + writel(1, ADC_V2_INT_EN(info->regs)); 242 + } else { 243 + /* set default prescaler values and Enable prescaler */ 244 + con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN; 245 + 246 + /* Enable 12-bit ADC resolution */ 247 + con1 |= ADC_V1_CON_RES; 248 + writel(con1, ADC_V1_CON(info->regs)); 249 + } 250 + } 251 + 252 + static int exynos_adc_probe(struct platform_device *pdev) 253 + { 254 + struct exynos_adc *info = NULL; 255 + struct device_node *np = pdev->dev.of_node; 256 + struct iio_dev *indio_dev = NULL; 257 + struct resource *mem; 258 + int ret = -ENODEV; 259 + int irq; 260 + 261 + if (!np) 262 + return ret; 263 + 264 + indio_dev = iio_device_alloc(sizeof(struct exynos_adc)); 265 + if (!indio_dev) { 266 + dev_err(&pdev->dev, "failed allocating iio device\n"); 267 + return -ENOMEM; 268 + } 269 + 270 + info = iio_priv(indio_dev); 271 + 272 + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 273 + info->regs = devm_request_and_ioremap(&pdev->dev, mem); 274 + if (!info->regs) { 275 + ret = -ENOMEM; 276 + goto err_iio; 277 + } 278 + 279 + mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 280 + info->enable_reg = devm_request_and_ioremap(&pdev->dev, mem); 281 + if (!info->enable_reg) { 282 + ret = -ENOMEM; 283 + goto err_iio; 284 + } 285 + 286 + irq = platform_get_irq(pdev, 0); 287 + if (irq < 0) { 288 + dev_err(&pdev->dev, "no irq resource?\n"); 289 + ret = irq; 290 + goto err_iio; 291 + } 292 + 293 + info->irq = irq; 294 + 295 + init_completion(&info->completion); 296 + 297 + ret = request_irq(info->irq, exynos_adc_isr, 298 + 0, dev_name(&pdev->dev), info); 299 + if (ret < 0) { 300 + dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", 301 + info->irq); 302 + goto err_iio; 303 + } 304 + 305 + writel(1, info->enable_reg); 306 + 307 + info->clk = devm_clk_get(&pdev->dev, "adc"); 308 + if (IS_ERR(info->clk)) { 309 + dev_err(&pdev->dev, "failed getting clock, err = %ld\n", 310 + PTR_ERR(info->clk)); 311 + ret = PTR_ERR(info->clk); 312 + goto err_irq; 313 + } 314 + 315 + info->vdd = devm_regulator_get(&pdev->dev, "vdd"); 316 + if (IS_ERR(info->vdd)) { 317 + dev_err(&pdev->dev, "failed getting regulator, err = %ld\n", 318 + PTR_ERR(info->vdd)); 319 + ret = PTR_ERR(info->vdd); 320 + goto err_irq; 321 + } 322 + 323 + info->version = exynos_adc_get_version(pdev); 324 + 325 + platform_set_drvdata(pdev, indio_dev); 326 + 327 + indio_dev->name = dev_name(&pdev->dev); 328 + indio_dev->dev.parent = &pdev->dev; 329 + indio_dev->dev.of_node = pdev->dev.of_node; 330 + indio_dev->info = &exynos_adc_iio_info; 331 + indio_dev->modes = INDIO_DIRECT_MODE; 332 + indio_dev->channels = exynos_adc_iio_channels; 333 + 334 + if (info->version == ADC_V1) 335 + indio_dev->num_channels = MAX_ADC_V1_CHANNELS; 336 + else 337 + indio_dev->num_channels = MAX_ADC_V2_CHANNELS; 338 + 339 + ret = iio_device_register(indio_dev); 340 + if (ret) 341 + goto err_irq; 342 + 343 + ret = regulator_enable(info->vdd); 344 + if (ret) 345 + goto err_iio_dev; 346 + 347 + clk_prepare_enable(info->clk); 348 + 349 + exynos_adc_hw_init(info); 350 + 351 + ret = of_platform_populate(np, exynos_adc_match, NULL, &pdev->dev); 352 + if (ret < 0) { 353 + dev_err(&pdev->dev, "failed adding child nodes\n"); 354 + goto err_of_populate; 355 + } 356 + 357 + return 0; 358 + 359 + err_of_populate: 360 + device_for_each_child(&pdev->dev, NULL, 361 + exynos_adc_remove_devices); 362 + regulator_disable(info->vdd); 363 + clk_disable_unprepare(info->clk); 364 + err_iio_dev: 365 + iio_device_unregister(indio_dev); 366 + err_irq: 367 + free_irq(info->irq, info); 368 + err_iio: 369 + iio_device_free(indio_dev); 370 + return ret; 371 + } 372 + 373 + static int exynos_adc_remove(struct platform_device *pdev) 374 + { 375 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 376 + struct exynos_adc *info = iio_priv(indio_dev); 377 + 378 + device_for_each_child(&pdev->dev, NULL, 379 + exynos_adc_remove_devices); 380 + regulator_disable(info->vdd); 381 + clk_disable_unprepare(info->clk); 382 + writel(0, info->enable_reg); 383 + iio_device_unregister(indio_dev); 384 + free_irq(info->irq, info); 385 + iio_device_free(indio_dev); 386 + 387 + return 0; 388 + } 389 + 390 + #ifdef CONFIG_PM_SLEEP 391 + static int exynos_adc_suspend(struct device *dev) 392 + { 393 + struct platform_device *pdev = to_platform_device(dev); 394 + struct exynos_adc *info = platform_get_drvdata(pdev); 395 + u32 con; 396 + 397 + if (info->version == ADC_V2) { 398 + con = readl(ADC_V2_CON1(info->regs)); 399 + con &= ~ADC_CON_EN_START; 400 + writel(con, ADC_V2_CON1(info->regs)); 401 + } else { 402 + con = readl(ADC_V1_CON(info->regs)); 403 + con |= ADC_V1_CON_STANDBY; 404 + writel(con, ADC_V1_CON(info->regs)); 405 + } 406 + 407 + clk_disable_unprepare(info->clk); 408 + writel(0, info->enable_reg); 409 + regulator_disable(info->vdd); 410 + 411 + return 0; 412 + } 413 + 414 + static int exynos_adc_resume(struct device *dev) 415 + { 416 + struct platform_device *pdev = to_platform_device(dev); 417 + struct exynos_adc *info = platform_get_drvdata(pdev); 418 + int ret; 419 + 420 + ret = regulator_enable(info->vdd); 421 + if (ret) 422 + return ret; 423 + 424 + writel(1, info->enable_reg); 425 + clk_prepare_enable(info->clk); 426 + 427 + exynos_adc_hw_init(info); 428 + 429 + return 0; 430 + } 431 + #endif 432 + 433 + static SIMPLE_DEV_PM_OPS(exynos_adc_pm_ops, 434 + exynos_adc_suspend, 435 + exynos_adc_resume); 436 + 437 + static struct platform_driver exynos_adc_driver = { 438 + .probe = exynos_adc_probe, 439 + .remove = exynos_adc_remove, 440 + .driver = { 441 + .name = "exynos-adc", 442 + .owner = THIS_MODULE, 443 + .of_match_table = of_match_ptr(exynos_adc_match), 444 + .pm = &exynos_adc_pm_ops, 445 + }, 446 + }; 447 + 448 + module_platform_driver(exynos_adc_driver); 449 + 450 + MODULE_AUTHOR("Naveen Krishna Chatradhi <ch.naveen@samsung.com>"); 451 + MODULE_DESCRIPTION("Samsung EXYNOS5 ADC driver"); 452 + MODULE_LICENSE("GPL v2");
+2 -2
drivers/iio/adc/lp8788_adc.c
··· 132 132 .type = _type, \ 133 133 .indexed = 1, \ 134 134 .channel = LPADC_##_id, \ 135 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 136 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 135 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 136 + BIT(IIO_CHAN_INFO_SCALE), \ 137 137 .datasheet_name = #_id, \ 138 138 } 139 139
+5 -4
drivers/iio/adc/max1363.c
··· 427 427 #define MAX1363_EV_M \ 428 428 (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) \ 429 429 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING)) 430 - #define MAX1363_INFO_MASK (IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 431 - IIO_CHAN_INFO_SCALE_SHARED_BIT) 430 + 432 431 #define MAX1363_CHAN_U(num, addr, si, bits, evmask) \ 433 432 { \ 434 433 .type = IIO_VOLTAGE, \ 435 434 .indexed = 1, \ 436 435 .channel = num, \ 437 436 .address = addr, \ 438 - .info_mask = MAX1363_INFO_MASK, \ 437 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 438 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 439 439 .datasheet_name = "AIN"#num, \ 440 440 .scan_type = { \ 441 441 .sign = 'u', \ ··· 456 456 .channel = num, \ 457 457 .channel2 = num2, \ 458 458 .address = addr, \ 459 - .info_mask = MAX1363_INFO_MASK, \ 459 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 460 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 460 461 .datasheet_name = "AIN"#num"-AIN"#num2, \ 461 462 .scan_type = { \ 462 463 .sign = 's', \
+2 -2
drivers/iio/adc/ti-adc081c.c
··· 55 55 56 56 static const struct iio_chan_spec adc081c_channel = { 57 57 .type = IIO_VOLTAGE, 58 - .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | 59 - IIO_CHAN_INFO_RAW_SEPARATE_BIT, 58 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 59 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 60 60 }; 61 61 62 62 static const struct iio_info adc081c_info = {
+1 -1
drivers/iio/adc/ti_am335x_adc.c
··· 89 89 chan->type = IIO_VOLTAGE; 90 90 chan->indexed = 1; 91 91 chan->channel = i; 92 - chan->info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT; 92 + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 93 93 } 94 94 95 95 indio_dev->channels = chan_array;
+1 -1
drivers/iio/adc/viperboard_adc.c
··· 41 41 .type = IIO_VOLTAGE, \ 42 42 .indexed = 1, \ 43 43 .channel = _index, \ 44 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, \ 44 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 45 45 .scan_index = _index, \ 46 46 .scan_type = { \ 47 47 .sign = 'u', \
+1 -1
drivers/iio/amplifiers/ad8366.c
··· 125 125 .output = 1, \ 126 126 .indexed = 1, \ 127 127 .channel = _channel, \ 128 - .info_mask = IIO_CHAN_INFO_HARDWAREGAIN_SEPARATE_BIT,\ 128 + .info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN),\ 129 129 } 130 130 131 131 static const struct iio_chan_spec ad8366_channels[] = {
+2 -9
drivers/iio/common/st_sensors/st_sensors_spi.c
··· 29 29 static int st_sensors_spi_read(struct st_sensor_transfer_buffer *tb, 30 30 struct device *dev, u8 reg_addr, int len, u8 *data, bool multiread_bit) 31 31 { 32 - struct spi_message msg; 33 32 int err; 34 33 35 34 struct spi_transfer xfers[] = { ··· 50 51 else 51 52 tb->tx_buf[0] = reg_addr | ST_SENSORS_SPI_READ; 52 53 53 - spi_message_init(&msg); 54 - spi_message_add_tail(&xfers[0], &msg); 55 - spi_message_add_tail(&xfers[1], &msg); 56 - err = spi_sync(to_spi_device(dev), &msg); 54 + err = spi_sync_transfer(to_spi_device(dev), xfers, ARRAY_SIZE(xfers)); 57 55 if (err) 58 56 goto acc_spi_read_error; 59 57 ··· 79 83 static int st_sensors_spi_write_byte(struct st_sensor_transfer_buffer *tb, 80 84 struct device *dev, u8 reg_addr, u8 data) 81 85 { 82 - struct spi_message msg; 83 86 int err; 84 87 85 88 struct spi_transfer xfers = { ··· 91 96 tb->tx_buf[0] = reg_addr; 92 97 tb->tx_buf[1] = data; 93 98 94 - spi_message_init(&msg); 95 - spi_message_add_tail(&xfers, &msg); 96 - err = spi_sync(to_spi_device(dev), &msg); 99 + err = spi_sync_transfer(to_spi_device(dev), &xfers, 1); 97 100 mutex_unlock(&tb->buf_lock); 98 101 99 102 return err;
+2 -2
drivers/iio/dac/ad5064.c
··· 296 296 .indexed = 1, \ 297 297 .output = 1, \ 298 298 .channel = (chan), \ 299 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 300 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 299 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 300 + BIT(IIO_CHAN_INFO_SCALE), \ 301 301 .address = addr, \ 302 302 .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \ 303 303 .ext_info = ad5064_ext_info, \
+5 -5
drivers/iio/dac/ad5360.c
··· 102 102 .type = IIO_VOLTAGE, \ 103 103 .indexed = 1, \ 104 104 .output = 1, \ 105 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 106 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \ 107 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \ 108 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \ 109 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \ 105 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 106 + BIT(IIO_CHAN_INFO_SCALE) | \ 107 + BIT(IIO_CHAN_INFO_OFFSET) | \ 108 + BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 109 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 110 110 .scan_type = IIO_ST('u', (bits), 16, 16 - (bits)) \ 111 111 } 112 112
+4 -4
drivers/iio/dac/ad5380.c
··· 257 257 .type = IIO_VOLTAGE, \ 258 258 .indexed = 1, \ 259 259 .output = 1, \ 260 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 261 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 262 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \ 263 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \ 260 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 261 + BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 262 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 263 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 264 264 .scan_type = IIO_ST('u', (_bits), 16, 14 - (_bits)), \ 265 265 .ext_info = ad5380_ext_info, \ 266 266 }
+5 -5
drivers/iio/dac/ad5421.c
··· 86 86 .indexed = 1, 87 87 .output = 1, 88 88 .channel = 0, 89 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 90 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 91 - IIO_CHAN_INFO_OFFSET_SHARED_BIT | 92 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 93 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 89 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 90 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 91 + BIT(IIO_CHAN_INFO_CALIBBIAS), 92 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 93 + BIT(IIO_CHAN_INFO_OFFSET), 94 94 .scan_type = IIO_ST('u', 16, 16, 0), 95 95 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | 96 96 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
+2 -2
drivers/iio/dac/ad5446.c
··· 143 143 .indexed = 1, \ 144 144 .output = 1, \ 145 145 .channel = 0, \ 146 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 147 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 146 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 147 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 148 148 .scan_type = IIO_ST('u', (bits), (storage), (shift)), \ 149 149 .ext_info = (ext), \ 150 150 }
+2 -2
drivers/iio/dac/ad5449.c
··· 206 206 .indexed = 1, \ 207 207 .output = 1, \ 208 208 .channel = (chan), \ 209 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 210 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 209 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 210 + BIT(IIO_CHAN_INFO_SCALE), \ 211 211 .address = (chan), \ 212 212 .scan_type = IIO_ST('u', (bits), 16, 12 - (bits)), \ 213 213 }
+2 -2
drivers/iio/dac/ad5504.c
··· 259 259 .indexed = 1, \ 260 260 .output = 1, \ 261 261 .channel = (_chan), \ 262 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 263 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 262 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 263 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 264 264 .address = AD5504_ADDR_DAC(_chan), \ 265 265 .scan_type = IIO_ST('u', 12, 16, 0), \ 266 266 .ext_info = ad5504_ext_info, \
+2 -2
drivers/iio/dac/ad5624r_spi.c
··· 174 174 .indexed = 1, \ 175 175 .output = 1, \ 176 176 .channel = (_chan), \ 177 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 178 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 177 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 178 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 179 179 .address = (_chan), \ 180 180 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)), \ 181 181 .ext_info = ad5624r_ext_info, \
+3 -3
drivers/iio/dac/ad5686.c
··· 276 276 .indexed = 1, \ 277 277 .output = 1, \ 278 278 .channel = chan, \ 279 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 280 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 281 - .address = AD5686_ADDR_DAC(chan), \ 279 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 280 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 281 + .address = AD5686_ADDR_DAC(chan), \ 282 282 .scan_type = IIO_ST('u', bits, 16, shift), \ 283 283 .ext_info = ad5686_ext_info, \ 284 284 }
+5 -5
drivers/iio/dac/ad5755.c
··· 393 393 #define AD5755_CHANNEL(_bits) { \ 394 394 .indexed = 1, \ 395 395 .output = 1, \ 396 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 397 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \ 398 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \ 399 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \ 400 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \ 396 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 397 + BIT(IIO_CHAN_INFO_SCALE) | \ 398 + BIT(IIO_CHAN_INFO_OFFSET) | \ 399 + BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 400 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 401 401 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)), \ 402 402 .ext_info = ad5755_ext_info, \ 403 403 }
+5 -5
drivers/iio/dac/ad5764.c
··· 78 78 .output = 1, \ 79 79 .channel = (_chan), \ 80 80 .address = (_chan), \ 81 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 82 - IIO_CHAN_INFO_OFFSET_SHARED_BIT | \ 83 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \ 84 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \ 85 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \ 81 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 82 + BIT(IIO_CHAN_INFO_SCALE) | \ 83 + BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 84 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 85 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \ 86 86 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \ 87 87 } 88 88
+3 -3
drivers/iio/dac/ad5791.c
··· 302 302 .indexed = 1, \ 303 303 .address = AD5791_ADDR_DAC0, \ 304 304 .channel = 0, \ 305 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 306 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 307 - IIO_CHAN_INFO_OFFSET_SHARED_BIT, \ 305 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 306 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 307 + BIT(IIO_CHAN_INFO_OFFSET), \ 308 308 .scan_type = IIO_ST('u', bits, 24, shift), \ 309 309 .ext_info = ad5791_ext_info, \ 310 310 }
+2 -2
drivers/iio/dac/max517.c
··· 146 146 .indexed = 1, \ 147 147 .output = 1, \ 148 148 .channel = (chan), \ 149 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 150 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 149 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 150 + BIT(IIO_CHAN_INFO_SCALE), \ 151 151 .scan_type = IIO_ST('u', 8, 8, 0), \ 152 152 } 153 153
+2 -2
drivers/iio/dac/mcp4725.c
··· 69 69 .indexed = 1, 70 70 .output = 1, 71 71 .channel = 0, 72 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 73 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 72 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 73 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 74 74 .scan_type = IIO_ST('u', 12, 16, 0), 75 75 }; 76 76
+4 -4
drivers/iio/frequency/ad9523.c
··· 920 920 st->ad9523_channels[i].channel = chan->channel_num; 921 921 st->ad9523_channels[i].extend_name = 922 922 chan->extended_name; 923 - st->ad9523_channels[i].info_mask = 924 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 925 - IIO_CHAN_INFO_PHASE_SEPARATE_BIT | 926 - IIO_CHAN_INFO_FREQUENCY_SEPARATE_BIT; 923 + st->ad9523_channels[i].info_mask_separate = 924 + BIT(IIO_CHAN_INFO_RAW) | 925 + BIT(IIO_CHAN_INFO_PHASE) | 926 + BIT(IIO_CHAN_INFO_FREQUENCY); 927 927 } 928 928 } 929 929
+11 -11
drivers/iio/gyro/adis16080.c
··· 136 136 .type = IIO_ANGL_VEL, 137 137 .modified = 1, 138 138 .channel2 = IIO_MOD_Z, 139 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 140 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 139 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 140 + BIT(IIO_CHAN_INFO_SCALE), 141 141 .address = ADIS16080_DIN_GYRO, 142 142 }, { 143 143 .type = IIO_VOLTAGE, 144 144 .indexed = 1, 145 145 .channel = 0, 146 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 147 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 148 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, 146 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 147 + BIT(IIO_CHAN_INFO_SCALE) | 148 + BIT(IIO_CHAN_INFO_OFFSET), 149 149 .address = ADIS16080_DIN_AIN1, 150 150 }, { 151 151 .type = IIO_VOLTAGE, 152 152 .indexed = 1, 153 153 .channel = 1, 154 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 155 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 156 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, 154 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 155 + BIT(IIO_CHAN_INFO_SCALE) | 156 + BIT(IIO_CHAN_INFO_OFFSET), 157 157 .address = ADIS16080_DIN_AIN2, 158 158 }, { 159 159 .type = IIO_TEMP, 160 160 .indexed = 1, 161 161 .channel = 0, 162 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 163 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 164 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, 162 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 163 + BIT(IIO_CHAN_INFO_SCALE) | 164 + BIT(IIO_CHAN_INFO_OFFSET), 165 165 .address = ADIS16080_DIN_TEMP, 166 166 } 167 167 };
+7 -6
drivers/iio/gyro/adis16136.c
··· 357 357 .type = IIO_ANGL_VEL, 358 358 .modified = 1, 359 359 .channel2 = IIO_MOD_X, 360 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 361 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 362 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 363 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT, 360 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 361 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 362 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), 363 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 364 + 364 365 .address = ADIS16136_REG_GYRO_OUT2, 365 366 .scan_index = ADIS16136_SCAN_GYRO, 366 367 .scan_type = { ··· 374 373 .type = IIO_TEMP, 375 374 .indexed = 1, 376 375 .channel = 0, 377 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 378 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 376 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 377 + BIT(IIO_CHAN_INFO_SCALE), 379 378 .address = ADIS16136_REG_TEMP_OUT, 380 379 .scan_index = ADIS16136_SCAN_TEMP, 381 380 .scan_type = {
+11 -11
drivers/iio/gyro/adxrs450.c
··· 383 383 .type = IIO_ANGL_VEL, 384 384 .modified = 1, 385 385 .channel2 = IIO_MOD_Z, 386 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 387 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 388 - IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT | 389 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 386 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 387 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 388 + BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) | 389 + BIT(IIO_CHAN_INFO_SCALE), 390 390 }, { 391 391 .type = IIO_TEMP, 392 392 .indexed = 1, 393 393 .channel = 0, 394 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 395 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 394 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 395 + BIT(IIO_CHAN_INFO_SCALE), 396 396 } 397 397 }, 398 398 [ID_ADXRS453] = { ··· 400 400 .type = IIO_ANGL_VEL, 401 401 .modified = 1, 402 402 .channel2 = IIO_MOD_Z, 403 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 404 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 405 - IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT, 403 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 404 + BIT(IIO_CHAN_INFO_SCALE) | 405 + BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW), 406 406 }, { 407 407 .type = IIO_TEMP, 408 408 .indexed = 1, 409 409 .channel = 0, 410 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 411 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 410 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 411 + BIT(IIO_CHAN_INFO_SCALE), 412 412 } 413 413 }, 414 414 };
+12 -12
drivers/iio/gyro/hid-sensor-gyro-3d.c
··· 60 60 .type = IIO_ANGL_VEL, 61 61 .modified = 1, 62 62 .channel2 = IIO_MOD_X, 63 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 64 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 65 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 66 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 63 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 64 + BIT(IIO_CHAN_INFO_SCALE) | 65 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 66 + BIT(IIO_CHAN_INFO_HYSTERESIS), 67 67 .scan_index = CHANNEL_SCAN_INDEX_X, 68 68 }, { 69 69 .type = IIO_ANGL_VEL, 70 70 .modified = 1, 71 71 .channel2 = IIO_MOD_Y, 72 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 73 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 74 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 75 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 72 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 73 + BIT(IIO_CHAN_INFO_SCALE) | 74 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 75 + BIT(IIO_CHAN_INFO_HYSTERESIS), 76 76 .scan_index = CHANNEL_SCAN_INDEX_Y, 77 77 }, { 78 78 .type = IIO_ANGL_VEL, 79 79 .modified = 1, 80 80 .channel2 = IIO_MOD_Z, 81 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 82 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 83 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 84 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 81 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 82 + BIT(IIO_CHAN_INFO_SCALE) | 83 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 84 + BIT(IIO_CHAN_INFO_HYSTERESIS), 85 85 .scan_index = CHANNEL_SCAN_INDEX_Z, 86 86 } 87 87 };
+5 -8
drivers/iio/gyro/itg3200_core.c
··· 248 248 return ret; 249 249 } 250 250 251 - #define ITG3200_TEMP_INFO_MASK (IIO_CHAN_INFO_OFFSET_SHARED_BIT | \ 252 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 253 - IIO_CHAN_INFO_RAW_SEPARATE_BIT) 254 - #define ITG3200_GYRO_INFO_MASK (IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 255 - IIO_CHAN_INFO_RAW_SEPARATE_BIT) 256 - 257 251 #define ITG3200_ST \ 258 252 { .sign = 's', .realbits = 16, .storagebits = 16, .endianness = IIO_BE } 259 253 ··· 255 261 .type = IIO_ANGL_VEL, \ 256 262 .modified = 1, \ 257 263 .channel2 = IIO_MOD_ ## _mod, \ 258 - .info_mask = ITG3200_GYRO_INFO_MASK, \ 264 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 265 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 259 266 .address = ITG3200_REG_GYRO_ ## _mod ## OUT_H, \ 260 267 .scan_index = ITG3200_SCAN_GYRO_ ## _mod, \ 261 268 .scan_type = ITG3200_ST, \ ··· 266 271 { 267 272 .type = IIO_TEMP, 268 273 .channel2 = IIO_NO_MOD, 269 - .info_mask = ITG3200_TEMP_INFO_MASK, 274 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 275 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 276 + BIT(IIO_CHAN_INFO_SCALE), 270 277 .address = ITG3200_REG_TEMP_OUT_H, 271 278 .scan_index = ITG3200_SCAN_TEMP, 272 279 .scan_type = ITG3200_ST,
+1
drivers/iio/iio_core.h
··· 18 18 struct iio_chan_spec; 19 19 struct iio_dev; 20 20 21 + extern struct device_type iio_device_type; 21 22 22 23 int __iio_add_chan_devattr(const char *postfix, 23 24 struct iio_chan_spec const *chan,
+25 -24
drivers/iio/imu/adis16400_core.c
··· 484 484 .indexed = 1, \ 485 485 .channel = 0, \ 486 486 .extend_name = name, \ 487 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 488 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 487 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 488 + BIT(IIO_CHAN_INFO_SCALE), \ 489 489 .address = (addr), \ 490 490 .scan_index = (si), \ 491 491 .scan_type = { \ ··· 507 507 .type = IIO_ANGL_VEL, \ 508 508 .modified = 1, \ 509 509 .channel2 = IIO_MOD_ ## mod, \ 510 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 511 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \ 512 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 513 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, \ 510 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 511 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 512 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 513 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 514 514 .address = addr, \ 515 515 .scan_index = ADIS16400_SCAN_GYRO_ ## mod, \ 516 516 .scan_type = { \ ··· 526 526 .type = IIO_ACCEL, \ 527 527 .modified = 1, \ 528 528 .channel2 = IIO_MOD_ ## mod, \ 529 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 530 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \ 531 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 532 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, \ 529 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 530 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 531 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 532 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 533 533 .address = (addr), \ 534 534 .scan_index = ADIS16400_SCAN_ACC_ ## mod, \ 535 535 .scan_type = { \ ··· 545 545 .type = IIO_MAGN, \ 546 546 .modified = 1, \ 547 547 .channel2 = IIO_MOD_ ## mod, \ 548 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 549 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 550 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, \ 548 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 549 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 550 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 551 551 .address = (addr), \ 552 552 .scan_index = ADIS16400_SCAN_MAGN_ ## mod, \ 553 553 .scan_type = { \ ··· 568 568 .indexed = 1, \ 569 569 .channel = 0, \ 570 570 .extend_name = ADIS16400_MOD_TEMP_NAME_ ## mod, \ 571 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 572 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \ 573 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \ 574 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, \ 571 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 572 + BIT(IIO_CHAN_INFO_OFFSET) | \ 573 + BIT(IIO_CHAN_INFO_SCALE), \ 574 + .info_mask_shared_by_type = \ 575 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 575 576 .address = (addr), \ 576 577 .scan_index = ADIS16350_SCAN_TEMP_ ## mod, \ 577 578 .scan_type = { \ ··· 588 587 .type = IIO_TEMP, \ 589 588 .indexed = 1, \ 590 589 .channel = 0, \ 591 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 592 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \ 593 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 590 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 591 + BIT(IIO_CHAN_INFO_OFFSET) | \ 592 + BIT(IIO_CHAN_INFO_SCALE), \ 594 593 .address = (addr), \ 595 594 .scan_index = ADIS16350_SCAN_TEMP_X, \ 596 595 .scan_type = { \ ··· 606 605 .type = IIO_INCLI, \ 607 606 .modified = 1, \ 608 607 .channel2 = IIO_MOD_ ## mod, \ 609 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 610 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 608 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 609 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 611 610 .address = (addr), \ 612 611 .scan_index = ADIS16300_SCAN_INCLI_ ## mod, \ 613 612 .scan_type = { \ ··· 647 646 ADIS16400_MAGN_CHAN(Z, ADIS16400_ZMAGN_OUT, 16), 648 647 { 649 648 .type = IIO_PRESSURE, 650 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 651 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 649 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 650 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 652 651 .address = ADIS16448_BARO_OUT, 653 652 .scan_index = ADIS16400_SCAN_BARO, 654 653 .scan_type = IIO_ST('s', 16, 16, 0),
+16 -16
drivers/iio/imu/adis16480.c
··· 591 591 } 592 592 } 593 593 594 - #define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info, _bits) \ 594 + #define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info_sep, _bits) \ 595 595 { \ 596 596 .type = (_type), \ 597 597 .modified = 1, \ 598 598 .channel2 = (_mod), \ 599 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 600 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \ 601 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 602 - _info, \ 599 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 600 + BIT(IIO_CHAN_INFO_CALIBBIAS) | \ 601 + _info_sep, \ 602 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 603 603 .address = (_address), \ 604 604 .scan_index = (_si), \ 605 605 .scan_type = { \ ··· 613 613 #define ADIS16480_GYRO_CHANNEL(_mod) \ 614 614 ADIS16480_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \ 615 615 ADIS16480_REG_ ## _mod ## _GYRO_OUT, ADIS16480_SCAN_GYRO_ ## _mod, \ 616 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT | \ 617 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, \ 616 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \ 617 + BIT(IIO_CHAN_INFO_CALIBSCALE), \ 618 618 32) 619 619 620 620 #define ADIS16480_ACCEL_CHANNEL(_mod) \ 621 621 ADIS16480_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \ 622 622 ADIS16480_REG_ ## _mod ## _ACCEL_OUT, ADIS16480_SCAN_ACCEL_ ## _mod, \ 623 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT | \ 624 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, \ 623 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \ 624 + BIT(IIO_CHAN_INFO_CALIBSCALE), \ 625 625 32) 626 626 627 627 #define ADIS16480_MAGN_CHANNEL(_mod) \ 628 628 ADIS16480_MOD_CHANNEL(IIO_MAGN, IIO_MOD_ ## _mod, \ 629 629 ADIS16480_REG_ ## _mod ## _MAGN_OUT, ADIS16480_SCAN_MAGN_ ## _mod, \ 630 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT, \ 630 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 631 631 16) 632 632 633 633 #define ADIS16480_PRESSURE_CHANNEL() \ ··· 635 635 .type = IIO_PRESSURE, \ 636 636 .indexed = 1, \ 637 637 .channel = 0, \ 638 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 639 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \ 640 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 638 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 639 + BIT(IIO_CHAN_INFO_CALIBBIAS) | \ 640 + BIT(IIO_CHAN_INFO_SCALE), \ 641 641 .address = ADIS16480_REG_BAROM_OUT, \ 642 642 .scan_index = ADIS16480_SCAN_BARO, \ 643 643 .scan_type = { \ ··· 652 652 .type = IIO_TEMP, \ 653 653 .indexed = 1, \ 654 654 .channel = 0, \ 655 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 656 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \ 657 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, \ 655 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 656 + BIT(IIO_CHAN_INFO_SCALE) | \ 657 + BIT(IIO_CHAN_INFO_OFFSET), \ 658 658 .address = ADIS16480_REG_TEMP_OUT, \ 659 659 .scan_index = ADIS16480_SCAN_TEMP, \ 660 660 .scan_type = { \
+5 -5
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
··· 544 544 .type = _type, \ 545 545 .modified = 1, \ 546 546 .channel2 = _channel2, \ 547 - .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT \ 548 - | IIO_CHAN_INFO_RAW_SEPARATE_BIT, \ 547 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 548 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 549 549 .scan_index = _index, \ 550 550 .scan_type = { \ 551 551 .sign = 's', \ ··· 564 564 */ 565 565 { 566 566 .type = IIO_TEMP, 567 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT 568 - | IIO_CHAN_INFO_OFFSET_SEPARATE_BIT 569 - | IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 567 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) 568 + | BIT(IIO_CHAN_INFO_OFFSET) 569 + | BIT(IIO_CHAN_INFO_SCALE), 570 570 .scan_index = -1, 571 571 }, 572 572 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
+2 -3
drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c
··· 105 105 s64 timestamp; 106 106 107 107 timestamp = iio_get_time_ns(); 108 - spin_lock(&st->time_stamp_lock); 109 - kfifo_in(&st->timestamps, &timestamp, 1); 110 - spin_unlock(&st->time_stamp_lock); 108 + kfifo_in_spinlocked(&st->timestamps, &timestamp, 1, 109 + &st->time_stamp_lock); 111 110 112 111 return IRQ_WAKE_THREAD; 113 112 }
+27 -10
drivers/iio/industrialio-core.c
··· 691 691 692 692 if (chan->channel < 0) 693 693 return 0; 694 - for_each_set_bit(i, &chan->info_mask, sizeof(long)*8) { 695 - ret = __iio_add_chan_devattr(iio_chan_info_postfix[i/2], 694 + for_each_set_bit(i, &chan->info_mask_separate, sizeof(long)*8) { 695 + ret = __iio_add_chan_devattr(iio_chan_info_postfix[i], 696 696 chan, 697 697 &iio_read_channel_info, 698 698 &iio_write_channel_info, 699 - i/2, 700 - !(i%2), 699 + i, 700 + 0, 701 701 &indio_dev->dev, 702 702 &indio_dev->channel_attr_list); 703 - if (ret == -EBUSY && (i%2 == 0)) { 704 - ret = 0; 705 - continue; 706 - } 707 703 if (ret < 0) 708 704 goto error_ret; 705 + attrcount++; 706 + } 707 + for_each_set_bit(i, &chan->info_mask_shared_by_type, sizeof(long)*8) { 708 + ret = __iio_add_chan_devattr(iio_chan_info_postfix[i], 709 + chan, 710 + &iio_read_channel_info, 711 + &iio_write_channel_info, 712 + i, 713 + 1, 714 + &indio_dev->dev, 715 + &indio_dev->channel_attr_list); 716 + if (ret == -EBUSY) { 717 + ret = 0; 718 + continue; 719 + } else if (ret < 0) { 720 + goto error_ret; 721 + } 709 722 attrcount++; 710 723 } 711 724 ··· 860 847 kfree(indio_dev); 861 848 } 862 849 863 - static struct device_type iio_dev_type = { 850 + struct device_type iio_device_type = { 864 851 .name = "iio_device", 865 852 .release = iio_dev_release, 866 853 }; ··· 882 869 883 870 if (dev) { 884 871 dev->dev.groups = dev->groups; 885 - dev->dev.type = &iio_dev_type; 872 + dev->dev.type = &iio_device_type; 886 873 dev->dev.bus = &iio_bus_type; 887 874 device_initialize(&dev->dev); 888 875 dev_set_drvdata(&dev->dev, (void *)dev); ··· 972 959 int iio_device_register(struct iio_dev *indio_dev) 973 960 { 974 961 int ret; 962 + 963 + /* If the calling driver did not initialize of_node, do it here */ 964 + if (!indio_dev->dev.of_node && indio_dev->dev.parent) 965 + indio_dev->dev.of_node = indio_dev->dev.parent->of_node; 975 966 976 967 /* configure elements for the chrdev */ 977 968 indio_dev->dev.devt = MKDEV(MAJOR(iio_devt), indio_dev->id);
+15 -14
drivers/iio/industrialio-event.c
··· 46 46 { 47 47 struct iio_event_interface *ev_int = indio_dev->event_interface; 48 48 struct iio_event_data ev; 49 + unsigned long flags; 49 50 int copied; 50 51 51 52 /* Does anyone care? */ 52 - spin_lock(&ev_int->wait.lock); 53 + spin_lock_irqsave(&ev_int->wait.lock, flags); 53 54 if (test_bit(IIO_BUSY_BIT_POS, &ev_int->flags)) { 54 55 55 56 ev.id = ev_code; ··· 60 59 if (copied != 0) 61 60 wake_up_locked_poll(&ev_int->wait, POLLIN); 62 61 } 63 - spin_unlock(&ev_int->wait.lock); 62 + spin_unlock_irqrestore(&ev_int->wait.lock, flags); 64 63 65 64 return 0; 66 65 } ··· 77 76 78 77 poll_wait(filep, &ev_int->wait, wait); 79 78 80 - spin_lock(&ev_int->wait.lock); 79 + spin_lock_irq(&ev_int->wait.lock); 81 80 if (!kfifo_is_empty(&ev_int->det_events)) 82 81 events = POLLIN | POLLRDNORM; 83 - spin_unlock(&ev_int->wait.lock); 82 + spin_unlock_irq(&ev_int->wait.lock); 84 83 85 84 return events; 86 85 } ··· 97 96 if (count < sizeof(struct iio_event_data)) 98 97 return -EINVAL; 99 98 100 - spin_lock(&ev_int->wait.lock); 99 + spin_lock_irq(&ev_int->wait.lock); 101 100 if (kfifo_is_empty(&ev_int->det_events)) { 102 101 if (filep->f_flags & O_NONBLOCK) { 103 102 ret = -EAGAIN; 104 103 goto error_unlock; 105 104 } 106 105 /* Blocking on device; waiting for something to be there */ 107 - ret = wait_event_interruptible_locked(ev_int->wait, 106 + ret = wait_event_interruptible_locked_irq(ev_int->wait, 108 107 !kfifo_is_empty(&ev_int->det_events)); 109 108 if (ret) 110 109 goto error_unlock; ··· 114 113 ret = kfifo_to_user(&ev_int->det_events, buf, count, &copied); 115 114 116 115 error_unlock: 117 - spin_unlock(&ev_int->wait.lock); 116 + spin_unlock_irq(&ev_int->wait.lock); 118 117 119 118 return ret ? ret : copied; 120 119 } ··· 123 122 { 124 123 struct iio_event_interface *ev_int = filep->private_data; 125 124 126 - spin_lock(&ev_int->wait.lock); 125 + spin_lock_irq(&ev_int->wait.lock); 127 126 __clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags); 128 127 /* 129 128 * In order to maintain a clean state for reopening, ··· 131 130 * any new __iio_push_event calls running. 132 131 */ 133 132 kfifo_reset_out(&ev_int->det_events); 134 - spin_unlock(&ev_int->wait.lock); 133 + spin_unlock_irq(&ev_int->wait.lock); 135 134 136 135 return 0; 137 136 } ··· 152 151 if (ev_int == NULL) 153 152 return -ENODEV; 154 153 155 - spin_lock(&ev_int->wait.lock); 154 + spin_lock_irq(&ev_int->wait.lock); 156 155 if (__test_and_set_bit(IIO_BUSY_BIT_POS, &ev_int->flags)) { 157 - spin_unlock(&ev_int->wait.lock); 156 + spin_unlock_irq(&ev_int->wait.lock); 158 157 return -EBUSY; 159 158 } 160 - spin_unlock(&ev_int->wait.lock); 159 + spin_unlock_irq(&ev_int->wait.lock); 161 160 fd = anon_inode_getfd("iio:event", 162 161 &iio_event_chrdev_fileops, ev_int, O_RDONLY); 163 162 if (fd < 0) { 164 - spin_lock(&ev_int->wait.lock); 163 + spin_lock_irq(&ev_int->wait.lock); 165 164 __clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags); 166 - spin_unlock(&ev_int->wait.lock); 165 + spin_unlock_irq(&ev_int->wait.lock); 167 166 } 168 167 return fd; 169 168 }
+171
drivers/iio/inkern.c
··· 10 10 #include <linux/export.h> 11 11 #include <linux/slab.h> 12 12 #include <linux/mutex.h> 13 + #include <linux/of.h> 13 14 14 15 #include <linux/iio/iio.h> 15 16 #include "iio_core.h" ··· 93 92 return chan; 94 93 } 95 94 95 + #ifdef CONFIG_OF 96 + 97 + static int iio_dev_node_match(struct device *dev, void *data) 98 + { 99 + return dev->of_node == data && dev->type == &iio_device_type; 100 + } 101 + 102 + static int __of_iio_channel_get(struct iio_channel *channel, 103 + struct device_node *np, int index) 104 + { 105 + struct device *idev; 106 + struct iio_dev *indio_dev; 107 + int err; 108 + struct of_phandle_args iiospec; 109 + 110 + err = of_parse_phandle_with_args(np, "io-channels", 111 + "#io-channel-cells", 112 + index, &iiospec); 113 + if (err) 114 + return err; 115 + 116 + idev = bus_find_device(&iio_bus_type, NULL, iiospec.np, 117 + iio_dev_node_match); 118 + of_node_put(iiospec.np); 119 + if (idev == NULL) 120 + return -EPROBE_DEFER; 121 + 122 + indio_dev = dev_to_iio_dev(idev); 123 + channel->indio_dev = indio_dev; 124 + index = iiospec.args_count ? iiospec.args[0] : 0; 125 + if (index >= indio_dev->num_channels) { 126 + return -EINVAL; 127 + goto err_put; 128 + } 129 + channel->channel = &indio_dev->channels[index]; 130 + 131 + return 0; 132 + 133 + err_put: 134 + iio_device_put(indio_dev); 135 + return err; 136 + } 137 + 138 + static struct iio_channel *of_iio_channel_get(struct device_node *np, int index) 139 + { 140 + struct iio_channel *channel; 141 + int err; 142 + 143 + if (index < 0) 144 + return ERR_PTR(-EINVAL); 145 + 146 + channel = kzalloc(sizeof(*channel), GFP_KERNEL); 147 + if (channel == NULL) 148 + return ERR_PTR(-ENOMEM); 149 + 150 + err = __of_iio_channel_get(channel, np, index); 151 + if (err) 152 + goto err_free_channel; 153 + 154 + return channel; 155 + 156 + err_free_channel: 157 + kfree(channel); 158 + return ERR_PTR(err); 159 + } 160 + 161 + static struct iio_channel *of_iio_channel_get_by_name(struct device_node *np, 162 + const char *name) 163 + { 164 + struct iio_channel *chan = NULL; 165 + 166 + /* Walk up the tree of devices looking for a matching iio channel */ 167 + while (np) { 168 + int index = 0; 169 + 170 + /* 171 + * For named iio channels, first look up the name in the 172 + * "io-channel-names" property. If it cannot be found, the 173 + * index will be an error code, and of_iio_channel_get() 174 + * will fail. 175 + */ 176 + if (name) 177 + index = of_property_match_string(np, "io-channel-names", 178 + name); 179 + chan = of_iio_channel_get(np, index); 180 + if (!IS_ERR(chan)) 181 + break; 182 + else if (name && index >= 0) { 183 + pr_err("ERROR: could not get IIO channel %s:%s(%i)\n", 184 + np->full_name, name ? name : "", index); 185 + return chan; 186 + } 187 + 188 + /* 189 + * No matching IIO channel found on this node. 190 + * If the parent node has a "io-channel-ranges" property, 191 + * then we can try one of its channels. 192 + */ 193 + np = np->parent; 194 + if (np && !of_get_property(np, "io-channel-ranges", NULL)) 195 + break; 196 + } 197 + return chan; 198 + } 199 + 200 + static struct iio_channel *of_iio_channel_get_all(struct device *dev) 201 + { 202 + struct iio_channel *chans; 203 + int i, mapind, nummaps = 0; 204 + int ret; 205 + 206 + do { 207 + ret = of_parse_phandle_with_args(dev->of_node, 208 + "io-channels", 209 + "#io-channel-cells", 210 + nummaps, NULL); 211 + if (ret < 0) 212 + break; 213 + } while (++nummaps); 214 + 215 + if (nummaps == 0) /* no error, return NULL to search map table */ 216 + return NULL; 217 + 218 + /* NULL terminated array to save passing size */ 219 + chans = kcalloc(nummaps + 1, sizeof(*chans), GFP_KERNEL); 220 + if (chans == NULL) 221 + return ERR_PTR(-ENOMEM); 222 + 223 + /* Search for OF matches */ 224 + for (mapind = 0; mapind < nummaps; mapind++) { 225 + ret = __of_iio_channel_get(&chans[mapind], dev->of_node, 226 + mapind); 227 + if (ret) 228 + goto error_free_chans; 229 + } 230 + return chans; 231 + 232 + error_free_chans: 233 + for (i = 0; i < mapind; i++) 234 + iio_device_put(chans[i].indio_dev); 235 + kfree(chans); 236 + return ERR_PTR(ret); 237 + } 238 + 239 + #else /* CONFIG_OF */ 240 + 241 + static inline struct iio_channel * 242 + of_iio_channel_get_by_name(struct device_node *np, const char *name) 243 + { 244 + return NULL; 245 + } 246 + 247 + static inline struct iio_channel *of_iio_channel_get_all(struct device *dev) 248 + { 249 + return NULL; 250 + } 251 + 252 + #endif /* CONFIG_OF */ 96 253 97 254 static struct iio_channel *iio_channel_get_sys(const char *name, 98 255 const char *channel_name) ··· 309 150 const char *channel_name) 310 151 { 311 152 const char *name = dev ? dev_name(dev) : NULL; 153 + struct iio_channel *channel; 312 154 155 + if (dev) { 156 + channel = of_iio_channel_get_by_name(dev->of_node, 157 + channel_name); 158 + if (channel != NULL) 159 + return channel; 160 + } 313 161 return iio_channel_get_sys(name, channel_name); 314 162 } 315 163 EXPORT_SYMBOL_GPL(iio_channel_get); ··· 339 173 340 174 if (dev == NULL) 341 175 return ERR_PTR(-EINVAL); 176 + 177 + chans = of_iio_channel_get_all(dev); 178 + if (chans) 179 + return chans; 180 + 342 181 name = dev_name(dev); 343 182 344 183 mutex_lock(&iio_map_list_lock);
+2 -2
drivers/iio/light/adjd_s311.c
··· 207 207 .type = IIO_INTENSITY, \ 208 208 .modified = 1, \ 209 209 .address = (IDX_##_color), \ 210 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 211 - IIO_CHAN_INFO_HARDWAREGAIN_SEPARATE_BIT, \ 210 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 211 + BIT(IIO_CHAN_INFO_HARDWAREGAIN), \ 212 212 .channel2 = (IIO_MOD_LIGHT_##_color), \ 213 213 .scan_index = (_scan_idx), \ 214 214 .scan_type = IIO_ST('u', 10, 16, 0), \
+4 -4
drivers/iio/light/hid-sensor-als.c
··· 49 49 .type = IIO_INTENSITY, 50 50 .modified = 1, 51 51 .channel2 = IIO_MOD_LIGHT_BOTH, 52 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 53 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 54 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 55 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 52 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 53 + BIT(IIO_CHAN_INFO_SCALE) | 54 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 55 + BIT(IIO_CHAN_INFO_HYSTERESIS), 56 56 .scan_index = CHANNEL_SCAN_INDEX_ILLUM, 57 57 } 58 58 };
+3 -3
drivers/iio/light/lm3533-als.c
··· 231 231 .channel = _channel, \ 232 232 .indexed = true, \ 233 233 .output = true, \ 234 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, \ 234 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 235 235 } 236 236 237 237 static const struct iio_chan_spec lm3533_als_channels[] = { ··· 239 239 .type = IIO_LIGHT, 240 240 .channel = 0, 241 241 .indexed = true, 242 - .info_mask = (IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT | 243 - IIO_CHAN_INFO_RAW_SEPARATE_BIT), 242 + .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | 243 + BIT(IIO_CHAN_INFO_RAW), 244 244 }, 245 245 CHANNEL_CURRENT(0), 246 246 CHANNEL_CURRENT(1),
+5 -5
drivers/iio/light/tsl2563.c
··· 530 530 { 531 531 .type = IIO_LIGHT, 532 532 .indexed = 1, 533 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, 533 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 534 534 .channel = 0, 535 535 }, { 536 536 .type = IIO_INTENSITY, 537 537 .modified = 1, 538 538 .channel2 = IIO_MOD_LIGHT_BOTH, 539 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 540 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 539 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 540 + BIT(IIO_CHAN_INFO_CALIBSCALE), 541 541 .event_mask = (IIO_EV_BIT(IIO_EV_TYPE_THRESH, 542 542 IIO_EV_DIR_RISING) | 543 543 IIO_EV_BIT(IIO_EV_TYPE_THRESH, ··· 546 546 .type = IIO_INTENSITY, 547 547 .modified = 1, 548 548 .channel2 = IIO_MOD_LIGHT_IR, 549 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 550 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 549 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 550 + BIT(IIO_CHAN_INFO_CALIBSCALE), 551 551 } 552 552 }; 553 553
+3 -3
drivers/iio/light/vcnl4000.c
··· 93 93 static const struct iio_chan_spec vcnl4000_channels[] = { 94 94 { 95 95 .type = IIO_LIGHT, 96 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 97 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 96 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 97 + BIT(IIO_CHAN_INFO_SCALE), 98 98 }, { 99 99 .type = IIO_PROXIMITY, 100 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 100 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 101 101 } 102 102 }; 103 103
+12 -12
drivers/iio/magnetometer/hid-sensor-magn-3d.c
··· 60 60 .type = IIO_MAGN, 61 61 .modified = 1, 62 62 .channel2 = IIO_MOD_X, 63 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 64 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 65 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 66 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 63 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 64 + BIT(IIO_CHAN_INFO_SCALE) | 65 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 66 + BIT(IIO_CHAN_INFO_HYSTERESIS), 67 67 .scan_index = CHANNEL_SCAN_INDEX_X, 68 68 }, { 69 69 .type = IIO_MAGN, 70 70 .modified = 1, 71 71 .channel2 = IIO_MOD_Y, 72 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 73 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 74 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 75 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 72 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 73 + BIT(IIO_CHAN_INFO_SCALE) | 74 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 75 + BIT(IIO_CHAN_INFO_HYSTERESIS), 76 76 .scan_index = CHANNEL_SCAN_INDEX_Y, 77 77 }, { 78 78 .type = IIO_MAGN, 79 79 .modified = 1, 80 80 .channel2 = IIO_MOD_Z, 81 - .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | 82 - IIO_CHAN_INFO_SCALE_SHARED_BIT | 83 - IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT | 84 - IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT, 81 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) | 82 + BIT(IIO_CHAN_INFO_SCALE) | 83 + BIT(IIO_CHAN_INFO_SAMP_FREQ) | 84 + BIT(IIO_CHAN_INFO_HYSTERESIS), 85 85 .scan_index = CHANNEL_SCAN_INDEX_Z, 86 86 } 87 87 };
-8
drivers/staging/iio/Kconfig
··· 4 4 menu "IIO staging drivers" 5 5 depends on IIO 6 6 7 - config IIO_ST_HWMON 8 - tristate "Hwmon driver that uses channels specified via iio maps" 9 - depends on HWMON 10 - help 11 - This is a platform driver that in combination with a suitable 12 - map allows IIO devices to provide basic hwmon functionality 13 - for those channels specified in the map. 14 - 15 7 source "drivers/staging/iio/accel/Kconfig" 16 8 source "drivers/staging/iio/adc/Kconfig" 17 9 source "drivers/staging/iio/addac/Kconfig"
-2
drivers/staging/iio/Makefile
··· 9 9 10 10 obj-$(CONFIG_IIO_DUMMY_EVGEN) += iio_dummy_evgen.o 11 11 12 - obj-$(CONFIG_IIO_ST_HWMON) += iio_hwmon.o 13 - 14 12 obj-y += accel/ 15 13 obj-y += adc/ 16 14 obj-y += addac/
+4 -4
drivers/staging/iio/accel/adis16201_core.c
··· 134 134 ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT, ADIS16201_SCAN_SUPPLY, 12), 135 135 ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT, ADIS16201_SCAN_TEMP, 12), 136 136 ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT, ADIS16201_SCAN_ACC_X, 137 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 137 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 138 138 ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT, ADIS16201_SCAN_ACC_Y, 139 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 139 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 140 140 ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC, ADIS16201_SCAN_AUX_ADC, 12), 141 141 ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT, ADIS16201_SCAN_INCLI_X, 142 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 142 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 143 143 ADIS_INCLI_CHAN(X, ADIS16201_YINCL_OUT, ADIS16201_SCAN_INCLI_Y, 144 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 144 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 145 145 IIO_CHAN_SOFT_TIMESTAMP(7) 146 146 }; 147 147
+1 -1
drivers/staging/iio/accel/adis16203_core.c
··· 102 102 ADIS_SUPPLY_CHAN(ADIS16203_SUPPLY_OUT, ADIS16203_SCAN_SUPPLY, 12), 103 103 ADIS_AUX_ADC_CHAN(ADIS16203_AUX_ADC, ADIS16203_SCAN_AUX_ADC, 12), 104 104 ADIS_INCLI_CHAN(X, ADIS16203_XINCL_OUT, ADIS16203_SCAN_INCLI_X, 105 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 105 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 106 106 /* Fixme: Not what it appears to be - see data sheet */ 107 107 ADIS_INCLI_CHAN(Y, ADIS16203_YINCL_OUT, ADIS16203_SCAN_INCLI_Y, 0, 14), 108 108 ADIS_TEMP_CHAN(ADIS16203_TEMP_OUT, ADIS16203_SCAN_TEMP, 12),
+3 -5
drivers/staging/iio/accel/adis16204_core.c
··· 140 140 ADIS_AUX_ADC_CHAN(ADIS16204_AUX_ADC, ADIS16204_SCAN_AUX_ADC, 12), 141 141 ADIS_TEMP_CHAN(ADIS16204_TEMP_OUT, ADIS16204_SCAN_TEMP, 12), 142 142 ADIS_ACCEL_CHAN(X, ADIS16204_XACCL_OUT, ADIS16204_SCAN_ACC_X, 143 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 144 - IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 14), 143 + BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 14), 145 144 ADIS_ACCEL_CHAN(Y, ADIS16204_YACCL_OUT, ADIS16204_SCAN_ACC_Y, 146 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 147 - IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 14), 145 + BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 14), 148 146 ADIS_ACCEL_CHAN(ROOT_SUM_SQUARED_X_Y, ADIS16204_XY_RSS_OUT, 149 - ADIS16204_SCAN_ACC_XY, IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 14), 147 + ADIS16204_SCAN_ACC_XY, BIT(IIO_CHAN_INFO_PEAK), 14), 150 148 IIO_CHAN_SOFT_TIMESTAMP(5), 151 149 }; 152 150
+2 -2
drivers/staging/iio/accel/adis16209_core.c
··· 133 133 ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT, ADIS16209_SCAN_SUPPLY, 14), 134 134 ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT, ADIS16209_SCAN_TEMP, 12), 135 135 ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT, ADIS16209_SCAN_ACC_X, 136 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 136 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 137 137 ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT, ADIS16209_SCAN_ACC_Y, 138 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 14), 138 + BIT(IIO_CHAN_INFO_CALIBBIAS), 14), 139 139 ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC, ADIS16209_SCAN_AUX_ADC, 12), 140 140 ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT, ADIS16209_SCAN_INCLI_X, 0, 14), 141 141 ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT, ADIS16209_SCAN_INCLI_Y, 0, 14),
+13 -13
drivers/staging/iio/accel/adis16220_core.c
··· 344 344 .indexed = 1, 345 345 .channel = 0, 346 346 .extend_name = "supply", 347 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 348 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 347 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 348 + BIT(IIO_CHAN_INFO_SCALE), 349 349 .address = in_supply, 350 350 }, { 351 351 .type = IIO_ACCEL, 352 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 353 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 354 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 355 - IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 352 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 353 + BIT(IIO_CHAN_INFO_OFFSET) | 354 + BIT(IIO_CHAN_INFO_SCALE) | 355 + BIT(IIO_CHAN_INFO_PEAK), 356 356 .address = accel, 357 357 }, { 358 358 .type = IIO_TEMP, 359 359 .indexed = 1, 360 360 .channel = 0, 361 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 362 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 363 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 361 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 362 + BIT(IIO_CHAN_INFO_OFFSET) | 363 + BIT(IIO_CHAN_INFO_SCALE), 364 364 .address = temp, 365 365 }, { 366 366 .type = IIO_VOLTAGE, 367 367 .indexed = 1, 368 368 .channel = 1, 369 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 370 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 371 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 369 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 370 + BIT(IIO_CHAN_INFO_OFFSET) | 371 + BIT(IIO_CHAN_INFO_SCALE), 372 372 .address = in_1, 373 373 }, { 374 374 .type = IIO_VOLTAGE, 375 375 .indexed = 1, 376 376 .channel = 2, 377 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 377 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 378 378 .address = in_2, 379 379 } 380 380 };
+3 -6
drivers/staging/iio/accel/adis16240_core.c
··· 176 176 ADIS_SUPPLY_CHAN(ADIS16240_SUPPLY_OUT, ADIS16240_SCAN_SUPPLY, 10), 177 177 ADIS_AUX_ADC_CHAN(ADIS16240_AUX_ADC, ADIS16240_SCAN_AUX_ADC, 10), 178 178 ADIS_ACCEL_CHAN(X, ADIS16240_XACCL_OUT, ADIS16240_SCAN_ACC_X, 179 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 180 - IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 10), 179 + BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 10), 181 180 ADIS_ACCEL_CHAN(Y, ADIS16240_YACCL_OUT, ADIS16240_SCAN_ACC_Y, 182 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 183 - IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 10), 181 + BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 10), 184 182 ADIS_ACCEL_CHAN(Z, ADIS16240_ZACCL_OUT, ADIS16240_SCAN_ACC_Z, 185 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 186 - IIO_CHAN_INFO_PEAK_SEPARATE_BIT, 10), 183 + BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 10), 187 184 ADIS_TEMP_CHAN(ADIS16240_TEMP_OUT, ADIS16240_SCAN_TEMP, 10), 188 185 IIO_CHAN_SOFT_TIMESTAMP(6) 189 186 };
+4 -7
drivers/staging/iio/accel/lis3l02dq_core.c
··· 501 501 return IRQ_HANDLED; 502 502 } 503 503 504 - #define LIS3L02DQ_INFO_MASK \ 505 - (IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 506 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 507 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \ 508 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT) 509 - 510 504 #define LIS3L02DQ_EVENT_MASK \ 511 505 (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | \ 512 506 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING)) ··· 510 516 .type = IIO_ACCEL, \ 511 517 .modified = 1, \ 512 518 .channel2 = mod, \ 513 - .info_mask = LIS3L02DQ_INFO_MASK, \ 519 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 520 + BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 521 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 522 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 514 523 .address = index, \ 515 524 .scan_index = index, \ 516 525 .scan_type = { \
+2 -3
drivers/staging/iio/accel/sca3000_core.c
··· 419 419 420 420 static IIO_DEVICE_ATTR(revision, S_IRUGO, sca3000_show_rev, NULL, 0); 421 421 422 - #define SCA3000_INFO_MASK \ 423 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | IIO_CHAN_INFO_SCALE_SHARED_BIT 424 422 #define SCA3000_EVENT_MASK \ 425 423 (IIO_EV_BIT(IIO_EV_TYPE_MAG, IIO_EV_DIR_RISING)) 426 424 ··· 427 429 .type = IIO_ACCEL, \ 428 430 .modified = 1, \ 429 431 .channel2 = mod, \ 430 - .info_mask = SCA3000_INFO_MASK, \ 432 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 433 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 431 434 .address = index, \ 432 435 .scan_index = index, \ 433 436 .scan_type = { \
-7
drivers/staging/iio/adc/Kconfig
··· 90 90 To compile this driver as a module, choose M here: the 91 91 module will be called ad7192. 92 92 93 - config ADT7410 94 - tristate "Analog Devices ADT7310/ADT7410 temperature sensor driver" 95 - depends on I2C || SPI_MASTER 96 - help 97 - Say yes here to build support for Analog Devices ADT7310/ADT7410 98 - temperature sensors. 99 - 100 93 config AD7280 101 94 tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" 102 95 depends on SPI
-1
drivers/staging/iio/adc/Makefile
··· 16 16 obj-$(CONFIG_AD7780) += ad7780.o 17 17 obj-$(CONFIG_AD7816) += ad7816.o 18 18 obj-$(CONFIG_AD7192) += ad7192.o 19 - obj-$(CONFIG_ADT7410) += adt7410.o 20 19 obj-$(CONFIG_AD7280) += ad7280a.o 21 20 obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o 22 21 obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
+6 -6
drivers/staging/iio/adc/ad7280a.c
··· 503 503 st->channels[cnt].channel = (dev * 6) + ch - 6; 504 504 } 505 505 st->channels[cnt].indexed = 1; 506 - st->channels[cnt].info_mask = 507 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 508 - IIO_CHAN_INFO_SCALE_SHARED_BIT; 506 + st->channels[cnt].info_mask_separate = 507 + BIT(IIO_CHAN_INFO_RAW); 508 + st->channels[cnt].info_mask_shared_by_type = 509 + BIT(IIO_CHAN_INFO_SCALE); 509 510 st->channels[cnt].address = 510 511 AD7280A_DEVADDR(dev) << 8 | ch; 511 512 st->channels[cnt].scan_index = cnt; ··· 522 521 st->channels[cnt].channel2 = dev * 6; 523 522 st->channels[cnt].address = AD7280A_ALL_CELLS; 524 523 st->channels[cnt].indexed = 1; 525 - st->channels[cnt].info_mask = 526 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 527 - IIO_CHAN_INFO_SCALE_SHARED_BIT; 524 + st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 525 + st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 528 526 st->channels[cnt].scan_index = cnt; 529 527 st->channels[cnt].scan_type.sign = 'u'; 530 528 st->channels[cnt].scan_type.realbits = 32;
+5 -5
drivers/staging/iio/adc/ad7291.c
··· 536 536 #define AD7291_VOLTAGE_CHAN(_chan) \ 537 537 { \ 538 538 .type = IIO_VOLTAGE, \ 539 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 540 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 539 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 540 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 541 541 .indexed = 1, \ 542 542 .channel = _chan, \ 543 543 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)|\ ··· 555 555 AD7291_VOLTAGE_CHAN(7), 556 556 { 557 557 .type = IIO_TEMP, 558 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 559 - IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT | 560 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 558 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 559 + BIT(IIO_CHAN_INFO_AVERAGE_RAW) | 560 + BIT(IIO_CHAN_INFO_SCALE), 561 561 .indexed = 1, 562 562 .channel = 0, 563 563 .event_mask =
+2 -2
drivers/staging/iio/adc/ad7606_core.c
··· 235 235 .indexed = 1, \ 236 236 .channel = num, \ 237 237 .address = num, \ 238 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 239 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 238 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 239 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 240 240 .scan_index = num, \ 241 241 .scan_type = IIO_ST('s', 16, 16, 0), \ 242 242 }
+38 -38
drivers/staging/iio/adc/ad799x_core.c
··· 467 467 .type = IIO_VOLTAGE, 468 468 .indexed = 1, 469 469 .channel = 0, 470 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 470 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 471 471 .scan_index = 0, 472 472 .scan_type = IIO_ST('u', 12, 16, 0), 473 473 }, ··· 475 475 .type = IIO_VOLTAGE, 476 476 .indexed = 1, 477 477 .channel = 1, 478 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 478 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 479 479 .scan_index = 1, 480 480 .scan_type = IIO_ST('u', 12, 16, 0), 481 481 }, ··· 483 483 .type = IIO_VOLTAGE, 484 484 .indexed = 1, 485 485 .channel = 2, 486 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 486 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 487 487 .scan_index = 2, 488 488 .scan_type = IIO_ST('u', 12, 16, 0), 489 489 }, ··· 491 491 .type = IIO_VOLTAGE, 492 492 .indexed = 1, 493 493 .channel = 3, 494 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 494 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 495 495 .scan_index = 3, 496 496 .scan_type = IIO_ST('u', 12, 16, 0), 497 497 }, ··· 507 507 .type = IIO_VOLTAGE, 508 508 .indexed = 1, 509 509 .channel = 0, 510 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 510 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 511 511 .scan_index = 0, 512 512 .scan_type = IIO_ST('u', 10, 16, 2), 513 513 }, ··· 515 515 .type = IIO_VOLTAGE, 516 516 .indexed = 1, 517 517 .channel = 1, 518 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 518 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 519 519 .scan_index = 1, 520 520 .scan_type = IIO_ST('u', 10, 16, 2), 521 521 }, ··· 523 523 .type = IIO_VOLTAGE, 524 524 .indexed = 1, 525 525 .channel = 2, 526 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 526 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 527 527 .scan_index = 2, 528 528 .scan_type = IIO_ST('u', 10, 16, 2), 529 529 }, ··· 531 531 .type = IIO_VOLTAGE, 532 532 .indexed = 1, 533 533 .channel = 3, 534 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 534 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 535 535 .scan_index = 3, 536 536 .scan_type = IIO_ST('u', 10, 16, 2), 537 537 }, ··· 547 547 .type = IIO_VOLTAGE, 548 548 .indexed = 1, 549 549 .channel = 0, 550 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 550 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 551 551 .scan_index = 0, 552 552 .scan_type = IIO_ST('u', 8, 16, 4), 553 553 }, ··· 555 555 .type = IIO_VOLTAGE, 556 556 .indexed = 1, 557 557 .channel = 1, 558 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 558 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 559 559 .scan_index = 1, 560 560 .scan_type = IIO_ST('u', 8, 16, 4), 561 561 }, ··· 563 563 .type = IIO_VOLTAGE, 564 564 .indexed = 1, 565 565 .channel = 2, 566 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 566 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 567 567 .scan_index = 2, 568 568 .scan_type = IIO_ST('u', 8, 16, 4), 569 569 }, ··· 571 571 .type = IIO_VOLTAGE, 572 572 .indexed = 1, 573 573 .channel = 3, 574 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 574 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 575 575 .scan_index = 3, 576 576 .scan_type = IIO_ST('u', 8, 16, 4), 577 577 }, ··· 587 587 .type = IIO_VOLTAGE, 588 588 .indexed = 1, 589 589 .channel = 0, 590 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 590 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 591 591 .scan_index = 0, 592 592 .scan_type = IIO_ST('u', 12, 16, 0), 593 593 .event_mask = AD799X_EV_MASK, ··· 596 596 .type = IIO_VOLTAGE, 597 597 .indexed = 1, 598 598 .channel = 1, 599 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 599 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 600 600 .scan_index = 1, 601 601 .scan_type = IIO_ST('u', 12, 16, 0), 602 602 .event_mask = AD799X_EV_MASK, ··· 614 614 .type = IIO_VOLTAGE, 615 615 .indexed = 1, 616 616 .channel = 0, 617 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 617 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 618 618 .scan_index = 0, 619 619 .scan_type = IIO_ST('u', 10, 16, 2), 620 620 .event_mask = AD799X_EV_MASK, ··· 624 624 .indexed = 1, 625 625 .channel = 1, 626 626 .scan_index = 1, 627 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 627 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 628 628 .scan_type = IIO_ST('u', 10, 16, 2), 629 629 .event_mask = AD799X_EV_MASK, 630 630 }, ··· 632 632 .type = IIO_VOLTAGE, 633 633 .indexed = 1, 634 634 .channel = 2, 635 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 635 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 636 636 .scan_index = 2, 637 637 .scan_type = IIO_ST('u', 10, 16, 2), 638 638 .event_mask = AD799X_EV_MASK, ··· 641 641 .type = IIO_VOLTAGE, 642 642 .indexed = 1, 643 643 .channel = 3, 644 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 644 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 645 645 .scan_index = 3, 646 646 .scan_type = IIO_ST('u', 10, 16, 2), 647 647 .event_mask = AD799X_EV_MASK, ··· 659 659 .type = IIO_VOLTAGE, 660 660 .indexed = 1, 661 661 .channel = 0, 662 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 662 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 663 663 .scan_index = 0, 664 664 .scan_type = IIO_ST('u', 12, 16, 0), 665 665 .event_mask = AD799X_EV_MASK, ··· 668 668 .type = IIO_VOLTAGE, 669 669 .indexed = 1, 670 670 .channel = 1, 671 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 671 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 672 672 .scan_index = 1, 673 673 .scan_type = IIO_ST('u', 12, 16, 0), 674 674 .event_mask = AD799X_EV_MASK, ··· 677 677 .type = IIO_VOLTAGE, 678 678 .indexed = 1, 679 679 .channel = 2, 680 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 680 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 681 681 .scan_index = 2, 682 682 .scan_type = IIO_ST('u', 12, 16, 0), 683 683 .event_mask = AD799X_EV_MASK, ··· 686 686 .type = IIO_VOLTAGE, 687 687 .indexed = 1, 688 688 .channel = 3, 689 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 689 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 690 690 .scan_index = 3, 691 691 .scan_type = IIO_ST('u', 12, 16, 0), 692 692 .event_mask = AD799X_EV_MASK, ··· 704 704 .type = IIO_VOLTAGE, 705 705 .indexed = 1, 706 706 .channel = 0, 707 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 707 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 708 708 .scan_index = 0, 709 709 .scan_type = IIO_ST('u', 10, 16, 2), 710 710 .event_mask = AD799X_EV_MASK, ··· 713 713 .type = IIO_VOLTAGE, 714 714 .indexed = 1, 715 715 .channel = 1, 716 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 716 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 717 717 .scan_index = 1, 718 718 .scan_type = IIO_ST('u', 10, 16, 2), 719 719 .event_mask = AD799X_EV_MASK, ··· 722 722 .type = IIO_VOLTAGE, 723 723 .indexed = 1, 724 724 .channel = 2, 725 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 725 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 726 726 .scan_index = 2, 727 727 .scan_type = IIO_ST('u', 10, 16, 2), 728 728 .event_mask = AD799X_EV_MASK, ··· 731 731 .type = IIO_VOLTAGE, 732 732 .indexed = 1, 733 733 .channel = 3, 734 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 734 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 735 735 .scan_index = 3, 736 736 .scan_type = IIO_ST('u', 10, 16, 2), 737 737 .event_mask = AD799X_EV_MASK, ··· 740 740 .type = IIO_VOLTAGE, 741 741 .indexed = 1, 742 742 .channel = 4, 743 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 743 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 744 744 .scan_index = 4, 745 745 .scan_type = IIO_ST('u', 10, 16, 2), 746 746 }, ··· 748 748 .type = IIO_VOLTAGE, 749 749 .indexed = 1, 750 750 .channel = 5, 751 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 751 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 752 752 .scan_index = 5, 753 753 .scan_type = IIO_ST('u', 10, 16, 2), 754 754 }, ··· 756 756 .type = IIO_VOLTAGE, 757 757 .indexed = 1, 758 758 .channel = 6, 759 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 759 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 760 760 .scan_index = 6, 761 761 .scan_type = IIO_ST('u', 10, 16, 2), 762 762 }, ··· 764 764 .type = IIO_VOLTAGE, 765 765 .indexed = 1, 766 766 .channel = 7, 767 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 767 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 768 768 .scan_index = 7, 769 769 .scan_type = IIO_ST('u', 10, 16, 2), 770 770 }, ··· 781 781 .type = IIO_VOLTAGE, 782 782 .indexed = 1, 783 783 .channel = 0, 784 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 784 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 785 785 .scan_index = 0, 786 786 .scan_type = IIO_ST('u', 12, 16, 0), 787 787 .event_mask = AD799X_EV_MASK, ··· 790 790 .type = IIO_VOLTAGE, 791 791 .indexed = 1, 792 792 .channel = 1, 793 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 793 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 794 794 .scan_index = 1, 795 795 .scan_type = IIO_ST('u', 12, 16, 0), 796 796 .event_mask = AD799X_EV_MASK, ··· 799 799 .type = IIO_VOLTAGE, 800 800 .indexed = 1, 801 801 .channel = 2, 802 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 802 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 803 803 .scan_index = 2, 804 804 .scan_type = IIO_ST('u', 12, 16, 0), 805 805 .event_mask = AD799X_EV_MASK, ··· 808 808 .type = IIO_VOLTAGE, 809 809 .indexed = 1, 810 810 .channel = 3, 811 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 811 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 812 812 .scan_index = 3, 813 813 .scan_type = IIO_ST('u', 12, 16, 0), 814 814 .event_mask = AD799X_EV_MASK, ··· 817 817 .type = IIO_VOLTAGE, 818 818 .indexed = 1, 819 819 .channel = 4, 820 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 820 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 821 821 .scan_index = 4, 822 822 .scan_type = IIO_ST('u', 12, 16, 0), 823 823 }, ··· 825 825 .type = IIO_VOLTAGE, 826 826 .indexed = 1, 827 827 .channel = 5, 828 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 828 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 829 829 .scan_index = 5, 830 830 .scan_type = IIO_ST('u', 12, 16, 0), 831 831 }, ··· 833 833 .type = IIO_VOLTAGE, 834 834 .indexed = 1, 835 835 .channel = 6, 836 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 836 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 837 837 .scan_index = 6, 838 838 .scan_type = IIO_ST('u', 12, 16, 0), 839 839 }, ··· 841 841 .type = IIO_VOLTAGE, 842 842 .indexed = 1, 843 843 .channel = 7, 844 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 844 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 845 845 .scan_index = 7, 846 846 .scan_type = IIO_ST('u', 12, 16, 0), 847 847 },
-1102
drivers/staging/iio/adc/adt7410.c
··· 1 - /* 2 - * ADT7410 digital temperature sensor driver supporting ADT7310/ADT7410 3 - * 4 - * Copyright 2010 Analog Devices Inc. 5 - * 6 - * Licensed under the GPL-2 or later. 7 - */ 8 - 9 - #include <linux/interrupt.h> 10 - #include <linux/device.h> 11 - #include <linux/kernel.h> 12 - #include <linux/slab.h> 13 - #include <linux/sysfs.h> 14 - #include <linux/list.h> 15 - #include <linux/i2c.h> 16 - #include <linux/spi/spi.h> 17 - #include <linux/module.h> 18 - 19 - #include <linux/iio/iio.h> 20 - #include <linux/iio/sysfs.h> 21 - #include <linux/iio/events.h> 22 - 23 - /* 24 - * ADT7410 registers definition 25 - */ 26 - 27 - #define ADT7410_TEMPERATURE 0 28 - #define ADT7410_STATUS 2 29 - #define ADT7410_CONFIG 3 30 - #define ADT7410_T_ALARM_HIGH 4 31 - #define ADT7410_T_ALARM_LOW 6 32 - #define ADT7410_T_CRIT 8 33 - #define ADT7410_T_HYST 0xA 34 - #define ADT7410_ID 0xB 35 - #define ADT7410_RESET 0x2F 36 - 37 - /* 38 - * ADT7310 registers definition 39 - */ 40 - 41 - #define ADT7310_STATUS 0 42 - #define ADT7310_CONFIG 1 43 - #define ADT7310_TEMPERATURE 2 44 - #define ADT7310_ID 3 45 - #define ADT7310_T_CRIT 4 46 - #define ADT7310_T_HYST 5 47 - #define ADT7310_T_ALARM_HIGH 6 48 - #define ADT7310_T_ALARM_LOW 7 49 - 50 - /* 51 - * ADT7410 status 52 - */ 53 - #define ADT7410_STAT_T_LOW 0x10 54 - #define ADT7410_STAT_T_HIGH 0x20 55 - #define ADT7410_STAT_T_CRIT 0x40 56 - #define ADT7410_STAT_NOT_RDY 0x80 57 - 58 - /* 59 - * ADT7410 config 60 - */ 61 - #define ADT7410_FAULT_QUEUE_MASK 0x3 62 - #define ADT7410_CT_POLARITY 0x4 63 - #define ADT7410_INT_POLARITY 0x8 64 - #define ADT7410_EVENT_MODE 0x10 65 - #define ADT7410_MODE_MASK 0x60 66 - #define ADT7410_ONESHOT 0x20 67 - #define ADT7410_SPS 0x40 68 - #define ADT7410_PD 0x60 69 - #define ADT7410_RESOLUTION 0x80 70 - 71 - /* 72 - * ADT7410 masks 73 - */ 74 - #define ADT7410_T16_VALUE_SIGN 0x8000 75 - #define ADT7410_T16_VALUE_FLOAT_OFFSET 7 76 - #define ADT7410_T16_VALUE_FLOAT_MASK 0x7F 77 - #define ADT7410_T13_VALUE_SIGN 0x1000 78 - #define ADT7410_T13_VALUE_OFFSET 3 79 - #define ADT7410_T13_VALUE_FLOAT_OFFSET 4 80 - #define ADT7410_T13_VALUE_FLOAT_MASK 0xF 81 - #define ADT7410_T_HYST_MASK 0xF 82 - #define ADT7410_DEVICE_ID_MASK 0xF 83 - #define ADT7410_MANUFACTORY_ID_MASK 0xF0 84 - #define ADT7410_MANUFACTORY_ID_OFFSET 4 85 - 86 - 87 - #define ADT7310_CMD_REG_MASK 0x28 88 - #define ADT7310_CMD_REG_OFFSET 3 89 - #define ADT7310_CMD_READ 0x40 90 - #define ADT7310_CMD_CON_READ 0x4 91 - 92 - #define ADT7410_IRQS 2 93 - 94 - /* 95 - * struct adt7410_chip_info - chip specifc information 96 - */ 97 - 98 - struct adt7410_chip_info; 99 - 100 - struct adt7410_ops { 101 - int (*read_word)(struct adt7410_chip_info *, u8 reg, u16 *data); 102 - int (*write_word)(struct adt7410_chip_info *, u8 reg, u16 data); 103 - int (*read_byte)(struct adt7410_chip_info *, u8 reg, u8 *data); 104 - int (*write_byte)(struct adt7410_chip_info *, u8 reg, u8 data); 105 - }; 106 - 107 - struct adt7410_chip_info { 108 - struct device *dev; 109 - u8 config; 110 - 111 - const struct adt7410_ops *ops; 112 - }; 113 - 114 - static int adt7410_read_word(struct adt7410_chip_info *chip, u8 reg, u16 *data) 115 - { 116 - return chip->ops->read_word(chip, reg, data); 117 - } 118 - 119 - static int adt7410_write_word(struct adt7410_chip_info *chip, u8 reg, u16 data) 120 - { 121 - return chip->ops->write_word(chip, reg, data); 122 - } 123 - 124 - static int adt7410_read_byte(struct adt7410_chip_info *chip, u8 reg, u8 *data) 125 - { 126 - return chip->ops->read_byte(chip, reg, data); 127 - } 128 - 129 - static int adt7410_write_byte(struct adt7410_chip_info *chip, u8 reg, u8 data) 130 - { 131 - return chip->ops->write_byte(chip, reg, data); 132 - } 133 - 134 - static ssize_t adt7410_show_mode(struct device *dev, 135 - struct device_attribute *attr, 136 - char *buf) 137 - { 138 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 139 - struct adt7410_chip_info *chip = iio_priv(dev_info); 140 - u8 config; 141 - 142 - config = chip->config & ADT7410_MODE_MASK; 143 - 144 - switch (config) { 145 - case ADT7410_PD: 146 - return sprintf(buf, "power-down\n"); 147 - case ADT7410_ONESHOT: 148 - return sprintf(buf, "one-shot\n"); 149 - case ADT7410_SPS: 150 - return sprintf(buf, "sps\n"); 151 - default: 152 - return sprintf(buf, "full\n"); 153 - } 154 - } 155 - 156 - static ssize_t adt7410_store_mode(struct device *dev, 157 - struct device_attribute *attr, 158 - const char *buf, 159 - size_t len) 160 - { 161 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 162 - struct adt7410_chip_info *chip = iio_priv(dev_info); 163 - u16 config; 164 - int ret; 165 - 166 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 167 - if (ret) 168 - return -EIO; 169 - 170 - config = chip->config & (~ADT7410_MODE_MASK); 171 - if (strcmp(buf, "power-down")) 172 - config |= ADT7410_PD; 173 - else if (strcmp(buf, "one-shot")) 174 - config |= ADT7410_ONESHOT; 175 - else if (strcmp(buf, "sps")) 176 - config |= ADT7410_SPS; 177 - 178 - ret = adt7410_write_byte(chip, ADT7410_CONFIG, config); 179 - if (ret) 180 - return -EIO; 181 - 182 - chip->config = config; 183 - 184 - return len; 185 - } 186 - 187 - static IIO_DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, 188 - adt7410_show_mode, 189 - adt7410_store_mode, 190 - 0); 191 - 192 - static ssize_t adt7410_show_available_modes(struct device *dev, 193 - struct device_attribute *attr, 194 - char *buf) 195 - { 196 - return sprintf(buf, "full\none-shot\nsps\npower-down\n"); 197 - } 198 - 199 - static IIO_DEVICE_ATTR(available_modes, S_IRUGO, adt7410_show_available_modes, NULL, 0); 200 - 201 - static ssize_t adt7410_show_resolution(struct device *dev, 202 - struct device_attribute *attr, 203 - char *buf) 204 - { 205 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 206 - struct adt7410_chip_info *chip = iio_priv(dev_info); 207 - int ret; 208 - int bits; 209 - 210 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 211 - if (ret) 212 - return -EIO; 213 - 214 - if (chip->config & ADT7410_RESOLUTION) 215 - bits = 16; 216 - else 217 - bits = 13; 218 - 219 - return sprintf(buf, "%d bits\n", bits); 220 - } 221 - 222 - static ssize_t adt7410_store_resolution(struct device *dev, 223 - struct device_attribute *attr, 224 - const char *buf, 225 - size_t len) 226 - { 227 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 228 - struct adt7410_chip_info *chip = iio_priv(dev_info); 229 - unsigned long data; 230 - u16 config; 231 - int ret; 232 - 233 - ret = strict_strtoul(buf, 10, &data); 234 - if (ret) 235 - return -EINVAL; 236 - 237 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 238 - if (ret) 239 - return -EIO; 240 - 241 - config = chip->config & (~ADT7410_RESOLUTION); 242 - if (data) 243 - config |= ADT7410_RESOLUTION; 244 - 245 - ret = adt7410_write_byte(chip, ADT7410_CONFIG, config); 246 - if (ret) 247 - return -EIO; 248 - 249 - chip->config = config; 250 - 251 - return len; 252 - } 253 - 254 - static IIO_DEVICE_ATTR(resolution, S_IRUGO | S_IWUSR, 255 - adt7410_show_resolution, 256 - adt7410_store_resolution, 257 - 0); 258 - 259 - static ssize_t adt7410_show_id(struct device *dev, 260 - struct device_attribute *attr, 261 - char *buf) 262 - { 263 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 264 - struct adt7410_chip_info *chip = iio_priv(dev_info); 265 - u8 id; 266 - int ret; 267 - 268 - ret = adt7410_read_byte(chip, ADT7410_ID, &id); 269 - if (ret) 270 - return -EIO; 271 - 272 - return sprintf(buf, "device id: 0x%x\nmanufactory id: 0x%x\n", 273 - id & ADT7410_DEVICE_ID_MASK, 274 - (id & ADT7410_MANUFACTORY_ID_MASK) >> ADT7410_MANUFACTORY_ID_OFFSET); 275 - } 276 - 277 - static IIO_DEVICE_ATTR(id, S_IRUGO | S_IWUSR, 278 - adt7410_show_id, 279 - NULL, 280 - 0); 281 - 282 - static ssize_t adt7410_convert_temperature(struct adt7410_chip_info *chip, 283 - u16 data, char *buf) 284 - { 285 - char sign = ' '; 286 - 287 - if (!(chip->config & ADT7410_RESOLUTION)) 288 - data &= ~0x7; 289 - 290 - if (data & ADT7410_T16_VALUE_SIGN) { 291 - /* convert supplement to positive value */ 292 - data = (u16)((ADT7410_T16_VALUE_SIGN << 1) - (u32)data); 293 - sign = '-'; 294 - } 295 - return sprintf(buf, "%c%d.%.7d\n", sign, 296 - (data >> ADT7410_T16_VALUE_FLOAT_OFFSET), 297 - (data & ADT7410_T16_VALUE_FLOAT_MASK) * 78125); 298 - } 299 - 300 - static ssize_t adt7410_show_value(struct device *dev, 301 - struct device_attribute *attr, 302 - char *buf) 303 - { 304 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 305 - struct adt7410_chip_info *chip = iio_priv(dev_info); 306 - u8 status; 307 - u16 data; 308 - int ret, i = 0; 309 - 310 - do { 311 - ret = adt7410_read_byte(chip, ADT7410_STATUS, &status); 312 - if (ret) 313 - return -EIO; 314 - i++; 315 - if (i == 10000) 316 - return -EIO; 317 - } while (status & ADT7410_STAT_NOT_RDY); 318 - 319 - ret = adt7410_read_word(chip, ADT7410_TEMPERATURE, &data); 320 - if (ret) 321 - return -EIO; 322 - 323 - return adt7410_convert_temperature(chip, data, buf); 324 - } 325 - 326 - static IIO_DEVICE_ATTR(value, S_IRUGO, adt7410_show_value, NULL, 0); 327 - 328 - static struct attribute *adt7410_attributes[] = { 329 - &iio_dev_attr_available_modes.dev_attr.attr, 330 - &iio_dev_attr_mode.dev_attr.attr, 331 - &iio_dev_attr_resolution.dev_attr.attr, 332 - &iio_dev_attr_id.dev_attr.attr, 333 - &iio_dev_attr_value.dev_attr.attr, 334 - NULL, 335 - }; 336 - 337 - static const struct attribute_group adt7410_attribute_group = { 338 - .attrs = adt7410_attributes, 339 - }; 340 - 341 - static irqreturn_t adt7410_event_handler(int irq, void *private) 342 - { 343 - struct iio_dev *indio_dev = private; 344 - struct adt7410_chip_info *chip = iio_priv(indio_dev); 345 - s64 timestamp = iio_get_time_ns(); 346 - u8 status; 347 - 348 - if (adt7410_read_byte(chip, ADT7410_STATUS, &status)) 349 - return IRQ_HANDLED; 350 - 351 - if (status & ADT7410_STAT_T_HIGH) 352 - iio_push_event(indio_dev, 353 - IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, 354 - IIO_EV_TYPE_THRESH, 355 - IIO_EV_DIR_RISING), 356 - timestamp); 357 - if (status & ADT7410_STAT_T_LOW) 358 - iio_push_event(indio_dev, 359 - IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, 360 - IIO_EV_TYPE_THRESH, 361 - IIO_EV_DIR_FALLING), 362 - timestamp); 363 - if (status & ADT7410_STAT_T_CRIT) 364 - iio_push_event(indio_dev, 365 - IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, 366 - IIO_EV_TYPE_THRESH, 367 - IIO_EV_DIR_RISING), 368 - timestamp); 369 - 370 - return IRQ_HANDLED; 371 - } 372 - 373 - static ssize_t adt7410_show_event_mode(struct device *dev, 374 - struct device_attribute *attr, 375 - char *buf) 376 - { 377 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 378 - struct adt7410_chip_info *chip = iio_priv(dev_info); 379 - int ret; 380 - 381 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 382 - if (ret) 383 - return -EIO; 384 - 385 - if (chip->config & ADT7410_EVENT_MODE) 386 - return sprintf(buf, "interrupt\n"); 387 - else 388 - return sprintf(buf, "comparator\n"); 389 - } 390 - 391 - static ssize_t adt7410_set_event_mode(struct device *dev, 392 - struct device_attribute *attr, 393 - const char *buf, 394 - size_t len) 395 - { 396 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 397 - struct adt7410_chip_info *chip = iio_priv(dev_info); 398 - u16 config; 399 - int ret; 400 - 401 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 402 - if (ret) 403 - return -EIO; 404 - 405 - config = chip->config &= ~ADT7410_EVENT_MODE; 406 - if (strcmp(buf, "comparator") != 0) 407 - config |= ADT7410_EVENT_MODE; 408 - 409 - ret = adt7410_write_byte(chip, ADT7410_CONFIG, config); 410 - if (ret) 411 - return -EIO; 412 - 413 - chip->config = config; 414 - 415 - return ret; 416 - } 417 - 418 - static ssize_t adt7410_show_available_event_modes(struct device *dev, 419 - struct device_attribute *attr, 420 - char *buf) 421 - { 422 - return sprintf(buf, "comparator\ninterrupt\n"); 423 - } 424 - 425 - static ssize_t adt7410_show_fault_queue(struct device *dev, 426 - struct device_attribute *attr, 427 - char *buf) 428 - { 429 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 430 - struct adt7410_chip_info *chip = iio_priv(dev_info); 431 - int ret; 432 - 433 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 434 - if (ret) 435 - return -EIO; 436 - 437 - return sprintf(buf, "%d\n", chip->config & ADT7410_FAULT_QUEUE_MASK); 438 - } 439 - 440 - static ssize_t adt7410_set_fault_queue(struct device *dev, 441 - struct device_attribute *attr, 442 - const char *buf, 443 - size_t len) 444 - { 445 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 446 - struct adt7410_chip_info *chip = iio_priv(dev_info); 447 - unsigned long data; 448 - int ret; 449 - u8 config; 450 - 451 - ret = strict_strtoul(buf, 10, &data); 452 - if (ret || data > 3) 453 - return -EINVAL; 454 - 455 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 456 - if (ret) 457 - return -EIO; 458 - 459 - config = chip->config & ~ADT7410_FAULT_QUEUE_MASK; 460 - config |= data; 461 - ret = adt7410_write_byte(chip, ADT7410_CONFIG, config); 462 - if (ret) 463 - return -EIO; 464 - 465 - chip->config = config; 466 - 467 - return ret; 468 - } 469 - 470 - static inline ssize_t adt7410_show_t_bound(struct device *dev, 471 - struct device_attribute *attr, 472 - u8 bound_reg, 473 - char *buf) 474 - { 475 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 476 - struct adt7410_chip_info *chip = iio_priv(dev_info); 477 - u16 data; 478 - int ret; 479 - 480 - ret = adt7410_read_word(chip, bound_reg, &data); 481 - if (ret) 482 - return -EIO; 483 - 484 - return adt7410_convert_temperature(chip, data, buf); 485 - } 486 - 487 - static inline ssize_t adt7410_set_t_bound(struct device *dev, 488 - struct device_attribute *attr, 489 - u8 bound_reg, 490 - const char *buf, 491 - size_t len) 492 - { 493 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 494 - struct adt7410_chip_info *chip = iio_priv(dev_info); 495 - long tmp1, tmp2; 496 - u16 data; 497 - char *pos; 498 - int ret; 499 - 500 - pos = strchr(buf, '.'); 501 - 502 - ret = strict_strtol(buf, 10, &tmp1); 503 - 504 - if (ret || tmp1 > 127 || tmp1 < -128) 505 - return -EINVAL; 506 - 507 - if (pos) { 508 - len = strlen(pos); 509 - 510 - if (chip->config & ADT7410_RESOLUTION) { 511 - if (len > ADT7410_T16_VALUE_FLOAT_OFFSET) 512 - len = ADT7410_T16_VALUE_FLOAT_OFFSET; 513 - pos[len] = 0; 514 - ret = strict_strtol(pos, 10, &tmp2); 515 - 516 - if (!ret) 517 - tmp2 = (tmp2 / 78125) * 78125; 518 - } else { 519 - if (len > ADT7410_T13_VALUE_FLOAT_OFFSET) 520 - len = ADT7410_T13_VALUE_FLOAT_OFFSET; 521 - pos[len] = 0; 522 - ret = strict_strtol(pos, 10, &tmp2); 523 - 524 - if (!ret) 525 - tmp2 = (tmp2 / 625) * 625; 526 - } 527 - } 528 - 529 - if (tmp1 < 0) 530 - data = (u16)(-tmp1); 531 - else 532 - data = (u16)tmp1; 533 - 534 - if (chip->config & ADT7410_RESOLUTION) { 535 - data = (data << ADT7410_T16_VALUE_FLOAT_OFFSET) | 536 - (tmp2 & ADT7410_T16_VALUE_FLOAT_MASK); 537 - 538 - if (tmp1 < 0) 539 - /* convert positive value to supplyment */ 540 - data = (u16)((ADT7410_T16_VALUE_SIGN << 1) - (u32)data); 541 - } else { 542 - data = (data << ADT7410_T13_VALUE_FLOAT_OFFSET) | 543 - (tmp2 & ADT7410_T13_VALUE_FLOAT_MASK); 544 - 545 - if (tmp1 < 0) 546 - /* convert positive value to supplyment */ 547 - data = (ADT7410_T13_VALUE_SIGN << 1) - data; 548 - data <<= ADT7410_T13_VALUE_OFFSET; 549 - } 550 - 551 - ret = adt7410_write_word(chip, bound_reg, data); 552 - if (ret) 553 - return -EIO; 554 - 555 - return ret; 556 - } 557 - 558 - static ssize_t adt7410_show_t_alarm_high(struct device *dev, 559 - struct device_attribute *attr, 560 - char *buf) 561 - { 562 - return adt7410_show_t_bound(dev, attr, 563 - ADT7410_T_ALARM_HIGH, buf); 564 - } 565 - 566 - static inline ssize_t adt7410_set_t_alarm_high(struct device *dev, 567 - struct device_attribute *attr, 568 - const char *buf, 569 - size_t len) 570 - { 571 - return adt7410_set_t_bound(dev, attr, 572 - ADT7410_T_ALARM_HIGH, buf, len); 573 - } 574 - 575 - static ssize_t adt7410_show_t_alarm_low(struct device *dev, 576 - struct device_attribute *attr, 577 - char *buf) 578 - { 579 - return adt7410_show_t_bound(dev, attr, 580 - ADT7410_T_ALARM_LOW, buf); 581 - } 582 - 583 - static inline ssize_t adt7410_set_t_alarm_low(struct device *dev, 584 - struct device_attribute *attr, 585 - const char *buf, 586 - size_t len) 587 - { 588 - return adt7410_set_t_bound(dev, attr, 589 - ADT7410_T_ALARM_LOW, buf, len); 590 - } 591 - 592 - static ssize_t adt7410_show_t_crit(struct device *dev, 593 - struct device_attribute *attr, 594 - char *buf) 595 - { 596 - return adt7410_show_t_bound(dev, attr, 597 - ADT7410_T_CRIT, buf); 598 - } 599 - 600 - static inline ssize_t adt7410_set_t_crit(struct device *dev, 601 - struct device_attribute *attr, 602 - const char *buf, 603 - size_t len) 604 - { 605 - return adt7410_set_t_bound(dev, attr, 606 - ADT7410_T_CRIT, buf, len); 607 - } 608 - 609 - static ssize_t adt7410_show_t_hyst(struct device *dev, 610 - struct device_attribute *attr, 611 - char *buf) 612 - { 613 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 614 - struct adt7410_chip_info *chip = iio_priv(dev_info); 615 - int ret; 616 - u8 t_hyst; 617 - 618 - ret = adt7410_read_byte(chip, ADT7410_T_HYST, &t_hyst); 619 - if (ret) 620 - return -EIO; 621 - 622 - return sprintf(buf, "%d\n", t_hyst & ADT7410_T_HYST_MASK); 623 - } 624 - 625 - static inline ssize_t adt7410_set_t_hyst(struct device *dev, 626 - struct device_attribute *attr, 627 - const char *buf, 628 - size_t len) 629 - { 630 - struct iio_dev *dev_info = dev_to_iio_dev(dev); 631 - struct adt7410_chip_info *chip = iio_priv(dev_info); 632 - int ret; 633 - unsigned long data; 634 - u8 t_hyst; 635 - 636 - ret = strict_strtol(buf, 10, &data); 637 - 638 - if (ret || data > ADT7410_T_HYST_MASK) 639 - return -EINVAL; 640 - 641 - t_hyst = (u8)data; 642 - 643 - ret = adt7410_write_byte(chip, ADT7410_T_HYST, t_hyst); 644 - if (ret) 645 - return -EIO; 646 - 647 - return ret; 648 - } 649 - 650 - static IIO_DEVICE_ATTR(event_mode, 651 - S_IRUGO | S_IWUSR, 652 - adt7410_show_event_mode, adt7410_set_event_mode, 0); 653 - static IIO_DEVICE_ATTR(available_event_modes, 654 - S_IRUGO, 655 - adt7410_show_available_event_modes, NULL, 0); 656 - static IIO_DEVICE_ATTR(fault_queue, 657 - S_IRUGO | S_IWUSR, 658 - adt7410_show_fault_queue, adt7410_set_fault_queue, 0); 659 - static IIO_DEVICE_ATTR(t_alarm_high, 660 - S_IRUGO | S_IWUSR, 661 - adt7410_show_t_alarm_high, adt7410_set_t_alarm_high, 0); 662 - static IIO_DEVICE_ATTR(t_alarm_low, 663 - S_IRUGO | S_IWUSR, 664 - adt7410_show_t_alarm_low, adt7410_set_t_alarm_low, 0); 665 - static IIO_DEVICE_ATTR(t_crit, 666 - S_IRUGO | S_IWUSR, 667 - adt7410_show_t_crit, adt7410_set_t_crit, 0); 668 - static IIO_DEVICE_ATTR(t_hyst, 669 - S_IRUGO | S_IWUSR, 670 - adt7410_show_t_hyst, adt7410_set_t_hyst, 0); 671 - 672 - static struct attribute *adt7410_event_int_attributes[] = { 673 - &iio_dev_attr_event_mode.dev_attr.attr, 674 - &iio_dev_attr_available_event_modes.dev_attr.attr, 675 - &iio_dev_attr_fault_queue.dev_attr.attr, 676 - &iio_dev_attr_t_alarm_high.dev_attr.attr, 677 - &iio_dev_attr_t_alarm_low.dev_attr.attr, 678 - &iio_dev_attr_t_crit.dev_attr.attr, 679 - &iio_dev_attr_t_hyst.dev_attr.attr, 680 - NULL, 681 - }; 682 - 683 - static struct attribute_group adt7410_event_attribute_group = { 684 - .attrs = adt7410_event_int_attributes, 685 - .name = "events", 686 - }; 687 - 688 - static const struct iio_info adt7410_info = { 689 - .attrs = &adt7410_attribute_group, 690 - .event_attrs = &adt7410_event_attribute_group, 691 - .driver_module = THIS_MODULE, 692 - }; 693 - 694 - /* 695 - * device probe and remove 696 - */ 697 - 698 - static int adt7410_probe(struct device *dev, int irq, 699 - const char *name, const struct adt7410_ops *ops) 700 - { 701 - unsigned long *adt7410_platform_data = dev->platform_data; 702 - unsigned long local_pdata[] = {0, 0}; 703 - struct adt7410_chip_info *chip; 704 - struct iio_dev *indio_dev; 705 - int ret = 0; 706 - 707 - indio_dev = iio_device_alloc(sizeof(*chip)); 708 - if (indio_dev == NULL) { 709 - ret = -ENOMEM; 710 - goto error_ret; 711 - } 712 - chip = iio_priv(indio_dev); 713 - /* this is only used for device removal purposes */ 714 - dev_set_drvdata(dev, indio_dev); 715 - 716 - chip->dev = dev; 717 - chip->ops = ops; 718 - 719 - indio_dev->name = name; 720 - indio_dev->dev.parent = dev; 721 - indio_dev->info = &adt7410_info; 722 - indio_dev->modes = INDIO_DIRECT_MODE; 723 - 724 - if (!adt7410_platform_data) 725 - adt7410_platform_data = local_pdata; 726 - 727 - /* CT critcal temperature event. line 0 */ 728 - if (irq) { 729 - ret = request_threaded_irq(irq, 730 - NULL, 731 - &adt7410_event_handler, 732 - IRQF_TRIGGER_LOW | IRQF_ONESHOT, 733 - name, 734 - indio_dev); 735 - if (ret) 736 - goto error_free_dev; 737 - } 738 - 739 - /* INT bound temperature alarm event. line 1 */ 740 - if (adt7410_platform_data[0]) { 741 - ret = request_threaded_irq(adt7410_platform_data[0], 742 - NULL, 743 - &adt7410_event_handler, 744 - adt7410_platform_data[1] | 745 - IRQF_ONESHOT, 746 - name, 747 - indio_dev); 748 - if (ret) 749 - goto error_unreg_ct_irq; 750 - } 751 - 752 - ret = adt7410_read_byte(chip, ADT7410_CONFIG, &chip->config); 753 - if (ret) { 754 - ret = -EIO; 755 - goto error_unreg_int_irq; 756 - } 757 - 758 - chip->config |= ADT7410_RESOLUTION; 759 - 760 - if (irq && adt7410_platform_data[0]) { 761 - 762 - /* set irq polarity low level */ 763 - chip->config &= ~ADT7410_CT_POLARITY; 764 - 765 - if (adt7410_platform_data[1] & IRQF_TRIGGER_HIGH) 766 - chip->config |= ADT7410_INT_POLARITY; 767 - else 768 - chip->config &= ~ADT7410_INT_POLARITY; 769 - } 770 - 771 - ret = adt7410_write_byte(chip, ADT7410_CONFIG, chip->config); 772 - if (ret) { 773 - ret = -EIO; 774 - goto error_unreg_int_irq; 775 - } 776 - ret = iio_device_register(indio_dev); 777 - if (ret) 778 - goto error_unreg_int_irq; 779 - 780 - dev_info(dev, "%s temperature sensor registered.\n", 781 - name); 782 - 783 - return 0; 784 - 785 - error_unreg_int_irq: 786 - free_irq(adt7410_platform_data[0], indio_dev); 787 - error_unreg_ct_irq: 788 - free_irq(irq, indio_dev); 789 - error_free_dev: 790 - iio_device_free(indio_dev); 791 - error_ret: 792 - return ret; 793 - } 794 - 795 - static int adt7410_remove(struct device *dev, int irq) 796 - { 797 - struct iio_dev *indio_dev = dev_get_drvdata(dev); 798 - unsigned long *adt7410_platform_data = dev->platform_data; 799 - 800 - iio_device_unregister(indio_dev); 801 - if (adt7410_platform_data[0]) 802 - free_irq(adt7410_platform_data[0], indio_dev); 803 - if (irq) 804 - free_irq(irq, indio_dev); 805 - iio_device_free(indio_dev); 806 - 807 - return 0; 808 - } 809 - 810 - #if IS_ENABLED(CONFIG_I2C) 811 - 812 - static int adt7410_i2c_read_word(struct adt7410_chip_info *chip, u8 reg, 813 - u16 *data) 814 - { 815 - struct i2c_client *client = to_i2c_client(chip->dev); 816 - int ret = 0; 817 - 818 - ret = i2c_smbus_read_word_data(client, reg); 819 - if (ret < 0) { 820 - dev_err(&client->dev, "I2C read error\n"); 821 - return ret; 822 - } 823 - 824 - *data = swab16((u16)ret); 825 - 826 - return 0; 827 - } 828 - 829 - static int adt7410_i2c_write_word(struct adt7410_chip_info *chip, u8 reg, 830 - u16 data) 831 - { 832 - struct i2c_client *client = to_i2c_client(chip->dev); 833 - int ret = 0; 834 - 835 - ret = i2c_smbus_write_word_data(client, reg, swab16(data)); 836 - if (ret < 0) 837 - dev_err(&client->dev, "I2C write error\n"); 838 - 839 - return ret; 840 - } 841 - 842 - static int adt7410_i2c_read_byte(struct adt7410_chip_info *chip, u8 reg, 843 - u8 *data) 844 - { 845 - struct i2c_client *client = to_i2c_client(chip->dev); 846 - int ret = 0; 847 - 848 - ret = i2c_smbus_read_byte_data(client, reg); 849 - if (ret < 0) { 850 - dev_err(&client->dev, "I2C read error\n"); 851 - return ret; 852 - } 853 - 854 - *data = (u8)ret; 855 - 856 - return 0; 857 - } 858 - 859 - static int adt7410_i2c_write_byte(struct adt7410_chip_info *chip, u8 reg, 860 - u8 data) 861 - { 862 - struct i2c_client *client = to_i2c_client(chip->dev); 863 - int ret = 0; 864 - 865 - ret = i2c_smbus_write_byte_data(client, reg, data); 866 - if (ret < 0) 867 - dev_err(&client->dev, "I2C write error\n"); 868 - 869 - return ret; 870 - } 871 - 872 - static const struct adt7410_ops adt7410_i2c_ops = { 873 - .read_word = adt7410_i2c_read_word, 874 - .write_word = adt7410_i2c_write_word, 875 - .read_byte = adt7410_i2c_read_byte, 876 - .write_byte = adt7410_i2c_write_byte, 877 - }; 878 - 879 - static int adt7410_i2c_probe(struct i2c_client *client, 880 - const struct i2c_device_id *id) 881 - { 882 - return adt7410_probe(&client->dev, client->irq, id->name, 883 - &adt7410_i2c_ops); 884 - } 885 - 886 - static int adt7410_i2c_remove(struct i2c_client *client) 887 - { 888 - return adt7410_remove(&client->dev, client->irq); 889 - } 890 - 891 - static const struct i2c_device_id adt7410_id[] = { 892 - { "adt7410", 0 }, 893 - {} 894 - }; 895 - 896 - MODULE_DEVICE_TABLE(i2c, adt7410_id); 897 - 898 - static struct i2c_driver adt7410_driver = { 899 - .driver = { 900 - .name = "adt7410", 901 - }, 902 - .probe = adt7410_i2c_probe, 903 - .remove = adt7410_i2c_remove, 904 - .id_table = adt7410_id, 905 - }; 906 - 907 - static int __init adt7410_i2c_init(void) 908 - { 909 - return i2c_add_driver(&adt7410_driver); 910 - } 911 - 912 - static void __exit adt7410_i2c_exit(void) 913 - { 914 - i2c_del_driver(&adt7410_driver); 915 - } 916 - 917 - #else 918 - 919 - static int __init adt7410_i2c_init(void) { return 0; }; 920 - static void __exit adt7410_i2c_exit(void) {}; 921 - 922 - #endif 923 - 924 - #if IS_ENABLED(CONFIG_SPI_MASTER) 925 - 926 - static const u8 adt7371_reg_table[] = { 927 - [ADT7410_TEMPERATURE] = ADT7310_TEMPERATURE, 928 - [ADT7410_STATUS] = ADT7310_STATUS, 929 - [ADT7410_CONFIG] = ADT7310_CONFIG, 930 - [ADT7410_T_ALARM_HIGH] = ADT7310_T_ALARM_HIGH, 931 - [ADT7410_T_ALARM_LOW] = ADT7310_T_ALARM_LOW, 932 - [ADT7410_T_CRIT] = ADT7310_T_CRIT, 933 - [ADT7410_T_HYST] = ADT7310_T_HYST, 934 - [ADT7410_ID] = ADT7310_ID, 935 - }; 936 - 937 - #define AD7310_COMMAND(reg) (adt7371_reg_table[(reg)] << ADT7310_CMD_REG_OFFSET) 938 - 939 - static int adt7310_spi_read_word(struct adt7410_chip_info *chip, 940 - u8 reg, u16 *data) 941 - { 942 - struct spi_device *spi = to_spi_device(chip->dev); 943 - u8 command = AD7310_COMMAND(reg); 944 - int ret = 0; 945 - 946 - command |= ADT7310_CMD_READ; 947 - ret = spi_write(spi, &command, sizeof(command)); 948 - if (ret < 0) { 949 - dev_err(&spi->dev, "SPI write command error\n"); 950 - return ret; 951 - } 952 - 953 - ret = spi_read(spi, (u8 *)data, sizeof(*data)); 954 - if (ret < 0) { 955 - dev_err(&spi->dev, "SPI read word error\n"); 956 - return ret; 957 - } 958 - 959 - *data = be16_to_cpu(*data); 960 - 961 - return 0; 962 - } 963 - 964 - static int adt7310_spi_write_word(struct adt7410_chip_info *chip, u8 reg, 965 - u16 data) 966 - { 967 - struct spi_device *spi = to_spi_device(chip->dev); 968 - u8 buf[3]; 969 - int ret = 0; 970 - 971 - buf[0] = AD7310_COMMAND(reg); 972 - buf[1] = (u8)(data >> 8); 973 - buf[2] = (u8)(data & 0xFF); 974 - 975 - ret = spi_write(spi, buf, 3); 976 - if (ret < 0) { 977 - dev_err(&spi->dev, "SPI write word error\n"); 978 - return ret; 979 - } 980 - 981 - return ret; 982 - } 983 - 984 - static int adt7310_spi_read_byte(struct adt7410_chip_info *chip, u8 reg, 985 - u8 *data) 986 - { 987 - struct spi_device *spi = to_spi_device(chip->dev); 988 - u8 command = AD7310_COMMAND(reg); 989 - int ret = 0; 990 - 991 - command |= ADT7310_CMD_READ; 992 - ret = spi_write(spi, &command, sizeof(command)); 993 - if (ret < 0) { 994 - dev_err(&spi->dev, "SPI write command error\n"); 995 - return ret; 996 - } 997 - 998 - ret = spi_read(spi, data, sizeof(*data)); 999 - if (ret < 0) { 1000 - dev_err(&spi->dev, "SPI read byte error\n"); 1001 - return ret; 1002 - } 1003 - 1004 - return 0; 1005 - } 1006 - 1007 - static int adt7310_spi_write_byte(struct adt7410_chip_info *chip, u8 reg, 1008 - u8 data) 1009 - { 1010 - struct spi_device *spi = to_spi_device(chip->dev); 1011 - u8 buf[2]; 1012 - int ret = 0; 1013 - 1014 - buf[0] = AD7310_COMMAND(reg); 1015 - buf[1] = data; 1016 - 1017 - ret = spi_write(spi, buf, 2); 1018 - if (ret < 0) { 1019 - dev_err(&spi->dev, "SPI write byte error\n"); 1020 - return ret; 1021 - } 1022 - 1023 - return ret; 1024 - } 1025 - 1026 - static const struct adt7410_ops adt7310_spi_ops = { 1027 - .read_word = adt7310_spi_read_word, 1028 - .write_word = adt7310_spi_write_word, 1029 - .read_byte = adt7310_spi_read_byte, 1030 - .write_byte = adt7310_spi_write_byte, 1031 - }; 1032 - 1033 - static int adt7310_spi_probe(struct spi_device *spi) 1034 - { 1035 - return adt7410_probe(&spi->dev, spi->irq, 1036 - spi_get_device_id(spi)->name, &adt7310_spi_ops); 1037 - } 1038 - 1039 - static int adt7310_spi_remove(struct spi_device *spi) 1040 - { 1041 - return adt7410_remove(&spi->dev, spi->irq); 1042 - } 1043 - 1044 - static const struct spi_device_id adt7310_id[] = { 1045 - { "adt7310", 0 }, 1046 - {} 1047 - }; 1048 - MODULE_DEVICE_TABLE(spi, adt7310_id); 1049 - 1050 - static struct spi_driver adt7310_driver = { 1051 - .driver = { 1052 - .name = "adt7310", 1053 - .owner = THIS_MODULE, 1054 - }, 1055 - .probe = adt7310_spi_probe, 1056 - .remove = adt7310_spi_remove, 1057 - .id_table = adt7310_id, 1058 - }; 1059 - 1060 - static int __init adt7310_spi_init(void) 1061 - { 1062 - return spi_register_driver(&adt7310_driver); 1063 - } 1064 - 1065 - static void adt7310_spi_exit(void) 1066 - { 1067 - spi_unregister_driver(&adt7310_driver); 1068 - } 1069 - 1070 - #else 1071 - 1072 - static int __init adt7310_spi_init(void) { return 0; }; 1073 - static void adt7310_spi_exit(void) {}; 1074 - 1075 - #endif 1076 - 1077 - static int __init adt7410_init(void) 1078 - { 1079 - int ret; 1080 - 1081 - ret = adt7310_spi_init(); 1082 - if (ret) 1083 - return ret; 1084 - 1085 - ret = adt7410_i2c_init(); 1086 - if (ret) 1087 - adt7310_spi_exit(); 1088 - 1089 - return ret; 1090 - } 1091 - module_init(adt7410_init); 1092 - 1093 - static void __exit adt7410_exit(void) 1094 - { 1095 - adt7410_i2c_exit(); 1096 - adt7310_spi_exit(); 1097 - } 1098 - module_exit(adt7410_exit); 1099 - 1100 - MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>"); 1101 - MODULE_DESCRIPTION("Analog Devices ADT7310/ADT7410 digital temperature sensor driver"); 1102 - MODULE_LICENSE("GPL v2");
+1 -1
drivers/staging/iio/adc/lpc32xx_adc.c
··· 103 103 .type = IIO_VOLTAGE, \ 104 104 .indexed = 1, \ 105 105 .channel = _index, \ 106 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, \ 106 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 107 107 .address = AD_IN * _index, \ 108 108 .scan_index = _index, \ 109 109 }
+1 -1
drivers/staging/iio/adc/mxs-lradc.c
··· 822 822 .type = (chan_type), \ 823 823 .indexed = 1, \ 824 824 .scan_index = (idx), \ 825 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, \ 825 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 826 826 .channel = (idx), \ 827 827 .scan_type = { \ 828 828 .sign = 'u', \
+2 -2
drivers/staging/iio/adc/spear_adc.c
··· 180 180 #define SPEAR_ADC_CHAN(idx) { \ 181 181 .type = IIO_VOLTAGE, \ 182 182 .indexed = 1, \ 183 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 184 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 183 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 184 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 185 185 .channel = idx, \ 186 186 .scan_type = { \ 187 187 .sign = 'u', \
+4 -4
drivers/staging/iio/cdc/ad7150.c
··· 429 429 .type = IIO_CAPACITANCE, 430 430 .indexed = 1, 431 431 .channel = 0, 432 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 433 - IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT, 432 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 433 + BIT(IIO_CHAN_INFO_AVERAGE_RAW), 434 434 .event_mask = 435 435 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | 436 436 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) | ··· 442 442 .type = IIO_CAPACITANCE, 443 443 .indexed = 1, 444 444 .channel = 1, 445 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 446 - IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT, 445 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 446 + BIT(IIO_CHAN_INFO_AVERAGE_RAW), 447 447 .event_mask = 448 448 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | 449 449 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) |
+16 -16
drivers/staging/iio/cdc/ad7152.c
··· 436 436 .type = IIO_CAPACITANCE, 437 437 .indexed = 1, 438 438 .channel = 0, 439 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 440 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 441 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 442 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 439 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 440 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 441 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 442 + BIT(IIO_CHAN_INFO_SCALE), 443 443 }, { 444 444 .type = IIO_CAPACITANCE, 445 445 .differential = 1, 446 446 .indexed = 1, 447 447 .channel = 0, 448 448 .channel2 = 2, 449 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 450 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 451 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 452 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 449 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 450 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 451 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 452 + BIT(IIO_CHAN_INFO_SCALE), 453 453 }, { 454 454 .type = IIO_CAPACITANCE, 455 455 .indexed = 1, 456 456 .channel = 1, 457 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 458 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 459 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 460 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 457 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 458 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 459 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 460 + BIT(IIO_CHAN_INFO_SCALE), 461 461 }, { 462 462 .type = IIO_CAPACITANCE, 463 463 .differential = 1, 464 464 .indexed = 1, 465 465 .channel = 1, 466 466 .channel2 = 3, 467 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 468 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 469 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 470 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 467 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 468 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 469 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 470 + BIT(IIO_CHAN_INFO_SCALE), 471 471 } 472 472 }; 473 473 /*
+22 -26
drivers/staging/iio/cdc/ad7746.c
··· 123 123 .type = IIO_VOLTAGE, 124 124 .indexed = 1, 125 125 .channel = 0, 126 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 127 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 126 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 127 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 128 128 .address = AD7746_REG_VT_DATA_HIGH << 8 | 129 129 AD7746_VTSETUP_VTMD_EXT_VIN, 130 130 }, ··· 133 133 .indexed = 1, 134 134 .channel = 1, 135 135 .extend_name = "supply", 136 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 137 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 136 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 137 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 138 138 .address = AD7746_REG_VT_DATA_HIGH << 8 | 139 139 AD7746_VTSETUP_VTMD_VDD_MON, 140 140 }, ··· 142 142 .type = IIO_TEMP, 143 143 .indexed = 1, 144 144 .channel = 0, 145 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, 145 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 146 146 .address = AD7746_REG_VT_DATA_HIGH << 8 | 147 147 AD7746_VTSETUP_VTMD_INT_TEMP, 148 148 }, ··· 150 150 .type = IIO_TEMP, 151 151 .indexed = 1, 152 152 .channel = 1, 153 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, 153 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 154 154 .address = AD7746_REG_VT_DATA_HIGH << 8 | 155 155 AD7746_VTSETUP_VTMD_EXT_TEMP, 156 156 }, ··· 158 158 .type = IIO_CAPACITANCE, 159 159 .indexed = 1, 160 160 .channel = 0, 161 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 162 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 163 - IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT | 164 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 165 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 161 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 162 + BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 163 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 164 + BIT(IIO_CHAN_INFO_SCALE), 166 165 .address = AD7746_REG_CAP_DATA_HIGH << 8, 167 166 }, 168 167 [CIN1_DIFF] = { ··· 170 171 .indexed = 1, 171 172 .channel = 0, 172 173 .channel2 = 2, 173 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 174 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 175 - IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT | 176 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 177 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 174 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 175 + BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 176 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 177 + BIT(IIO_CHAN_INFO_SCALE), 178 178 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 179 179 AD7746_CAPSETUP_CAPDIFF 180 180 }, ··· 181 183 .type = IIO_CAPACITANCE, 182 184 .indexed = 1, 183 185 .channel = 1, 184 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 185 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 186 - IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT | 187 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 188 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 186 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 187 + BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 188 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 189 + BIT(IIO_CHAN_INFO_SCALE), 189 190 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 190 191 AD7746_CAPSETUP_CIN2, 191 192 }, ··· 194 197 .indexed = 1, 195 198 .channel = 1, 196 199 .channel2 = 3, 197 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 198 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 199 - IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT | 200 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 201 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 200 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 201 + BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 202 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 203 + BIT(IIO_CHAN_INFO_SCALE), 202 204 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 203 205 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2, 204 206 }
+5 -6
drivers/staging/iio/gyro/adis16060_core.c
··· 120 120 .type = IIO_ANGL_VEL, 121 121 .modified = 1, 122 122 .channel2 = IIO_MOD_Z, 123 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 123 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 124 124 .address = ADIS16060_GYRO, 125 125 }, { 126 126 .type = IIO_VOLTAGE, 127 127 .indexed = 1, 128 128 .channel = 0, 129 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 129 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 130 130 .address = ADIS16060_AIN1, 131 131 }, { 132 132 .type = IIO_VOLTAGE, 133 133 .indexed = 1, 134 134 .channel = 1, 135 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 135 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 136 136 .address = ADIS16060_AIN2, 137 137 }, { 138 138 .type = IIO_TEMP, 139 139 .indexed = 1, 140 140 .channel = 0, 141 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 142 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 143 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 141 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 142 + BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE), 144 143 .address = ADIS16060_TEMP_OUT, 145 144 } 146 145 };
+2 -2
drivers/staging/iio/gyro/adis16130_core.c
··· 100 100 .type = IIO_ANGL_VEL, 101 101 .modified = 1, 102 102 .channel2 = IIO_MOD_Z, 103 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 103 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 104 104 .address = ADIS16130_RATEDATA, 105 105 }, { 106 106 .type = IIO_TEMP, 107 107 .indexed = 1, 108 108 .channel = 0, 109 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 109 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 110 110 .address = ADIS16130_TEMPDATA, 111 111 } 112 112 };
+2 -2
drivers/staging/iio/gyro/adis16260_core.c
··· 124 124 #define ADIS16260_GYRO_CHANNEL_SET(axis, mod) \ 125 125 struct iio_chan_spec adis16260_channels_##axis[] = { \ 126 126 ADIS_GYRO_CHAN(mod, ADIS16260_GYRO_OUT, ADIS16260_SCAN_GYRO, \ 127 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \ 128 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 14), \ 127 + BIT(IIO_CHAN_INFO_CALIBBIAS) | \ 128 + BIT(IIO_CHAN_INFO_CALIBSCALE), 14), \ 129 129 ADIS_INCLI_CHAN(mod, ADIS16260_ANGL_OUT, ADIS16260_SCAN_ANGL, 0, 14), \ 130 130 ADIS_TEMP_CHAN(ADIS16260_TEMP_OUT, ADIS16260_SCAN_TEMP, 12), \ 131 131 ADIS_SUPPLY_CHAN(ADIS16260_SUPPLY_OUT, ADIS16260_SCAN_SUPPLY, 12), \
+7 -1
drivers/staging/iio/iio_hwmon.c drivers/hwmon/iio_hwmon.c
··· 13 13 #include <linux/err.h> 14 14 #include <linux/platform_device.h> 15 15 #include <linux/hwmon.h> 16 + #include <linux/of.h> 16 17 #include <linux/hwmon-sysfs.h> 17 18 #include <linux/iio/consumer.h> 18 19 #include <linux/iio/types.h> ··· 59 58 static ssize_t show_name(struct device *dev, struct device_attribute *attr, 60 59 char *buf) 61 60 { 62 - return sprintf(buf, "iio_hwmon\n"); 61 + const char *name = "iio_hwmon"; 62 + 63 + if (dev->of_node && dev->of_node->name) 64 + name = dev->of_node->name; 65 + 66 + return sprintf(buf, "%s\n", name); 63 67 } 64 68 65 69 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
+15 -18
drivers/staging/iio/iio_simple_dummy.c
··· 71 71 .indexed = 1, 72 72 .channel = 0, 73 73 /* What other information is available? */ 74 - .info_mask = 74 + .info_mask_separate = 75 75 /* 76 76 * in_voltage0_raw 77 77 * Raw (unscaled no bias removal etc) measurement 78 78 * from the device. 79 79 */ 80 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 80 + BIT(IIO_CHAN_INFO_RAW) | 81 81 /* 82 82 * in_voltage0_offset 83 83 * Offset for userspace to apply prior to scale 84 84 * when converting to standard units (microvolts) 85 85 */ 86 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 86 + BIT(IIO_CHAN_INFO_OFFSET) | 87 87 /* 88 88 * in_voltage0_scale 89 89 * Multipler for userspace to apply post offset 90 90 * when converting to standard units (microvolts) 91 91 */ 92 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 92 + BIT(IIO_CHAN_INFO_SCALE), 93 93 /* The ordering of elements in the buffer via an enum */ 94 94 .scan_index = voltage0, 95 95 .scan_type = { /* Description of storage in buffer */ ··· 118 118 .indexed = 1, 119 119 .channel = 1, 120 120 .channel2 = 2, 121 - .info_mask = 122 121 /* 123 122 * in_voltage1-voltage2_raw 124 123 * Raw (unscaled no bias removal etc) measurement 125 124 * from the device. 126 125 */ 127 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 126 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 128 127 /* 129 128 * in_voltage-voltage_scale 130 129 * Shared version of scale - shared by differential 131 130 * input channels of type IIO_VOLTAGE. 132 131 */ 133 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 132 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 134 133 .scan_index = diffvoltage1m2, 135 134 .scan_type = { /* Description of storage in buffer */ 136 135 .sign = 's', /* signed */ ··· 145 146 .indexed = 1, 146 147 .channel = 3, 147 148 .channel2 = 4, 148 - .info_mask = 149 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 150 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 149 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 150 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 151 151 .scan_index = diffvoltage3m4, 152 152 .scan_type = { 153 153 .sign = 's', ··· 164 166 .modified = 1, 165 167 /* Channel 2 is use for modifiers */ 166 168 .channel2 = IIO_MOD_X, 167 - .info_mask = 168 - IIO_CHAN_INFO_RAW_SEPARATE_BIT | 169 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 169 170 /* 170 171 * Internal bias correction value. Applied 171 172 * by the hardware or driver prior to userspace 172 173 * seeing the readings. Typically part of hardware 173 174 * calibration. 174 175 */ 175 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 176 + BIT(IIO_CHAN_INFO_CALIBBIAS), 176 177 .scan_index = accelx, 177 178 .scan_type = { /* Description of storage in buffer */ 178 179 .sign = 's', /* signed */ ··· 188 191 /* DAC channel out_voltage0_raw */ 189 192 { 190 193 .type = IIO_VOLTAGE, 191 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 194 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 192 195 .output = 1, 193 196 .indexed = 1, 194 197 .channel = 0, ··· 201 204 * @chan: the channel whose data is to be read 202 205 * @val: first element of returned value (typically INT) 203 206 * @val2: second element of returned value (typically MICRO) 204 - * @mask: what we actually want to read. 0 is the channel, everything else 205 - * is as per the info_mask in iio_chan_spec. 207 + * @mask: what we actually want to read as per the info_mask_* 208 + * in iio_chan_spec. 206 209 */ 207 210 static int iio_dummy_read_raw(struct iio_dev *indio_dev, 208 211 struct iio_chan_spec const *chan, ··· 284 287 * @chan: the channel whose data is to be written 285 288 * @val: first element of value to set (typically INT) 286 289 * @val2: second element of value to set (typically MICRO) 287 - * @mask: what we actually want to write. 0 is the channel, everything else 288 - * is as per the info_mask in iio_chan_spec. 290 + * @mask: what we actually want to write as per the info_mask_* 291 + * in iio_chan_spec. 289 292 * 290 293 * Note that all raw writes are assumed IIO_VAL_INT and info mask elements 291 294 * are assumed to be IIO_INT_PLUS_MICRO unless the callback write_raw_get_fmt
+5 -5
drivers/staging/iio/impedance-analyzer/ad5933.c
··· 113 113 .type = IIO_TEMP, 114 114 .indexed = 1, 115 115 .channel = 0, 116 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, 116 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 117 117 .address = AD5933_REG_TEMP_DATA, 118 118 .scan_type = { 119 119 .sign = 's', ··· 125 125 .indexed = 1, 126 126 .channel = 0, 127 127 .extend_name = "real_raw", 128 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 129 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 128 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 129 + BIT(IIO_CHAN_INFO_SCALE), 130 130 .address = AD5933_REG_REAL_DATA, 131 131 .scan_index = 0, 132 132 .scan_type = { ··· 139 139 .indexed = 1, 140 140 .channel = 0, 141 141 .extend_name = "imag_raw", 142 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 143 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 142 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 143 + BIT(IIO_CHAN_INFO_SCALE), 144 144 .address = AD5933_REG_IMAG_DATA, 145 145 .scan_index = 1, 146 146 .scan_type = {
+4 -4
drivers/staging/iio/light/isl29018.c
··· 412 412 .type = IIO_LIGHT, 413 413 .indexed = 1, 414 414 .channel = 0, 415 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT | 416 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 415 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 416 + BIT(IIO_CHAN_INFO_CALIBSCALE), 417 417 }, { 418 418 .type = IIO_INTENSITY, 419 419 .modified = 1, 420 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 420 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 421 421 .channel2 = IIO_MOD_LIGHT_IR, 422 422 }, { 423 423 /* Unindexed in current ABI. But perhaps it should be. */ 424 424 .type = IIO_PROXIMITY, 425 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 425 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 426 426 } 427 427 }; 428 428
+5 -5
drivers/staging/iio/light/isl29028.c
··· 391 391 static const struct iio_chan_spec isl29028_channels[] = { 392 392 { 393 393 .type = IIO_LIGHT, 394 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT | 395 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 394 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 395 + BIT(IIO_CHAN_INFO_SCALE), 396 396 }, { 397 397 .type = IIO_INTENSITY, 398 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 398 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 399 399 }, { 400 400 .type = IIO_PROXIMITY, 401 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 402 - IIO_CHAN_INFO_SAMP_FREQ_SEPARATE_BIT, 401 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 402 + BIT(IIO_CHAN_INFO_SAMP_FREQ), 403 403 } 404 404 }; 405 405
+20 -20
drivers/staging/iio/light/tsl2x7x_core.c
··· 1733 1733 .type = IIO_LIGHT, 1734 1734 .indexed = 1, 1735 1735 .channel = 0, 1736 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, 1736 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 1737 1737 }, { 1738 1738 .type = IIO_INTENSITY, 1739 1739 .indexed = 1, 1740 1740 .channel = 0, 1741 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 1742 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 1743 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 1741 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 1742 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 1743 + BIT(IIO_CHAN_INFO_CALIBBIAS), 1744 1744 .event_mask = TSL2X7X_EVENT_MASK 1745 1745 }, { 1746 1746 .type = IIO_INTENSITY, ··· 1757 1757 .type = IIO_PROXIMITY, 1758 1758 .indexed = 1, 1759 1759 .channel = 0, 1760 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 1760 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 1761 1761 .event_mask = TSL2X7X_EVENT_MASK 1762 1762 }, 1763 1763 }, ··· 1770 1770 .type = IIO_LIGHT, 1771 1771 .indexed = 1, 1772 1772 .channel = 0, 1773 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT 1773 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) 1774 1774 }, { 1775 1775 .type = IIO_INTENSITY, 1776 1776 .indexed = 1, 1777 1777 .channel = 0, 1778 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 1779 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 1780 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 1778 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 1779 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 1780 + BIT(IIO_CHAN_INFO_CALIBBIAS), 1781 1781 .event_mask = TSL2X7X_EVENT_MASK 1782 1782 }, { 1783 1783 .type = IIO_INTENSITY, 1784 1784 .indexed = 1, 1785 1785 .channel = 1, 1786 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 1786 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 1787 1787 }, { 1788 1788 .type = IIO_PROXIMITY, 1789 1789 .indexed = 1, 1790 1790 .channel = 0, 1791 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 1791 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 1792 1792 .event_mask = TSL2X7X_EVENT_MASK 1793 1793 }, 1794 1794 }, ··· 1801 1801 .type = IIO_PROXIMITY, 1802 1802 .indexed = 1, 1803 1803 .channel = 0, 1804 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 1805 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 1804 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 1805 + BIT(IIO_CHAN_INFO_CALIBSCALE), 1806 1806 .event_mask = TSL2X7X_EVENT_MASK 1807 1807 }, 1808 1808 }, ··· 1815 1815 .type = IIO_LIGHT, 1816 1816 .indexed = 1, 1817 1817 .channel = 0, 1818 - .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, 1818 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 1819 1819 }, { 1820 1820 .type = IIO_INTENSITY, 1821 1821 .indexed = 1, 1822 1822 .channel = 0, 1823 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 1824 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | 1825 - IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, 1823 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 1824 + BIT(IIO_CHAN_INFO_CALIBSCALE) | 1825 + BIT(IIO_CHAN_INFO_CALIBBIAS), 1826 1826 .event_mask = TSL2X7X_EVENT_MASK 1827 1827 }, { 1828 1828 .type = IIO_INTENSITY, 1829 1829 .indexed = 1, 1830 1830 .channel = 1, 1831 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 1831 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 1832 1832 }, { 1833 1833 .type = IIO_PROXIMITY, 1834 1834 .indexed = 1, 1835 1835 .channel = 0, 1836 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 1837 - IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, 1836 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 1837 + BIT(IIO_CHAN_INFO_CALIBSCALE), 1838 1838 .event_mask = TSL2X7X_EVENT_MASK 1839 1839 }, 1840 1840 },
+2 -2
drivers/staging/iio/magnetometer/ak8975.c
··· 395 395 .type = IIO_MAGN, \ 396 396 .modified = 1, \ 397 397 .channel2 = IIO_MOD_##axis, \ 398 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 399 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 398 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 399 + BIT(IIO_CHAN_INFO_SCALE), \ 400 400 .address = index, \ 401 401 } 402 402
+2 -2
drivers/staging/iio/magnetometer/hmc5843.c
··· 564 564 .type = IIO_MAGN, \ 565 565 .modified = 1, \ 566 566 .channel2 = IIO_MOD_##axis, \ 567 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 568 - IIO_CHAN_INFO_SCALE_SHARED_BIT, \ 567 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 568 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 569 569 .address = add \ 570 570 } 571 571
+30 -30
drivers/staging/iio/meter/ade7758_core.c
··· 649 649 .indexed = 1, 650 650 .channel = 0, 651 651 .extend_name = "raw", 652 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 653 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 652 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 653 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 654 654 .address = AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE), 655 655 .scan_index = 0, 656 656 .scan_type = { ··· 663 663 .indexed = 1, 664 664 .channel = 0, 665 665 .extend_name = "raw", 666 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 667 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 666 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 667 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 668 668 .address = AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT), 669 669 .scan_index = 1, 670 670 .scan_type = { ··· 677 677 .indexed = 1, 678 678 .channel = 0, 679 679 .extend_name = "apparent_raw", 680 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 681 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 680 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 681 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 682 682 .address = AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR), 683 683 .scan_index = 2, 684 684 .scan_type = { ··· 691 691 .indexed = 1, 692 692 .channel = 0, 693 693 .extend_name = "active_raw", 694 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 695 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 694 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 695 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 696 696 .address = AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR), 697 697 .scan_index = 3, 698 698 .scan_type = { ··· 705 705 .indexed = 1, 706 706 .channel = 0, 707 707 .extend_name = "reactive_raw", 708 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 709 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 708 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 709 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 710 710 .address = AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR), 711 711 .scan_index = 4, 712 712 .scan_type = { ··· 719 719 .indexed = 1, 720 720 .channel = 1, 721 721 .extend_name = "raw", 722 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 723 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 722 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 723 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 724 724 .address = AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE), 725 725 .scan_index = 5, 726 726 .scan_type = { ··· 733 733 .indexed = 1, 734 734 .channel = 1, 735 735 .extend_name = "raw", 736 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 737 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 736 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 737 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 738 738 .address = AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT), 739 739 .scan_index = 6, 740 740 .scan_type = { ··· 747 747 .indexed = 1, 748 748 .channel = 1, 749 749 .extend_name = "apparent_raw", 750 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 751 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 750 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 751 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 752 752 .address = AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR), 753 753 .scan_index = 7, 754 754 .scan_type = { ··· 761 761 .indexed = 1, 762 762 .channel = 1, 763 763 .extend_name = "active_raw", 764 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 765 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 764 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 765 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 766 766 .address = AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR), 767 767 .scan_index = 8, 768 768 .scan_type = { ··· 775 775 .indexed = 1, 776 776 .channel = 1, 777 777 .extend_name = "reactive_raw", 778 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 779 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 778 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 779 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 780 780 .address = AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR), 781 781 .scan_index = 9, 782 782 .scan_type = { ··· 789 789 .indexed = 1, 790 790 .channel = 2, 791 791 .extend_name = "raw", 792 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 793 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 792 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 793 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 794 794 .address = AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE), 795 795 .scan_index = 10, 796 796 .scan_type = { ··· 803 803 .indexed = 1, 804 804 .channel = 2, 805 805 .extend_name = "raw", 806 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 807 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 806 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 807 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 808 808 .address = AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT), 809 809 .scan_index = 11, 810 810 .scan_type = { ··· 817 817 .indexed = 1, 818 818 .channel = 2, 819 819 .extend_name = "apparent_raw", 820 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 821 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 820 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 821 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 822 822 .address = AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR), 823 823 .scan_index = 12, 824 824 .scan_type = { ··· 831 831 .indexed = 1, 832 832 .channel = 2, 833 833 .extend_name = "active_raw", 834 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 835 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 834 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 835 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 836 836 .address = AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR), 837 837 .scan_index = 13, 838 838 .scan_type = { ··· 845 845 .indexed = 1, 846 846 .channel = 2, 847 847 .extend_name = "reactive_raw", 848 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | 849 - IIO_CHAN_INFO_SCALE_SHARED_BIT, 848 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 849 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 850 850 .address = AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR), 851 851 .scan_index = 14, 852 852 .scan_type = {
+2 -2
drivers/staging/iio/resolver/ad2s1200.c
··· 85 85 .type = IIO_ANGL, 86 86 .indexed = 1, 87 87 .channel = 0, 88 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 88 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 89 89 }, { 90 90 .type = IIO_ANGL_VEL, 91 91 .indexed = 1, 92 92 .channel = 0, 93 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 93 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 94 94 } 95 95 }; 96 96
+2 -2
drivers/staging/iio/resolver/ad2s1210.c
··· 577 577 .type = IIO_ANGL, 578 578 .indexed = 1, 579 579 .channel = 0, 580 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 580 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 581 581 }, { 582 582 .type = IIO_ANGL_VEL, 583 583 .indexed = 1, 584 584 .channel = 0, 585 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 585 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 586 586 } 587 587 }; 588 588
+1 -1
drivers/staging/iio/resolver/ad2s90.c
··· 55 55 .type = IIO_ANGL, 56 56 .indexed = 1, 57 57 .channel = 0, 58 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT, 58 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 59 59 }; 60 60 61 61 static int ad2s90_probe(struct spi_device *spi)
+3 -3
include/linux/iio/adc/ad_sigma_delta.h
··· 133 133 .channel2 = (_channel2), \ 134 134 .address = (_address), \ 135 135 .extend_name = (_extend_name), \ 136 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 137 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 138 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, \ 136 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 137 + BIT(IIO_CHAN_INFO_OFFSET), \ 138 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 139 139 .scan_index = (_si), \ 140 140 .scan_type = { \ 141 141 .sign = 'u', \
+3 -2
include/linux/iio/common/st_sensors.h
··· 15 15 #include <linux/spi/spi.h> 16 16 #include <linux/irqreturn.h> 17 17 #include <linux/iio/trigger.h> 18 + #include <linux/bitops.h> 18 19 19 20 #define ST_SENSORS_TX_MAX_LENGTH 2 20 21 #define ST_SENSORS_RX_MAX_LENGTH 6 ··· 46 45 { \ 47 46 .type = device_type, \ 48 47 .modified = 1, \ 49 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 50 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 48 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 49 + BIT(IIO_CHAN_INFO_SCALE), \ 51 50 .scan_index = index, \ 52 51 .channel2 = mod, \ 53 52 .address = addr, \
+8 -71
include/linux/iio/iio.h
··· 38 38 IIO_CHAN_INFO_HYSTERESIS, 39 39 }; 40 40 41 - #define IIO_CHAN_INFO_SHARED_BIT(type) BIT(type*2) 42 - #define IIO_CHAN_INFO_SEPARATE_BIT(type) BIT(type*2 + 1) 43 - #define IIO_CHAN_INFO_BITS(type) (IIO_CHAN_INFO_SHARED_BIT(type) | \ 44 - IIO_CHAN_INFO_SEPARATE_BIT(type)) 45 - 46 - #define IIO_CHAN_INFO_RAW_SEPARATE_BIT \ 47 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_RAW) 48 - #define IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT \ 49 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_PROCESSED) 50 - #define IIO_CHAN_INFO_SCALE_SEPARATE_BIT \ 51 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_SCALE) 52 - #define IIO_CHAN_INFO_SCALE_SHARED_BIT \ 53 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_SCALE) 54 - #define IIO_CHAN_INFO_OFFSET_SEPARATE_BIT \ 55 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_OFFSET) 56 - #define IIO_CHAN_INFO_OFFSET_SHARED_BIT \ 57 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_OFFSET) 58 - #define IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT \ 59 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_CALIBSCALE) 60 - #define IIO_CHAN_INFO_CALIBSCALE_SHARED_BIT \ 61 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_CALIBSCALE) 62 - #define IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT \ 63 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_CALIBBIAS) 64 - #define IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT \ 65 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_CALIBBIAS) 66 - #define IIO_CHAN_INFO_PEAK_SEPARATE_BIT \ 67 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_PEAK) 68 - #define IIO_CHAN_INFO_PEAK_SHARED_BIT \ 69 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_PEAK) 70 - #define IIO_CHAN_INFO_PEAKSCALE_SEPARATE_BIT \ 71 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_PEAKSCALE) 72 - #define IIO_CHAN_INFO_PEAKSCALE_SHARED_BIT \ 73 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_PEAKSCALE) 74 - #define IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT \ 75 - IIO_CHAN_INFO_SEPARATE_BIT( \ 76 - IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) 77 - #define IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SHARED_BIT \ 78 - IIO_CHAN_INFO_SHARED_BIT( \ 79 - IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) 80 - #define IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT \ 81 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_AVERAGE_RAW) 82 - #define IIO_CHAN_INFO_AVERAGE_RAW_SHARED_BIT \ 83 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_AVERAGE_RAW) 84 - #define IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT \ 85 - IIO_CHAN_INFO_SHARED_BIT( \ 86 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) 87 - #define IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT \ 88 - IIO_CHAN_INFO_SEPARATE_BIT( \ 89 - IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) 90 - #define IIO_CHAN_INFO_SAMP_FREQ_SEPARATE_BIT \ 91 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_SAMP_FREQ) 92 - #define IIO_CHAN_INFO_SAMP_FREQ_SHARED_BIT \ 93 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_SAMP_FREQ) 94 - #define IIO_CHAN_INFO_FREQUENCY_SEPARATE_BIT \ 95 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_FREQUENCY) 96 - #define IIO_CHAN_INFO_FREQUENCY_SHARED_BIT \ 97 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_FREQUENCY) 98 - #define IIO_CHAN_INFO_PHASE_SEPARATE_BIT \ 99 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_PHASE) 100 - #define IIO_CHAN_INFO_PHASE_SHARED_BIT \ 101 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_PHASE) 102 - #define IIO_CHAN_INFO_HARDWAREGAIN_SEPARATE_BIT \ 103 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_HARDWAREGAIN) 104 - #define IIO_CHAN_INFO_HARDWAREGAIN_SHARED_BIT \ 105 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_HARDWAREGAIN) 106 - #define IIO_CHAN_INFO_HYSTERESIS_SEPARATE_BIT \ 107 - IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_HYSTERESIS) 108 - #define IIO_CHAN_INFO_HYSTERESIS_SHARED_BIT \ 109 - IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_HYSTERESIS) 110 - 111 41 enum iio_endian { 112 42 IIO_CPU, 113 43 IIO_BE, ··· 148 218 * endianness: little or big endian 149 219 * @info_mask: What information is to be exported about this channel. 150 220 * This includes calibbias, scale etc. 221 + * @info_mask_separate: What information is to be exported that is specific to 222 + * this channel. 223 + * @info_mask_shared_by_type: What information is to be exported that is shared 224 + * by all channels of the same type. 151 225 * @event_mask: What events can this channel produce. 152 226 * @ext_info: Array of extended info attributes for this channel. 153 227 * The array is NULL terminated, the last element should ··· 187 253 enum iio_endian endianness; 188 254 } scan_type; 189 255 long info_mask; 256 + long info_mask_separate; 257 + long info_mask_shared_by_type; 190 258 long event_mask; 191 259 const struct iio_chan_spec_ext_info *ext_info; 192 260 const char *extend_name; ··· 211 275 static inline bool iio_channel_has_info(const struct iio_chan_spec *chan, 212 276 enum iio_chan_info_enum type) 213 277 { 214 - return chan->info_mask & IIO_CHAN_INFO_BITS(type); 278 + return (chan->info_mask_separate & type) | 279 + (chan->info_mask_shared_by_type & type); 215 280 } 216 281 217 282 #define IIO_ST(si, rb, sb, sh) \
+17 -17
include/linux/iio/imu/adis.h
··· 162 162 .indexed = 1, \ 163 163 .channel = (chan), \ 164 164 .extend_name = name, \ 165 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 166 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 165 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 166 + BIT(IIO_CHAN_INFO_SCALE), \ 167 167 .address = (addr), \ 168 168 .scan_index = (si), \ 169 169 .scan_type = { \ ··· 184 184 .type = IIO_TEMP, \ 185 185 .indexed = 1, \ 186 186 .channel = 0, \ 187 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 188 - IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \ 189 - IIO_CHAN_INFO_OFFSET_SEPARATE_BIT, \ 187 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 188 + BIT(IIO_CHAN_INFO_SCALE) | \ 189 + BIT(IIO_CHAN_INFO_OFFSET), \ 190 190 .address = (addr), \ 191 191 .scan_index = (si), \ 192 192 .scan_type = { \ ··· 197 197 }, \ 198 198 } 199 199 200 - #define ADIS_MOD_CHAN(_type, mod, addr, si, info, bits) { \ 200 + #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, bits) { \ 201 201 .type = (_type), \ 202 202 .modified = 1, \ 203 203 .channel2 = IIO_MOD_ ## mod, \ 204 - .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 205 - IIO_CHAN_INFO_SCALE_SHARED_BIT | \ 206 - info, \ 204 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 205 + info_sep, \ 206 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 207 207 .address = (addr), \ 208 208 .scan_index = (si), \ 209 209 .scan_type = { \ ··· 214 214 }, \ 215 215 } 216 216 217 - #define ADIS_ACCEL_CHAN(mod, addr, si, info, bits) \ 218 - ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info, bits) 217 + #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, bits) \ 218 + ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, bits) 219 219 220 - #define ADIS_GYRO_CHAN(mod, addr, si, info, bits) \ 221 - ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info, bits) 220 + #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, bits) \ 221 + ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, bits) 222 222 223 - #define ADIS_INCLI_CHAN(mod, addr, si, info, bits) \ 224 - ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info, bits) 223 + #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, bits) \ 224 + ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, bits) 225 225 226 - #define ADIS_ROT_CHAN(mod, addr, si, info, bits) \ 227 - ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info, bits) 226 + #define ADIS_ROT_CHAN(mod, addr, si, info_sep, bits) \ 227 + ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, bits) 228 228 229 229 #ifdef CONFIG_IIO_ADIS_LIB_BUFFER 230 230