Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'stable/for-linus-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb

Pull swiotlb updates from Konrad Rzeszutek Wilk:
"Two memory encryption related patches (SWIOTLB is enabled by default
for AMD-SEV):

- Add support for alignment so that NVME can properly work

- Keep track of requested DMA buffers length, as underlaying hardware
devices can trip SWIOTLB to bounce too much and crash the kernel

And a tiny fix to use proper APIs in drivers"

* 'stable/for-linus-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb:
swiotlb: Validate bounce size in the sync/unmap path
nvme-pci: set min_align_mask
swiotlb: respect min_align_mask
swiotlb: don't modify orig_addr in swiotlb_tbl_sync_single
swiotlb: refactor swiotlb_tbl_map_single
swiotlb: clean up swiotlb_tbl_unmap_single
swiotlb: factor out a nr_slots helper
swiotlb: factor out an io_tlb_offset helper
swiotlb: add a IO_TLB_SIZE define
driver core: add a min_align_mask field to struct device_dma_parameters
sdhci: stop poking into swiotlb internals

+229 -137
+2 -7
drivers/mmc/host/sdhci.c
··· 20 20 #include <linux/slab.h> 21 21 #include <linux/scatterlist.h> 22 22 #include <linux/sizes.h> 23 - #include <linux/swiotlb.h> 24 23 #include <linux/regulator/consumer.h> 25 24 #include <linux/pm_runtime.h> 26 25 #include <linux/of.h> ··· 4581 4582 mmc->max_segs = SDHCI_MAX_SEGS; 4582 4583 } else if (host->flags & SDHCI_USE_SDMA) { 4583 4584 mmc->max_segs = 1; 4584 - if (swiotlb_max_segment()) { 4585 - unsigned int max_req_size = (1 << IO_TLB_SHIFT) * 4586 - IO_TLB_SEGSIZE; 4587 - mmc->max_req_size = min(mmc->max_req_size, 4588 - max_req_size); 4589 - } 4585 + mmc->max_req_size = min_t(size_t, mmc->max_req_size, 4586 + dma_max_mapping_size(mmc_dev(mmc))); 4590 4587 } else { /* PIO */ 4591 4588 mmc->max_segs = SDHCI_MAX_SEGS; 4592 4589 }
+1
drivers/nvme/host/pci.c
··· 2632 2632 * Don't limit the IOMMU merged segment size. 2633 2633 */ 2634 2634 dma_set_max_seg_size(dev->dev, 0xffffffff); 2635 + dma_set_min_align_mask(dev->dev, NVME_CTRL_PAGE_SIZE - 1); 2635 2636 2636 2637 mutex_unlock(&dev->shutdown_lock); 2637 2638
+1
include/linux/device.h
··· 291 291 * sg limitations. 292 292 */ 293 293 unsigned int max_segment_size; 294 + unsigned int min_align_mask; 294 295 unsigned long segment_boundary_mask; 295 296 }; 296 297
+16
include/linux/dma-mapping.h
··· 509 509 return -EIO; 510 510 } 511 511 512 + static inline unsigned int dma_get_min_align_mask(struct device *dev) 513 + { 514 + if (dev->dma_parms) 515 + return dev->dma_parms->min_align_mask; 516 + return 0; 517 + } 518 + 519 + static inline int dma_set_min_align_mask(struct device *dev, 520 + unsigned int min_align_mask) 521 + { 522 + if (WARN_ON_ONCE(!dev->dma_parms)) 523 + return -EIO; 524 + dev->dma_parms->min_align_mask = min_align_mask; 525 + return 0; 526 + } 527 + 512 528 static inline int dma_get_cache_alignment(void) 513 529 { 514 530 #ifdef ARCH_DMA_MINALIGN
+1
include/linux/swiotlb.h
··· 29 29 * controllable. 30 30 */ 31 31 #define IO_TLB_SHIFT 11 32 + #define IO_TLB_SIZE (1 << IO_TLB_SHIFT) 32 33 33 34 /* default to 64MB */ 34 35 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
+208 -130
kernel/dma/swiotlb.c
··· 50 50 #define CREATE_TRACE_POINTS 51 51 #include <trace/events/swiotlb.h> 52 52 53 - #define OFFSET(val,align) ((unsigned long) \ 54 - ( (val) & ( (align) - 1))) 55 - 56 53 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) 57 54 58 55 /* ··· 98 101 */ 99 102 #define INVALID_PHYS_ADDR (~(phys_addr_t)0) 100 103 static phys_addr_t *io_tlb_orig_addr; 104 + 105 + /* 106 + * The mapped buffer's size should be validated during a sync operation. 107 + */ 108 + static size_t *io_tlb_orig_size; 101 109 102 110 /* 103 111 * Protect the above data structures in the map and unmap calls ··· 173 171 * adjust/expand SWIOTLB size for their use. 174 172 */ 175 173 if (!io_tlb_nslabs) { 176 - size = ALIGN(new_size, 1 << IO_TLB_SHIFT); 174 + size = ALIGN(new_size, IO_TLB_SIZE); 177 175 io_tlb_nslabs = size >> IO_TLB_SHIFT; 178 176 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 179 177 ··· 192 190 193 191 pr_info("mapped [mem %pa-%pa] (%luMB)\n", &io_tlb_start, &io_tlb_end, 194 192 bytes >> 20); 193 + } 194 + 195 + static inline unsigned long io_tlb_offset(unsigned long val) 196 + { 197 + return val & (IO_TLB_SEGSIZE - 1); 198 + } 199 + 200 + static inline unsigned long nr_slots(u64 val) 201 + { 202 + return DIV_ROUND_UP(val, IO_TLB_SIZE); 195 203 } 196 204 197 205 /* ··· 252 240 panic("%s: Failed to allocate %zu bytes align=0x%lx\n", 253 241 __func__, alloc_size, PAGE_SIZE); 254 242 243 + alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(size_t)); 244 + io_tlb_orig_size = memblock_alloc(alloc_size, PAGE_SIZE); 245 + if (!io_tlb_orig_size) 246 + panic("%s: Failed to allocate %zu bytes align=0x%lx\n", 247 + __func__, alloc_size, PAGE_SIZE); 248 + 255 249 for (i = 0; i < io_tlb_nslabs; i++) { 256 - io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 250 + io_tlb_list[i] = IO_TLB_SEGSIZE - io_tlb_offset(i); 257 251 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 252 + io_tlb_orig_size[i] = 0; 258 253 } 259 254 io_tlb_index = 0; 260 255 no_iotlb_memory = false; ··· 382 363 * between io_tlb_start and io_tlb_end. 383 364 */ 384 365 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, 385 - get_order(io_tlb_nslabs * sizeof(int))); 366 + get_order(io_tlb_nslabs * sizeof(int))); 386 367 if (!io_tlb_list) 387 368 goto cleanup3; 388 369 ··· 393 374 if (!io_tlb_orig_addr) 394 375 goto cleanup4; 395 376 377 + io_tlb_orig_size = (size_t *) 378 + __get_free_pages(GFP_KERNEL, 379 + get_order(io_tlb_nslabs * 380 + sizeof(size_t))); 381 + if (!io_tlb_orig_size) 382 + goto cleanup5; 383 + 384 + 396 385 for (i = 0; i < io_tlb_nslabs; i++) { 397 - io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 386 + io_tlb_list[i] = IO_TLB_SEGSIZE - io_tlb_offset(i); 398 387 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 388 + io_tlb_orig_size[i] = 0; 399 389 } 400 390 io_tlb_index = 0; 401 391 no_iotlb_memory = false; ··· 416 388 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); 417 389 418 390 return 0; 391 + 392 + cleanup5: 393 + free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * 394 + sizeof(phys_addr_t))); 419 395 420 396 cleanup4: 421 397 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * ··· 436 404 return; 437 405 438 406 if (late_alloc) { 407 + free_pages((unsigned long)io_tlb_orig_size, 408 + get_order(io_tlb_nslabs * sizeof(size_t))); 439 409 free_pages((unsigned long)io_tlb_orig_addr, 440 410 get_order(io_tlb_nslabs * sizeof(phys_addr_t))); 441 411 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * ··· 447 413 } else { 448 414 memblock_free_late(__pa(io_tlb_orig_addr), 449 415 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); 416 + memblock_free_late(__pa(io_tlb_orig_size), 417 + PAGE_ALIGN(io_tlb_nslabs * sizeof(size_t))); 450 418 memblock_free_late(__pa(io_tlb_list), 451 419 PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); 452 420 memblock_free_late(io_tlb_start, ··· 497 461 } 498 462 } 499 463 500 - phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, phys_addr_t orig_addr, 464 + #define slot_addr(start, idx) ((start) + ((idx) << IO_TLB_SHIFT)) 465 + 466 + /* 467 + * Return the offset into a iotlb slot required to keep the device happy. 468 + */ 469 + static unsigned int swiotlb_align_offset(struct device *dev, u64 addr) 470 + { 471 + return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1); 472 + } 473 + 474 + /* 475 + * Carefully handle integer overflow which can occur when boundary_mask == ~0UL. 476 + */ 477 + static inline unsigned long get_max_slots(unsigned long boundary_mask) 478 + { 479 + if (boundary_mask == ~0UL) 480 + return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); 481 + return nr_slots(boundary_mask + 1); 482 + } 483 + 484 + static unsigned int wrap_index(unsigned int index) 485 + { 486 + if (index >= io_tlb_nslabs) 487 + return 0; 488 + return index; 489 + } 490 + 491 + /* 492 + * Find a suitable number of IO TLB entries size that will fit this request and 493 + * allocate a buffer from that IO TLB pool. 494 + */ 495 + static int find_slots(struct device *dev, phys_addr_t orig_addr, 496 + size_t alloc_size) 497 + { 498 + unsigned long boundary_mask = dma_get_seg_boundary(dev); 499 + dma_addr_t tbl_dma_addr = 500 + phys_to_dma_unencrypted(dev, io_tlb_start) & boundary_mask; 501 + unsigned long max_slots = get_max_slots(boundary_mask); 502 + unsigned int iotlb_align_mask = 503 + dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1); 504 + unsigned int nslots = nr_slots(alloc_size), stride; 505 + unsigned int index, wrap, count = 0, i; 506 + unsigned long flags; 507 + 508 + BUG_ON(!nslots); 509 + 510 + /* 511 + * For mappings with an alignment requirement don't bother looping to 512 + * unaligned slots once we found an aligned one. For allocations of 513 + * PAGE_SIZE or larger only look for page aligned allocations. 514 + */ 515 + stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1; 516 + if (alloc_size >= PAGE_SIZE) 517 + stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT)); 518 + 519 + spin_lock_irqsave(&io_tlb_lock, flags); 520 + if (unlikely(nslots > io_tlb_nslabs - io_tlb_used)) 521 + goto not_found; 522 + 523 + index = wrap = wrap_index(ALIGN(io_tlb_index, stride)); 524 + do { 525 + if ((slot_addr(tbl_dma_addr, index) & iotlb_align_mask) != 526 + (orig_addr & iotlb_align_mask)) { 527 + index = wrap_index(index + 1); 528 + continue; 529 + } 530 + 531 + /* 532 + * If we find a slot that indicates we have 'nslots' number of 533 + * contiguous buffers, we allocate the buffers from that slot 534 + * and mark the entries as '0' indicating unavailable. 535 + */ 536 + if (!iommu_is_span_boundary(index, nslots, 537 + nr_slots(tbl_dma_addr), 538 + max_slots)) { 539 + if (io_tlb_list[index] >= nslots) 540 + goto found; 541 + } 542 + index = wrap_index(index + stride); 543 + } while (index != wrap); 544 + 545 + not_found: 546 + spin_unlock_irqrestore(&io_tlb_lock, flags); 547 + return -1; 548 + 549 + found: 550 + for (i = index; i < index + nslots; i++) 551 + io_tlb_list[i] = 0; 552 + for (i = index - 1; 553 + io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && 554 + io_tlb_list[i]; i--) 555 + io_tlb_list[i] = ++count; 556 + 557 + /* 558 + * Update the indices to avoid searching in the next round. 559 + */ 560 + if (index + nslots < io_tlb_nslabs) 561 + io_tlb_index = index + nslots; 562 + else 563 + io_tlb_index = 0; 564 + io_tlb_used += nslots; 565 + 566 + spin_unlock_irqrestore(&io_tlb_lock, flags); 567 + return index; 568 + } 569 + 570 + phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr, 501 571 size_t mapping_size, size_t alloc_size, 502 572 enum dma_data_direction dir, unsigned long attrs) 503 573 { 504 - dma_addr_t tbl_dma_addr = phys_to_dma_unencrypted(hwdev, io_tlb_start); 505 - unsigned long flags; 574 + unsigned int offset = swiotlb_align_offset(dev, orig_addr); 575 + unsigned int index, i; 506 576 phys_addr_t tlb_addr; 507 - unsigned int nslots, stride, index, wrap; 508 - int i; 509 - unsigned long mask; 510 - unsigned long offset_slots; 511 - unsigned long max_slots; 512 - unsigned long tmp_io_tlb_used; 513 577 514 578 if (no_iotlb_memory) 515 579 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); ··· 618 482 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n"); 619 483 620 484 if (mapping_size > alloc_size) { 621 - dev_warn_once(hwdev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)", 485 + dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)", 622 486 mapping_size, alloc_size); 623 487 return (phys_addr_t)DMA_MAPPING_ERROR; 624 488 } 625 489 626 - mask = dma_get_seg_boundary(hwdev); 627 - 628 - tbl_dma_addr &= mask; 629 - 630 - offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 631 - 632 - /* 633 - * Carefully handle integer overflow which can occur when mask == ~0UL. 634 - */ 635 - max_slots = mask + 1 636 - ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT 637 - : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); 638 - 639 - /* 640 - * For mappings greater than or equal to a page, we limit the stride 641 - * (and hence alignment) to a page size. 642 - */ 643 - nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 644 - if (alloc_size >= PAGE_SIZE) 645 - stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); 646 - else 647 - stride = 1; 648 - 649 - BUG_ON(!nslots); 650 - 651 - /* 652 - * Find suitable number of IO TLB entries size that will fit this 653 - * request and allocate a buffer from that IO TLB pool. 654 - */ 655 - spin_lock_irqsave(&io_tlb_lock, flags); 656 - 657 - if (unlikely(nslots > io_tlb_nslabs - io_tlb_used)) 658 - goto not_found; 659 - 660 - index = ALIGN(io_tlb_index, stride); 661 - if (index >= io_tlb_nslabs) 662 - index = 0; 663 - wrap = index; 664 - 665 - do { 666 - while (iommu_is_span_boundary(index, nslots, offset_slots, 667 - max_slots)) { 668 - index += stride; 669 - if (index >= io_tlb_nslabs) 670 - index = 0; 671 - if (index == wrap) 672 - goto not_found; 673 - } 674 - 675 - /* 676 - * If we find a slot that indicates we have 'nslots' number of 677 - * contiguous buffers, we allocate the buffers from that slot 678 - * and mark the entries as '0' indicating unavailable. 679 - */ 680 - if (io_tlb_list[index] >= nslots) { 681 - int count = 0; 682 - 683 - for (i = index; i < (int) (index + nslots); i++) 684 - io_tlb_list[i] = 0; 685 - for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) 686 - io_tlb_list[i] = ++count; 687 - tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); 688 - 689 - /* 690 - * Update the indices to avoid searching in the next 691 - * round. 692 - */ 693 - io_tlb_index = ((index + nslots) < io_tlb_nslabs 694 - ? (index + nslots) : 0); 695 - 696 - goto found; 697 - } 698 - index += stride; 699 - if (index >= io_tlb_nslabs) 700 - index = 0; 701 - } while (index != wrap); 702 - 703 - not_found: 704 - tmp_io_tlb_used = io_tlb_used; 705 - 706 - spin_unlock_irqrestore(&io_tlb_lock, flags); 707 - if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) 708 - dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n", 709 - alloc_size, io_tlb_nslabs, tmp_io_tlb_used); 710 - return (phys_addr_t)DMA_MAPPING_ERROR; 711 - found: 712 - io_tlb_used += nslots; 713 - spin_unlock_irqrestore(&io_tlb_lock, flags); 490 + index = find_slots(dev, orig_addr, alloc_size + offset); 491 + if (index == -1) { 492 + if (!(attrs & DMA_ATTR_NO_WARN)) 493 + dev_warn_ratelimited(dev, 494 + "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n", 495 + alloc_size, io_tlb_nslabs, io_tlb_used); 496 + return (phys_addr_t)DMA_MAPPING_ERROR; 497 + } 714 498 715 499 /* 716 500 * Save away the mapping from the original address to the DMA address. 717 501 * This is needed when we sync the memory. Then we sync the buffer if 718 502 * needed. 719 503 */ 720 - for (i = 0; i < nslots; i++) 721 - io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); 504 + for (i = 0; i < nr_slots(alloc_size + offset); i++) { 505 + io_tlb_orig_addr[index + i] = slot_addr(orig_addr, i); 506 + io_tlb_orig_size[index+i] = alloc_size - (i << IO_TLB_SHIFT); 507 + } 508 + tlb_addr = slot_addr(io_tlb_start, index) + offset; 722 509 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && 723 510 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) 724 511 swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_TO_DEVICE); 725 - 726 512 return tlb_addr; 513 + } 514 + 515 + static void validate_sync_size_and_truncate(struct device *hwdev, size_t orig_size, size_t *size) 516 + { 517 + if (*size > orig_size) { 518 + /* Warn and truncate mapping_size */ 519 + dev_WARN_ONCE(hwdev, 1, 520 + "Attempt for buffer overflow. Original size: %zu. Mapping size: %zu.\n", 521 + orig_size, *size); 522 + *size = orig_size; 523 + } 727 524 } 728 525 729 526 /* ··· 667 598 enum dma_data_direction dir, unsigned long attrs) 668 599 { 669 600 unsigned long flags; 670 - int i, count, nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 671 - int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; 601 + unsigned int offset = swiotlb_align_offset(hwdev, tlb_addr); 602 + int i, count, nslots = nr_slots(alloc_size + offset); 603 + int index = (tlb_addr - offset - io_tlb_start) >> IO_TLB_SHIFT; 672 604 phys_addr_t orig_addr = io_tlb_orig_addr[index]; 605 + 606 + validate_sync_size_and_truncate(hwdev, io_tlb_orig_size[index], &mapping_size); 673 607 674 608 /* 675 609 * First, sync the memory before unmapping the entry ··· 689 617 * with slots below and above the pool being returned. 690 618 */ 691 619 spin_lock_irqsave(&io_tlb_lock, flags); 692 - { 693 - count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? 694 - io_tlb_list[index + nslots] : 0); 695 - /* 696 - * Step 1: return the slots to the free list, merging the 697 - * slots with superceeding slots 698 - */ 699 - for (i = index + nslots - 1; i >= index; i--) { 700 - io_tlb_list[i] = ++count; 701 - io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 702 - } 703 - /* 704 - * Step 2: merge the returned slots with the preceding slots, 705 - * if available (non zero) 706 - */ 707 - for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) 708 - io_tlb_list[i] = ++count; 620 + if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE)) 621 + count = io_tlb_list[index + nslots]; 622 + else 623 + count = 0; 709 624 710 - io_tlb_used -= nslots; 625 + /* 626 + * Step 1: return the slots to the free list, merging the slots with 627 + * superceeding slots 628 + */ 629 + for (i = index + nslots - 1; i >= index; i--) { 630 + io_tlb_list[i] = ++count; 631 + io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; 632 + io_tlb_orig_size[i] = 0; 711 633 } 634 + 635 + /* 636 + * Step 2: merge the returned slots with the preceding slots, if 637 + * available (non zero) 638 + */ 639 + for (i = index - 1; 640 + io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && io_tlb_list[i]; 641 + i--) 642 + io_tlb_list[i] = ++count; 643 + io_tlb_used -= nslots; 712 644 spin_unlock_irqrestore(&io_tlb_lock, flags); 713 645 } 714 646 ··· 721 645 enum dma_sync_target target) 722 646 { 723 647 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; 648 + size_t orig_size = io_tlb_orig_size[index]; 724 649 phys_addr_t orig_addr = io_tlb_orig_addr[index]; 725 650 726 651 if (orig_addr == INVALID_PHYS_ADDR) 727 652 return; 728 - orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); 653 + 654 + validate_sync_size_and_truncate(hwdev, orig_size, &size); 729 655 730 656 switch (target) { 731 657 case SYNC_FOR_CPU: ··· 785 707 786 708 size_t swiotlb_max_mapping_size(struct device *dev) 787 709 { 788 - return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE; 710 + return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE; 789 711 } 790 712 791 713 bool is_swiotlb_active(void)