tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ARM: dts: add support for Laird SOM60 module and DVK boards
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
authored by
Ben Whitten
and committed by
Alexandre Belloni
ef8375be
fd2c7ef9
+575
+1
arch/arm/boot/dts/Makefile
+1
arch/arm/boot/dts/Makefile
+95
arch/arm/boot/dts/at91-dvk_som60.dts
+95
arch/arm/boot/dts/at91-dvk_som60.dts
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
4
+
*
5
+
* Copyright (C) 2018 Laird,
6
+
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
7
+
*
8
+
*/
9
+
/dts-v1/;
10
+
#include "at91-som60.dtsi"
11
+
#include "at91-dvk_su60_somc.dtsi"
12
+
#include "at91-dvk_su60_somc_lcm.dtsi"
13
+
14
+
/ {
15
+
model = "Laird DVK SOM60";
16
+
compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
17
+
18
+
chosen {
19
+
stdout-path = &dbgu;
20
+
tick-timer = &pit;
21
+
};
22
+
};
23
+
24
+
&mmc0 {
25
+
status = "okay";
26
+
};
27
+
28
+
&spi0 {
29
+
status = "okay";
30
+
};
31
+
32
+
&ssc0 {
33
+
status = "okay";
34
+
};
35
+
36
+
&i2c0 {
37
+
status = "okay";
38
+
};
39
+
40
+
&i2c1 {
41
+
status = "okay";
42
+
};
43
+
44
+
&usart1 {
45
+
status = "okay";
46
+
};
47
+
48
+
&usart2 {
49
+
status = "okay";
50
+
};
51
+
52
+
&usart3 {
53
+
status = "okay";
54
+
};
55
+
56
+
&uart0 {
57
+
status = "okay";
58
+
};
59
+
60
+
&dbgu {
61
+
status = "okay";
62
+
};
63
+
64
+
&pit {
65
+
status = "okay";
66
+
};
67
+
68
+
&adc0 {
69
+
status = "okay";
70
+
};
71
+
72
+
&can1 {
73
+
status = "okay";
74
+
};
75
+
76
+
&macb0 {
77
+
status = "okay";
78
+
};
79
+
80
+
&macb1 {
81
+
status = "okay";
82
+
};
83
+
84
+
&usb0 {
85
+
status = "okay";
86
+
};
87
+
88
+
&usb1 {
89
+
status = "okay";
90
+
};
91
+
92
+
&usb2 {
93
+
status = "okay";
94
+
};
95
+
+159
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
+159
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
4
+
*
5
+
* Copyright (C) 2018 Laird,
6
+
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
7
+
*
8
+
*/
9
+
10
+
/ {
11
+
sound {
12
+
compatible = "atmel,asoc-wm8904";
13
+
pinctrl-names = "default";
14
+
pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
15
+
16
+
atmel,model = "wm8904 @ DVK-SOM60";
17
+
atmel,audio-routing =
18
+
"Headphone Jack", "HPOUTL",
19
+
"Headphone Jack", "HPOUTR",
20
+
"IN2L", "Line In Jack",
21
+
"IN2R", "Line In Jack",
22
+
"Mic", "MICBIAS",
23
+
"IN1L", "Mic";
24
+
25
+
atmel,ssc-controller = <&ssc0>;
26
+
atmel,audio-codec = <&wm8904>;
27
+
28
+
status = "okay";
29
+
};
30
+
};
31
+
32
+
&mmc0 {
33
+
status = "okay";
34
+
35
+
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
36
+
slot@0 {
37
+
bus-width = <4>;
38
+
cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
39
+
cd-inverted;
40
+
};
41
+
};
42
+
43
+
&spi0 {
44
+
status = "okay";
45
+
46
+
/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
47
+
spi-flash@0 {
48
+
compatible = "mxicy,mx25u4035", "jedec,spi-nor";
49
+
spi-max-frequency = <33000000>;
50
+
reg = <0>;
51
+
};
52
+
};
53
+
54
+
&ssc0 {
55
+
atmel,clk-from-rk-pin;
56
+
status = "okay";
57
+
};
58
+
59
+
&i2c0 {
60
+
status = "okay";
61
+
62
+
wm8904: wm8904@1a {
63
+
compatible = "wlf,wm8904";
64
+
reg = <0x1a>;
65
+
clocks = <&pck2>;
66
+
clock-names = "mclk";
67
+
};
68
+
};
69
+
70
+
&i2c1 {
71
+
status = "okay";
72
+
73
+
eeprom@87 {
74
+
compatible = "giantec,gt24c32a", "atmel,24c32";
75
+
reg = <87>;
76
+
pagesize = <32>;
77
+
};
78
+
};
79
+
80
+
&usart1 {
81
+
status = "okay";
82
+
};
83
+
84
+
&usart2 {
85
+
status = "okay";
86
+
};
87
+
88
+
&usart3 {
89
+
status = "okay";
90
+
};
91
+
92
+
&uart0 {
93
+
status = "okay";
94
+
};
95
+
96
+
&dbgu {
97
+
status = "okay";
98
+
};
99
+
100
+
&pit {
101
+
status = "okay";
102
+
};
103
+
104
+
&adc0 {
105
+
status = "okay";
106
+
};
107
+
108
+
&can1 {
109
+
status = "okay";
110
+
};
111
+
112
+
&macb0 {
113
+
#address-cells = <1>;
114
+
#size-cells = <0>;
115
+
status = "okay";
116
+
117
+
ethernet-phy@7 {
118
+
reg = <7>;
119
+
pinctrl-names = "default";
120
+
pinctrl-0 = <&pinctrl_geth_int>;
121
+
interrupt-parent = <&pioB>;
122
+
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
123
+
txen-skew-ps = <800>;
124
+
txc-skew-ps = <3000>;
125
+
rxdv-skew-ps = <400>;
126
+
rxc-skew-ps = <3000>;
127
+
rxd0-skew-ps = <400>;
128
+
rxd1-skew-ps = <400>;
129
+
rxd2-skew-ps = <400>;
130
+
rxd3-skew-ps = <400>;
131
+
};
132
+
};
133
+
134
+
&macb1 {
135
+
#address-cells = <1>;
136
+
#size-cells = <0>;
137
+
status = "okay";
138
+
139
+
ethernet-phy@1 {
140
+
reg = <1>;
141
+
pinctrl-names = "default";
142
+
pinctrl-0 = <&pinctrl_eth_int>;
143
+
interrupt-parent = <&pioC>;
144
+
interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
145
+
};
146
+
};
147
+
148
+
&usb0 {
149
+
status = "okay";
150
+
};
151
+
152
+
&usb1 {
153
+
status = "okay";
154
+
};
155
+
156
+
&usb2 {
157
+
status = "okay";
158
+
};
159
+
+90
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
+90
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
4
+
*
5
+
* Copyright (C) 2018 Laird,
6
+
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
7
+
*
8
+
*/
9
+
10
+
/ {
11
+
backlight: backlight {
12
+
compatible = "pwm-backlight";
13
+
pwms = <&hlcdc_pwm 0 50000 0>;
14
+
brightness-levels = <0 4 8 16 32 64 128 255>;
15
+
default-brightness-level = <6>;
16
+
status = "okay";
17
+
};
18
+
19
+
panel: panel {
20
+
compatible = "winstar,wf70gtiagdng0", "innolux,at070tn92", "simple-panel";
21
+
backlight = <&backlight>;
22
+
power-supply = <&vcc_lcd_reg>;
23
+
#address-cells = <1>;
24
+
#size-cells = <0>;
25
+
status = "okay";
26
+
27
+
port@0 {
28
+
#address-cells = <1>;
29
+
#size-cells = <0>;
30
+
reg = <0>;
31
+
32
+
panel_input: endpoint@0 {
33
+
reg = <0>;
34
+
remote-endpoint = <&hlcdc_panel_output>;
35
+
};
36
+
};
37
+
};
38
+
39
+
vcc_lcd_reg: fixedregulator_lcd {
40
+
compatible = "regulator-fixed";
41
+
regulator-name = "VCC LCM";
42
+
regulator-min-microvolt = <5000000>;
43
+
regulator-max-microvolt = <5000000>;
44
+
regulator-boot-on;
45
+
regulator-always-on;
46
+
status = "okay";
47
+
};
48
+
};
49
+
50
+
&pinctrl {
51
+
board {
52
+
pinctrl_lcd_ctp_int: lcd_ctp_int {
53
+
atmel,pins =
54
+
<AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
55
+
};
56
+
};
57
+
};
58
+
59
+
&i2c1 {
60
+
status = "okay";
61
+
62
+
ft5426@56 {
63
+
compatible = "focaltech,ft5426", "edt,edt-ft5406";
64
+
reg = <56>;
65
+
pinctrl-names = "default";
66
+
pinctrl-0 = <&pinctrl_lcd_ctp_int>;
67
+
68
+
interrupt-parent = <&pioC>;
69
+
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
70
+
71
+
touchscreen-size-x = <800>;
72
+
touchscreen-size-y = <480>;
73
+
};
74
+
};
75
+
76
+
&hlcdc {
77
+
status = "okay";
78
+
79
+
hlcdc-display-controller {
80
+
pinctrl-names = "default";
81
+
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
82
+
83
+
port@0 {
84
+
hlcdc_panel_output: endpoint@0 {
85
+
reg = <0>;
86
+
remote-endpoint = <&panel_input>;
87
+
};
88
+
};
89
+
};
90
+
};
+230
arch/arm/boot/dts/at91-som60.dtsi
+230
arch/arm/boot/dts/at91-som60.dtsi
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* at91-som60.dtsi - Device Tree file for the SOM60 module
4
+
*
5
+
* Copyright (C) 2018 Laird,
6
+
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
7
+
*
8
+
*/
9
+
#include "sama5d36.dtsi"
10
+
11
+
/ {
12
+
model = "Laird SOM60";
13
+
compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
14
+
15
+
chosen {
16
+
stdout-path = &dbgu;
17
+
};
18
+
19
+
memory {
20
+
reg = <0x20000000 0x8000000>;
21
+
};
22
+
23
+
clocks {
24
+
slow_xtal {
25
+
clock-frequency = <32768>;
26
+
};
27
+
28
+
main_xtal {
29
+
clock-frequency = <12000000>;
30
+
};
31
+
};
32
+
};
33
+
34
+
&pinctrl {
35
+
board {
36
+
pinctrl_mmc0_cd: mmc0_cd {
37
+
atmel,pins =
38
+
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
39
+
};
40
+
41
+
pinctrl_mmc0_en: mmc0_en {
42
+
atmel,pins =
43
+
<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
44
+
};
45
+
46
+
pinctrl_nand0_wp: nand0_wp {
47
+
atmel,pins =
48
+
<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
49
+
};
50
+
51
+
pinctrl_usb_vbus: usb_vbus {
52
+
atmel,pins =
53
+
<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
54
+
/* Conflicts with USART2_SCK */
55
+
};
56
+
57
+
pinctrl_usart2_sck: usart2_sck {
58
+
atmel,pins =
59
+
<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
60
+
/* Conflicts with USB_VBUS */
61
+
};
62
+
63
+
pinctrl_usb_oc: usb_oc {
64
+
atmel,pins =
65
+
<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
66
+
/* Conflicts with USART3_SCK */
67
+
};
68
+
69
+
pinctrl_usart3_sck: usart3_sck {
70
+
atmel,pins =
71
+
<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
72
+
/* Conflicts with USB_OC */
73
+
};
74
+
75
+
pinctrl_usba_vbus: usba_vbus {
76
+
atmel,pins =
77
+
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
78
+
};
79
+
80
+
pinctrl_geth_int: geth_int {
81
+
atmel,pins =
82
+
<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
83
+
/* Conflicts with USART1_SCK */
84
+
};
85
+
86
+
pinctrl_usart1_sck: usart1_sck {
87
+
atmel,pins =
88
+
<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
89
+
/* Conflicts with GETH_INT */
90
+
};
91
+
92
+
pinctrl_eth_int: eth_int {
93
+
atmel,pins =
94
+
<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
95
+
};
96
+
97
+
pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
98
+
atmel,pins =
99
+
<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
100
+
};
101
+
};
102
+
};
103
+
104
+
&mmc0 {
105
+
slot@0 {
106
+
reg = <0>;
107
+
bus-width = <8>;
108
+
};
109
+
};
110
+
111
+
&mmc1 {
112
+
status = "okay";
113
+
slot@0 {
114
+
reg = <0>;
115
+
bus-width = <4>;
116
+
};
117
+
};
118
+
119
+
&spi0 {
120
+
cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
121
+
};
122
+
123
+
&usart0 {
124
+
atmel,use-dma-rx;
125
+
atmel,use-dma-tx;
126
+
status = "okay";
127
+
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
128
+
};
129
+
130
+
&usart1 {
131
+
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
132
+
};
133
+
134
+
&usart2 {
135
+
pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
136
+
};
137
+
138
+
&usart3 {
139
+
pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
140
+
};
141
+
142
+
&adc0 {
143
+
pinctrl-0 = <
144
+
&pinctrl_adc0_adtrg
145
+
&pinctrl_adc0_ad0
146
+
&pinctrl_adc0_ad1
147
+
&pinctrl_adc0_ad2
148
+
&pinctrl_adc0_ad3
149
+
&pinctrl_adc0_ad4
150
+
&pinctrl_adc0_ad5
151
+
>;
152
+
};
153
+
154
+
&macb0 {
155
+
phy-mode = "rgmii";
156
+
};
157
+
158
+
&macb1 {
159
+
phy-mode = "rmii";
160
+
};
161
+
162
+
&ebi {
163
+
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
164
+
pinctrl-names = "default";
165
+
status = "okay";
166
+
};
167
+
168
+
&nand_controller {
169
+
status = "okay";
170
+
171
+
nand: nand@3 {
172
+
reg = <0x3 0x0 0x2>;
173
+
atmel,rb = <0>;
174
+
nand-bus-width = <8>;
175
+
nand-ecc-mode = "hw";
176
+
nand-ecc-strength = <8>;
177
+
nand-ecc-step-size = <512>;
178
+
nand-on-flash-bbt;
179
+
label = "atmel_nand";
180
+
181
+
partitions {
182
+
compatible = "fixed-partitions";
183
+
#address-cells = <1>;
184
+
#size-cells = <1>;
185
+
186
+
ubootspl@0 {
187
+
label = "u-boot-spl";
188
+
reg = <0x0 0x20000>;
189
+
};
190
+
191
+
uboot@20000 {
192
+
label = "u-boot";
193
+
reg = <0x20000 0x80000>;
194
+
};
195
+
196
+
ubootenv@a0000 {
197
+
label = "u-boot-env";
198
+
reg = <0xa0000 0x20000>;
199
+
};
200
+
201
+
ubootenv@c0000 {
202
+
label = "u-boot-env";
203
+
reg = <0xc0000 0x20000>;
204
+
};
205
+
206
+
ubi@e0000 {
207
+
label = "ubi";
208
+
reg = <0xe0000 0xfe00000>;
209
+
};
210
+
};
211
+
};
212
+
};
213
+
214
+
&usb0 {
215
+
pinctrl-names = "default";
216
+
pinctrl-0 = <&pinctrl_usba_vbus>;
217
+
atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
218
+
};
219
+
220
+
&usb1 {
221
+
pinctrl-names = "default";
222
+
pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
223
+
num-ports = <3>;
224
+
atmel,vbus-gpio = <0
225
+
&pioE 20 GPIO_ACTIVE_HIGH
226
+
0>;
227
+
atmel,oc-gpio = <0
228
+
&pioE 15 GPIO_ACTIVE_LOW
229
+
0>;
230
+
};