Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Documentation: add Device tree bindings for Hisilicon hip04 ethernet

This patch adds the Device Tree bindings for the Hisilicon hip04
Ethernet controller, including 100M / 1000M controller.

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Zhangfei Gao and committed by
David S. Miller
ef80c32d 3ff13f1c

+88
+88
Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt
··· 1 + Hisilicon hip04 Ethernet Controller 2 + 3 + * Ethernet controller node 4 + 5 + Required properties: 6 + - compatible: should be "hisilicon,hip04-mac". 7 + - reg: address and length of the register set for the device. 8 + - interrupts: interrupt for the device. 9 + - port-handle: <phandle port channel> 10 + phandle, specifies a reference to the syscon ppe node 11 + port, port number connected to the controller 12 + channel, recv channel start from channel * number (RX_DESC_NUM) 13 + - phy-mode: see ethernet.txt [1]. 14 + 15 + Optional properties: 16 + - phy-handle: see ethernet.txt [1]. 17 + 18 + [1] Documentation/devicetree/bindings/net/ethernet.txt 19 + 20 + 21 + * Ethernet ppe node: 22 + Control rx & tx fifos of all ethernet controllers. 23 + Have 2048 recv channels shared by all ethernet controllers, only if no overlap. 24 + Each controller's recv channel start from channel * number (RX_DESC_NUM). 25 + 26 + Required properties: 27 + - compatible: "hisilicon,hip04-ppe", "syscon". 28 + - reg: address and length of the register set for the device. 29 + 30 + 31 + * MDIO bus node: 32 + 33 + Required properties: 34 + 35 + - compatible: should be "hisilicon,hip04-mdio". 36 + - Inherits from MDIO bus node binding [2] 37 + [2] Documentation/devicetree/bindings/net/phy.txt 38 + 39 + Example: 40 + mdio { 41 + compatible = "hisilicon,hip04-mdio"; 42 + reg = <0x28f1000 0x1000>; 43 + #address-cells = <1>; 44 + #size-cells = <0>; 45 + 46 + phy0: ethernet-phy@0 { 47 + compatible = "ethernet-phy-ieee802.3-c22"; 48 + reg = <0>; 49 + marvell,reg-init = <18 0x14 0 0x8001>; 50 + }; 51 + 52 + phy1: ethernet-phy@1 { 53 + compatible = "ethernet-phy-ieee802.3-c22"; 54 + reg = <1>; 55 + marvell,reg-init = <18 0x14 0 0x8001>; 56 + }; 57 + }; 58 + 59 + ppe: ppe@28c0000 { 60 + compatible = "hisilicon,hip04-ppe", "syscon"; 61 + reg = <0x28c0000 0x10000>; 62 + }; 63 + 64 + fe: ethernet@28b0000 { 65 + compatible = "hisilicon,hip04-mac"; 66 + reg = <0x28b0000 0x10000>; 67 + interrupts = <0 413 4>; 68 + phy-mode = "mii"; 69 + port-handle = <&ppe 31 0>; 70 + }; 71 + 72 + ge0: ethernet@2800000 { 73 + compatible = "hisilicon,hip04-mac"; 74 + reg = <0x2800000 0x10000>; 75 + interrupts = <0 402 4>; 76 + phy-mode = "sgmii"; 77 + port-handle = <&ppe 0 1>; 78 + phy-handle = <&phy0>; 79 + }; 80 + 81 + ge8: ethernet@2880000 { 82 + compatible = "hisilicon,hip04-mac"; 83 + reg = <0x2880000 0x10000>; 84 + interrupts = <0 410 4>; 85 + phy-mode = "sgmii"; 86 + port-handle = <&ppe 8 2>; 87 + phy-handle = <&phy1>; 88 + };