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kernel os linux

dt-bindings: pinctrl-zynq: Replace 'io-standard' with 'power-source'

Replace custom pin configuration option 'io-standard' with generic property
'power-source' for Zynq pinctrl also add dt-binding file contains pin
configuration defines for Zynq pinctrl.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1626868353-96475-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Sai Krishna Potthuri and committed by
Linus Walleij
ef641c44 153df45a

+20 -5
+3 -5
Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml
··· 156 156 slew-rate: 157 157 enum: [0, 1] 158 158 159 - io-standard: 160 - description: 161 - Selects the IO standard for MIO pins, this is driver specific. 162 - $ref: "/schemas/types.yaml#/definitions/uint32" 159 + power-source: 163 160 enum: [1, 2, 3, 4] 164 161 165 162 oneOf: ··· 176 179 177 180 examples: 178 181 - | 182 + #include <dt-bindings/pinctrl/pinctrl-zynq.h> 179 183 pinctrl0: pinctrl@700 { 180 184 compatible = "xlnx,zynq-pinctrl"; 181 185 reg = <0x700 0x200>; ··· 191 193 conf { 192 194 groups = "uart1_10_grp"; 193 195 slew-rate = <0>; 194 - io-standard = <1>; 196 + power-source = <IO_STANDARD_LVCMOS18>; 195 197 }; 196 198 197 199 conf-rx {
+17
include/dt-bindings/pinctrl/pinctrl-zynq.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + /* 3 + * MIO pin configuration defines for Xilinx Zynq 4 + * 5 + * Copyright (C) 2021 Xilinx, Inc. 6 + */ 7 + 8 + #ifndef _DT_BINDINGS_PINCTRL_ZYNQ_H 9 + #define _DT_BINDINGS_PINCTRL_ZYNQ_H 10 + 11 + /* Configuration options for different power supplies */ 12 + #define IO_STANDARD_LVCMOS18 1 13 + #define IO_STANDARD_LVCMOS25 2 14 + #define IO_STANDARD_LVCMOS33 3 15 + #define IO_STANDARD_HSTL 4 16 + 17 + #endif /* _DT_BINDINGS_PINCTRL_ZYNQ_H */