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dt-bindings: dmaengine: add DT binding for UniPhier MIO DMAC

The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4,
Pro4, and sLD8 SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Masahiro Yamada and committed by
Vinod Koul
eeea8147 65102238

+25
+25
Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt
··· 1 + UniPhier Media IO DMA controller 2 + 3 + This works as an external DMA engine for SD/eMMC controllers etc. 4 + found in UniPhier LD4, Pro4, sLD8 SoCs. 5 + 6 + Required properties: 7 + - compatible: should be "socionext,uniphier-mio-dmac". 8 + - reg: offset and length of the register set for the device. 9 + - interrupts: a list of interrupt specifiers associated with the DMA channels. 10 + - clocks: a single clock specifier. 11 + - #dma-cells: should be <1>. The single cell represents the channel index. 12 + 13 + Example: 14 + dmac: dma-controller@5a000000 { 15 + compatible = "socionext,uniphier-mio-dmac"; 16 + reg = <0x5a000000 0x1000>; 17 + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, 18 + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; 19 + clocks = <&mio_clk 7>; 20 + #dma-cells = <1>; 21 + }; 22 + 23 + Note: 24 + In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo. 25 + The first two channels share a single interrupt line.