Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

esp_scsi: correctly detect am53c974

The am53c974 returns the same ID as the FAS236, but implements
things slightly differently. So detect the am53c974 by checking
for ESP_CONFIG4 register.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>

authored by

Hannes Reinecke and committed by
Christoph Hellwig
eeea2f9c 6df388f2

+33 -1
+2
drivers/scsi/am53c974.c
··· 368 368 } 369 369 esp->scsi_id = EEbuf[DC390_EE_ADAPT_SCSI_ID]; 370 370 esp->num_tags = 2 << EEbuf[DC390_EE_TAG_CMD_NUM]; 371 + if (EEbuf[DC390_EE_MODE2] & DC390_EE_MODE2_ACTIVE_NEGATION) 372 + esp->config4 |= ESP_CONFIG4_RADE | ESP_CONFIG4_RAE; 371 373 } 372 374 373 375 static int pci_esp_probe_one(struct pci_dev *pdev,
+16 -1
drivers/scsi/esp_scsi.c
··· 268 268 } else { 269 269 esp->min_period = ((5 * esp->ccycle) / 1000); 270 270 } 271 + if (esp->rev == FAS236) { 272 + /* 273 + * The AM53c974 chip returns the same ID as FAS236; 274 + * try to configure glitch eater. 275 + */ 276 + u8 config4 = ESP_CONFIG4_GE1; 277 + esp_write8(config4, ESP_CFG4); 278 + config4 = esp_read8(ESP_CFG4); 279 + if (config4 & ESP_CONFIG4_GE1) { 280 + esp->rev = PCSCSI; 281 + esp_write8(esp->config4, ESP_CFG4); 282 + } 283 + } 271 284 esp->max_period = (esp->max_period + 3)>>2; 272 285 esp->min_period = (esp->min_period + 3)>>2; 273 286 ··· 306 293 /* fallthrough... */ 307 294 308 295 case FAS236: 309 - /* Fast 236 or HME */ 296 + case PCSCSI: 297 + /* Fast 236, AM53c974 or HME */ 310 298 esp_write8(esp->config2, ESP_CFG2); 311 299 if (esp->rev == FASHME) { 312 300 u8 cfg3 = esp->target[0].esp_config3; ··· 2378 2364 "FAS100A", 2379 2365 "FAST", 2380 2366 "FASHME", 2367 + "AM53C974", 2381 2368 }; 2382 2369 2383 2370 static struct scsi_transport_template *esp_transport_template;
+15
drivers/scsi/esp_scsi.h
··· 25 25 #define ESP_CTEST 0x0aUL /* wo Chip test register 0x28 */ 26 26 #define ESP_CFG2 0x0bUL /* rw Second cfg register 0x2c */ 27 27 #define ESP_CFG3 0x0cUL /* rw Third cfg register 0x30 */ 28 + #define ESP_CFG4 0x0dUL /* rw Fourth cfg register 0x34 */ 28 29 #define ESP_TCHI 0x0eUL /* rw High bits transf count 0x38 */ 29 30 #define ESP_UID ESP_TCHI /* ro Unique ID code 0x38 */ 30 31 #define FAS_RLO ESP_TCHI /* rw HME extended counter 0x38 */ ··· 76 75 #define ESP_CONFIG3_EWIDE 0x40 /* Enable Wide-SCSI (hme) */ 77 76 #define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236) */ 78 77 #define ESP_CONFIG3_OBPUSH 0x80 /* Push odd-byte to dma (hme) */ 78 + 79 + /* ESP config register 4 read-write, found only on am53c974 chips */ 80 + #define ESP_CONFIG4_RADE 0x04 /* Active negation */ 81 + #define ESP_CONFIG4_RAE 0x08 /* Active negation on REQ and ACK */ 82 + #define ESP_CONFIG4_PWD 0x20 /* Reduced power feature */ 83 + #define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 */ 84 + #define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 */ 85 + 86 + #define ESP_CONFIG_GE_12NS (0) 87 + #define ESP_CONFIG_GE_25NS (ESP_CONFIG_GE1) 88 + #define ESP_CONFIG_GE_35NS (ESP_CONFIG_GE0) 89 + #define ESP_CONFIG_GE_0NS (ESP_CONFIG_GE0 | ESP_CONFIG_GE1) 79 90 80 91 /* ESP command register read-write */ 81 92 /* Group 1 commands: These may be sent at any point in time to the ESP ··· 267 254 FAS100A = 0x04, 268 255 FAST = 0x05, 269 256 FASHME = 0x06, 257 + PCSCSI = 0x07, /* AM53c974 */ 270 258 }; 271 259 272 260 struct esp_cmd_entry { ··· 480 466 u8 bursts; 481 467 u8 config1; 482 468 u8 config2; 469 + u8 config4; 483 470 484 471 u8 scsi_id; 485 472 u32 scsi_id_mask;