Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (39 commits)
Revert "p54: Use SKB list handling helpers instead of by-hand code."
sctp: fix warning at inet_sock_destruct() while release sctp socket
tun/tap: Fix crashes if open() /dev/net/tun and then poll() it.
dsa: fix 88e6xxx statistics counter snapshotting
forcedeth: Fix NAPI race.
drivers/net/smsc911x.c: Fix resource size off by 1 error
pcnet_cs: add new id
bnx2x: Fix the maximal values of coalescing timeouts.
bnx2x: Disable HC coalescing when setting timeout to zero.
tun: Fix device unregister race
be2net: fix spurious interrupt handling in intx mode
e1000e: disable K1 at 1000Mbps for 82577/82578
e1000e: delay second read of PHY_STATUS register on failure of first read
e1000e: prevent NVM corruption on sectors larger than 4K
e1000e: do not write SmartSpeed register bits on parts without support
e1000e: delay after LCD reset and proper checks for PHY configuration done
e1000e: PHY loopback broken on 82578
ixgbe: Not allow 8259x unsupported wol options change from ethtool
ixgbe: fix inconsistent SFP/SFP+ failure results.
ixgbe: fix regression on some 82598 adapters
...

+659 -260
+19 -23
drivers/isdn/gigaset/ev-layer.c
··· 294 294 {RSP_OK, 604,604, -1, 605, 5, {ACT_CMD+AT_MSN}}, 295 295 {RSP_OK, 605,605, -1, 606, 5, {ACT_CMD+AT_ISO}}, 296 296 {RSP_NULL, 605,605, -1, 606, 5, {ACT_CMD+AT_ISO}}, 297 - {RSP_OK, 606,606, -1, 607, 5, {0}, "+VLS=17\r"}, /* set "Endgeraetemodus" */ 297 + {RSP_OK, 606,606, -1, 607, 5, {0}, "+VLS=17\r"}, 298 298 {RSP_OK, 607,607, -1, 608,-1}, 299 - //{RSP_ZSAU, 608,608,ZSAU_PROCEEDING, 608, 0, {ACT_ERROR}},//DELETE 300 299 {RSP_ZSAU, 608,608,ZSAU_PROCEEDING, 609, 5, {ACT_CMD+AT_DIAL}}, 301 300 {RSP_OK, 609,609, -1, 650, 0, {ACT_DIALING}}, 302 301 303 - {RSP_ZVLS, 608,608, 17, -1,-1, {ACT_DEBUG}}, 304 - {RSP_ZCTP, 609,609, -1, -1,-1, {ACT_DEBUG}}, 305 - {RSP_ZCPN, 609,609, -1, -1,-1, {ACT_DEBUG}}, 306 302 {RSP_ERROR, 601,609, -1, 0, 0, {ACT_ABORTDIAL}}, 307 303 {EV_TIMEOUT, 601,609, -1, 0, 0, {ACT_ABORTDIAL}}, 308 304 309 - /* dialing */ 310 - {RSP_ZCTP, 650,650, -1, -1,-1, {ACT_DEBUG}}, 311 - {RSP_ZCPN, 650,650, -1, -1,-1, {ACT_DEBUG}}, 312 - {RSP_ZSAU, 650,650,ZSAU_CALL_DELIVERED, -1,-1, {ACT_DEBUG}}, /* some devices don't send this */ 305 + /* optional dialing responses */ 306 + {EV_BC_OPEN, 650,650, -1, 651,-1}, 307 + {RSP_ZVLS, 608,651, 17, -1,-1, {ACT_DEBUG}}, 308 + {RSP_ZCTP, 609,651, -1, -1,-1, {ACT_DEBUG}}, 309 + {RSP_ZCPN, 609,651, -1, -1,-1, {ACT_DEBUG}}, 310 + {RSP_ZSAU, 650,651,ZSAU_CALL_DELIVERED, -1,-1, {ACT_DEBUG}}, 313 311 314 - /* connection established */ 315 - {RSP_ZSAU, 650,650,ZSAU_ACTIVE, 800,-1, {ACT_CONNECT}}, //FIXME -> DLE1 316 - {RSP_ZSAU, 750,750,ZSAU_ACTIVE, 800,-1, {ACT_CONNECT}}, //FIXME -> DLE1 317 - 318 - {EV_BC_OPEN, 800,800, -1, 800,-1, {ACT_NOTIFY_BC_UP}}, //FIXME new constate + timeout 312 + /* connect */ 313 + {RSP_ZSAU, 650,650,ZSAU_ACTIVE, 800,-1, {ACT_CONNECT}}, 314 + {RSP_ZSAU, 651,651,ZSAU_ACTIVE, 800,-1, {ACT_CONNECT, 315 + ACT_NOTIFY_BC_UP}}, 316 + {RSP_ZSAU, 750,750,ZSAU_ACTIVE, 800,-1, {ACT_CONNECT}}, 317 + {RSP_ZSAU, 751,751,ZSAU_ACTIVE, 800,-1, {ACT_CONNECT, 318 + ACT_NOTIFY_BC_UP}}, 319 + {EV_BC_OPEN, 800,800, -1, 800,-1, {ACT_NOTIFY_BC_UP}}, 319 320 320 321 /* remote hangup */ 321 - {RSP_ZSAU, 650,650,ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEREJECT}}, 322 - {RSP_ZSAU, 750,750,ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEHUP}}, 322 + {RSP_ZSAU, 650,651,ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEREJECT}}, 323 + {RSP_ZSAU, 750,751,ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEHUP}}, 323 324 {RSP_ZSAU, 800,800,ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEHUP}}, 324 325 325 326 /* hangup */ ··· 359 358 {RSP_ZSAU, 700,729,ZSAU_ACTIVE, 0, 0, {ACT_ABORTACCEPT}}, 360 359 {RSP_ZSAU, 700,729,ZSAU_DISCONNECT_IND, 0, 0, {ACT_ABORTACCEPT}}, 361 360 362 - {EV_TIMEOUT, 750,750, -1, 0, 0, {ACT_CONNTIMEOUT}}, 361 + {EV_BC_OPEN, 750,750, -1, 751,-1}, 362 + {EV_TIMEOUT, 750,751, -1, 0, 0, {ACT_CONNTIMEOUT}}, 363 363 364 364 /* B channel closed (general case) */ 365 365 {EV_BC_CLOSED, -1, -1, -1, -1,-1, {ACT_NOTIFY_BC_DOWN}}, //FIXME ··· 878 876 879 877 static void bchannel_up(struct bc_state *bcs) 880 878 { 881 - if (!(bcs->chstate & CHS_D_UP)) { 882 - dev_notice(bcs->cs->dev, "%s: D channel not up\n", __func__); 883 - bcs->chstate |= CHS_D_UP; 884 - gigaset_i4l_channel_cmd(bcs, ISDN_STAT_DCONN); 885 - } 886 - 887 879 if (bcs->chstate & CHS_B_UP) { 888 880 dev_notice(bcs->cs->dev, "%s: B channel already up\n", 889 881 __func__);
-6
drivers/isdn/gigaset/isocdata.c
··· 174 174 pr_err("invalid size %d\n", size); 175 175 return -EINVAL; 176 176 } 177 - src = iwb->read; 178 - if (unlikely(limit >= BAS_OUTBUFSIZE + BAS_OUTBUFPAD || 179 - (read < src && limit >= src))) { 180 - pr_err("isoc write buffer frame reservation violated\n"); 181 - return -EFAULT; 182 - } 183 177 #endif 184 178 185 179 if (read < write) {
+4
drivers/net/benet/be_hw.h
··· 55 55 #define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */ 56 56 #define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26 57 57 58 + /********* ISR0 Register offset **********/ 59 + #define CEV_ISR0_OFFSET 0xC18 60 + #define CEV_ISR_SIZE 4 61 + 58 62 /********* Event Q door bell *************/ 59 63 #define DB_EQ_OFFSET DB_CQ_OFFSET 60 64 #define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
+9 -7
drivers/net/benet/be_main.c
··· 1274 1274 { 1275 1275 struct be_adapter *adapter = dev; 1276 1276 struct be_ctrl_info *ctrl = &adapter->ctrl; 1277 - int rx, tx; 1277 + int isr; 1278 1278 1279 - tx = event_handle(ctrl, &adapter->tx_eq); 1280 - rx = event_handle(ctrl, &adapter->rx_eq); 1279 + isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET + 1280 + ctrl->pci_func * CEV_ISR_SIZE); 1281 + if (!isr) 1282 + return IRQ_NONE; 1281 1283 1282 - if (rx || tx) 1283 - return IRQ_HANDLED; 1284 - else 1285 - return IRQ_NONE; 1284 + event_handle(ctrl, &adapter->tx_eq); 1285 + event_handle(ctrl, &adapter->rx_eq); 1286 + 1287 + return IRQ_HANDLED; 1286 1288 } 1287 1289 1288 1290 static irqreturn_t be_msix_rx(int irq, void *dev)
+2
drivers/net/bnx2x.h
··· 902 902 u16 rx_quick_cons_trip; 903 903 u16 rx_ticks_int; 904 904 u16 rx_ticks; 905 + /* Maximal coalescing timeout in us */ 906 + #define BNX2X_MAX_COALESCE_TOUT (0xf0*12) 905 907 906 908 u32 lin_cnt; 907 909
+6 -6
drivers/net/bnx2x_main.c
··· 4434 4434 REG_WR16(bp, BAR_USTRORM_INTMEM + 4435 4435 USTORM_SB_HC_DISABLE_OFFSET(port, sb_id, 4436 4436 U_SB_ETH_RX_CQ_INDEX), 4437 - bp->rx_ticks ? 0 : 1); 4437 + (bp->rx_ticks/12) ? 0 : 1); 4438 4438 4439 4439 /* HC_INDEX_C_ETH_TX_CQ_CONS */ 4440 4440 REG_WR8(bp, BAR_CSTRORM_INTMEM + ··· 4444 4444 REG_WR16(bp, BAR_CSTRORM_INTMEM + 4445 4445 CSTORM_SB_HC_DISABLE_OFFSET(port, sb_id, 4446 4446 C_SB_ETH_TX_CQ_INDEX), 4447 - bp->tx_ticks ? 0 : 1); 4447 + (bp->tx_ticks/12) ? 0 : 1); 4448 4448 } 4449 4449 } 4450 4450 ··· 9069 9069 struct bnx2x *bp = netdev_priv(dev); 9070 9070 9071 9071 bp->rx_ticks = (u16) coal->rx_coalesce_usecs; 9072 - if (bp->rx_ticks > 3000) 9073 - bp->rx_ticks = 3000; 9072 + if (bp->rx_ticks > BNX2X_MAX_COALESCE_TOUT) 9073 + bp->rx_ticks = BNX2X_MAX_COALESCE_TOUT; 9074 9074 9075 9075 bp->tx_ticks = (u16) coal->tx_coalesce_usecs; 9076 - if (bp->tx_ticks > 0x3000) 9077 - bp->tx_ticks = 0x3000; 9076 + if (bp->tx_ticks > BNX2X_MAX_COALESCE_TOUT) 9077 + bp->tx_ticks = BNX2X_MAX_COALESCE_TOUT; 9078 9078 9079 9079 if (netif_running(dev)) 9080 9080 bnx2x_update_coalesce(bp);
+3
drivers/net/e1000e/defines.h
··· 238 238 #define E1000_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */ 239 239 #define E1000_STATUS_SPEED_1000 0x00000080 /* Speed 1000Mb/s */ 240 240 #define E1000_STATUS_LAN_INIT_DONE 0x00000200 /* Lan Init Completion by NVM */ 241 + #define E1000_STATUS_PHYRA 0x00000400 /* PHY Reset Asserted */ 241 242 #define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */ 242 243 243 244 /* Constants used to interpret the masked PCI-X bus speed. */ ··· 575 574 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */ 576 575 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */ 577 576 #define PHY_EXT_STATUS 0x0F /* Extended Status Reg */ 577 + 578 + #define PHY_CONTROL_LB 0x4000 /* PHY Loopback bit */ 578 579 579 580 /* NVM Control */ 580 581 #define E1000_EECD_SK 0x00000001 /* NVM Clock */
+4
drivers/net/e1000e/hw.h
··· 215 215 E1000_SWSM = 0x05B50, /* SW Semaphore */ 216 216 E1000_FWSM = 0x05B54, /* FW Semaphore */ 217 217 E1000_SWSM2 = 0x05B58, /* Driver-only SW semaphore */ 218 + E1000_CRC_OFFSET = 0x05F50, /* CRC Offset register */ 218 219 E1000_HICR = 0x08F00, /* Host Interface Control */ 219 220 }; 220 221 ··· 303 302 #define E1000_KMRNCTRLSTA_REN 0x00200000 304 303 #define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */ 305 304 #define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000 /* Nearend Loopback mode */ 305 + #define E1000_KMRNCTRLSTA_K1_CONFIG 0x7 306 + #define E1000_KMRNCTRLSTA_K1_ENABLE 0x140E 307 + #define E1000_KMRNCTRLSTA_K1_DISABLE 0x1400 306 308 307 309 #define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10 308 310 #define IFE_PHY_SPECIAL_CONTROL 0x11 /* 100BaseTx PHY Special Control */
+219 -51
drivers/net/e1000e/ich8lan.c
··· 338 338 { 339 339 struct e1000_nvm_info *nvm = &hw->nvm; 340 340 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; 341 + union ich8_hws_flash_status hsfsts; 341 342 u32 gfpreg; 342 343 u32 sector_base_addr; 343 344 u32 sector_end_addr; ··· 374 373 nvm->flash_bank_size /= 2; 375 374 /* Adjust to word count */ 376 375 nvm->flash_bank_size /= sizeof(u16); 376 + 377 + /* 378 + * Make sure the flash bank size does not overwrite the 4k 379 + * sector ranges. We may have 64k allotted to us but we only care 380 + * about the first 2 4k sectors. Therefore, if we have anything less 381 + * than 64k set in the HSFSTS register, we will reduce the bank size 382 + * down to 4k and let the rest remain unused. If berasesz == 3, then 383 + * we are working in 64k mode. Otherwise we are not. 384 + */ 385 + if (nvm->flash_bank_size > E1000_ICH8_SHADOW_RAM_WORDS) { 386 + hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 387 + if (hsfsts.hsf_status.berasesz != 3) 388 + nvm->flash_bank_size = E1000_ICH8_SHADOW_RAM_WORDS; 389 + } 377 390 378 391 nvm->word_size = E1000_ICH8_SHADOW_RAM_WORDS; 379 392 ··· 459 444 e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, 1); 460 445 461 446 return 0; 447 + } 448 + 449 + /** 450 + * e1000_check_for_copper_link_ich8lan - Check for link (Copper) 451 + * @hw: pointer to the HW structure 452 + * 453 + * Checks to see of the link status of the hardware has changed. If a 454 + * change in link status has been detected, then we read the PHY registers 455 + * to get the current speed/duplex if link exists. 456 + **/ 457 + static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) 458 + { 459 + struct e1000_mac_info *mac = &hw->mac; 460 + s32 ret_val; 461 + bool link; 462 + 463 + /* 464 + * We only want to go out to the PHY registers to see if Auto-Neg 465 + * has completed and/or if our link status has changed. The 466 + * get_link_status flag is set upon receiving a Link Status 467 + * Change or Rx Sequence Error interrupt. 468 + */ 469 + if (!mac->get_link_status) { 470 + ret_val = 0; 471 + goto out; 472 + } 473 + 474 + if (hw->mac.type == e1000_pchlan) { 475 + ret_val = e1000e_write_kmrn_reg(hw, 476 + E1000_KMRNCTRLSTA_K1_CONFIG, 477 + E1000_KMRNCTRLSTA_K1_ENABLE); 478 + if (ret_val) 479 + goto out; 480 + } 481 + 482 + /* 483 + * First we want to see if the MII Status Register reports 484 + * link. If so, then we want to get the current speed/duplex 485 + * of the PHY. 486 + */ 487 + ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link); 488 + if (ret_val) 489 + goto out; 490 + 491 + if (!link) 492 + goto out; /* No link detected */ 493 + 494 + mac->get_link_status = false; 495 + 496 + if (hw->phy.type == e1000_phy_82578) { 497 + ret_val = e1000_link_stall_workaround_hv(hw); 498 + if (ret_val) 499 + goto out; 500 + } 501 + 502 + /* 503 + * Check if there was DownShift, must be checked 504 + * immediately after link-up 505 + */ 506 + e1000e_check_downshift(hw); 507 + 508 + /* 509 + * If we are forcing speed/duplex, then we simply return since 510 + * we have already determined whether we have link or not. 511 + */ 512 + if (!mac->autoneg) { 513 + ret_val = -E1000_ERR_CONFIG; 514 + goto out; 515 + } 516 + 517 + /* 518 + * Auto-Neg is enabled. Auto Speed Detection takes care 519 + * of MAC speed/duplex configuration. So we only need to 520 + * configure Collision Distance in the MAC. 521 + */ 522 + e1000e_config_collision_dist(hw); 523 + 524 + /* 525 + * Configure Flow Control now that Auto-Neg has completed. 526 + * First, we need to restore the desired flow control 527 + * settings because we may have had to re-autoneg with a 528 + * different link partner. 529 + */ 530 + ret_val = e1000e_config_fc_after_link_up(hw); 531 + if (ret_val) 532 + hw_dbg(hw, "Error configuring flow control\n"); 533 + 534 + out: 535 + return ret_val; 462 536 } 463 537 464 538 static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) ··· 798 694 } 799 695 800 696 /** 697 + * e1000_lan_init_done_ich8lan - Check for PHY config completion 698 + * @hw: pointer to the HW structure 699 + * 700 + * Check the appropriate indication the MAC has finished configuring the 701 + * PHY after a software reset. 702 + **/ 703 + static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw) 704 + { 705 + u32 data, loop = E1000_ICH8_LAN_INIT_TIMEOUT; 706 + 707 + /* Wait for basic configuration completes before proceeding */ 708 + do { 709 + data = er32(STATUS); 710 + data &= E1000_STATUS_LAN_INIT_DONE; 711 + udelay(100); 712 + } while ((!data) && --loop); 713 + 714 + /* 715 + * If basic configuration is incomplete before the above loop 716 + * count reaches 0, loading the configuration from NVM will 717 + * leave the PHY in a bad state possibly resulting in no link. 718 + */ 719 + if (loop == 0) 720 + hw_dbg(hw, "LAN_INIT_DONE not set, increase timeout\n"); 721 + 722 + /* Clear the Init Done bit for the next init event */ 723 + data = er32(STATUS); 724 + data &= ~E1000_STATUS_LAN_INIT_DONE; 725 + ew32(STATUS, data); 726 + } 727 + 728 + /** 801 729 * e1000_phy_hw_reset_ich8lan - Performs a PHY reset 802 730 * @hw: pointer to the HW structure 803 731 * ··· 843 707 u32 i; 844 708 u32 data, cnf_size, cnf_base_addr, sw_cfg_mask; 845 709 s32 ret_val; 846 - u16 loop = E1000_ICH8_LAN_INIT_TIMEOUT; 847 710 u16 word_addr, reg_data, reg_addr, phy_page = 0; 848 711 849 712 ret_val = e1000e_phy_hw_reset_generic(hw); 850 713 if (ret_val) 851 714 return ret_val; 715 + 716 + /* Allow time for h/w to get to a quiescent state after reset */ 717 + mdelay(10); 852 718 853 719 if (hw->mac.type == e1000_pchlan) { 854 720 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); ··· 879 741 if (!(data & sw_cfg_mask)) 880 742 return 0; 881 743 882 - /* Wait for basic configuration completes before proceeding*/ 883 - do { 884 - data = er32(STATUS); 885 - data &= E1000_STATUS_LAN_INIT_DONE; 886 - udelay(100); 887 - } while ((!data) && --loop); 888 - 889 - /* 890 - * If basic configuration is incomplete before the above loop 891 - * count reaches 0, loading the configuration from NVM will 892 - * leave the PHY in a bad state possibly resulting in no link. 893 - */ 894 - if (loop == 0) { 895 - hw_dbg(hw, "LAN_INIT_DONE not set, increase timeout\n"); 896 - } 897 - 898 - /* Clear the Init Done bit for the next init event */ 899 - data = er32(STATUS); 900 - data &= ~E1000_STATUS_LAN_INIT_DONE; 901 - ew32(STATUS, data); 744 + /* Wait for basic configuration completes before proceeding */ 745 + e1000_lan_init_done_ich8lan(hw); 902 746 903 747 /* 904 748 * Make sure HW does not configure LCD from PHY ··· 1081 961 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU; 1082 962 ew32(PHY_CTRL, phy_ctrl); 1083 963 964 + if (phy->type != e1000_phy_igp_3) 965 + return 0; 966 + 1084 967 /* 1085 968 * Call gig speed drop workaround on LPLU before accessing 1086 969 * any PHY registers 1087 970 */ 1088 - if ((hw->mac.type == e1000_ich8lan) && 1089 - (hw->phy.type == e1000_phy_igp_3)) 971 + if (hw->mac.type == e1000_ich8lan) 1090 972 e1000e_gig_downshift_workaround_ich8lan(hw); 1091 973 1092 974 /* When LPLU is enabled, we should disable SmartSpeed */ ··· 1100 978 } else { 1101 979 phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU; 1102 980 ew32(PHY_CTRL, phy_ctrl); 981 + 982 + if (phy->type != e1000_phy_igp_3) 983 + return 0; 1103 984 1104 985 /* 1105 986 * LPLU and SmartSpeed are mutually exclusive. LPLU is used ··· 1163 1038 if (!active) { 1164 1039 phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU; 1165 1040 ew32(PHY_CTRL, phy_ctrl); 1041 + 1042 + if (phy->type != e1000_phy_igp_3) 1043 + return 0; 1044 + 1166 1045 /* 1167 1046 * LPLU and SmartSpeed are mutually exclusive. LPLU is used 1168 1047 * during Dx states where the power conservation is most ··· 1202 1073 phy_ctrl |= E1000_PHY_CTRL_NOND0A_LPLU; 1203 1074 ew32(PHY_CTRL, phy_ctrl); 1204 1075 1076 + if (phy->type != e1000_phy_igp_3) 1077 + return 0; 1078 + 1205 1079 /* 1206 1080 * Call gig speed drop workaround on LPLU before accessing 1207 1081 * any PHY registers 1208 1082 */ 1209 - if ((hw->mac.type == e1000_ich8lan) && 1210 - (hw->phy.type == e1000_phy_igp_3)) 1083 + if (hw->mac.type == e1000_ich8lan) 1211 1084 e1000e_gig_downshift_workaround_ich8lan(hw); 1212 1085 1213 1086 /* When LPLU is enabled, we should disable SmartSpeed */ ··· 2036 1905 break; 2037 1906 case 1: 2038 1907 sector_size = ICH_FLASH_SEG_SIZE_4K; 2039 - iteration = flash_bank_size / ICH_FLASH_SEG_SIZE_4K; 1908 + iteration = 1; 2040 1909 break; 2041 1910 case 2: 2042 1911 if (hw->mac.type == e1000_ich9lan) { ··· 2048 1917 break; 2049 1918 case 3: 2050 1919 sector_size = ICH_FLASH_SEG_SIZE_64K; 2051 - iteration = flash_bank_size / ICH_FLASH_SEG_SIZE_64K; 1920 + iteration = 1; 2052 1921 break; 2053 1922 default: 2054 1923 return -E1000_ERR_NVM; ··· 2274 2143 ctrl = er32(CTRL); 2275 2144 2276 2145 if (!e1000_check_reset_block(hw)) { 2146 + /* Clear PHY Reset Asserted bit */ 2147 + if (hw->mac.type >= e1000_pchlan) { 2148 + u32 status = er32(STATUS); 2149 + ew32(STATUS, status & ~E1000_STATUS_PHYRA); 2150 + } 2151 + 2277 2152 /* 2278 2153 * PHY HW reset requires MAC CORE reset at the same 2279 2154 * time to make sure the interface between MAC and the ··· 2293 2156 ew32(CTRL, (ctrl | E1000_CTRL_RST)); 2294 2157 msleep(20); 2295 2158 2296 - if (!ret_val) { 2297 - /* release the swflag because it is not reset by 2298 - * hardware reset 2299 - */ 2159 + if (!ret_val) 2300 2160 e1000_release_swflag_ich8lan(hw); 2161 + 2162 + if (ctrl & E1000_CTRL_PHY_RST) 2163 + ret_val = hw->phy.ops.get_cfg_done(hw); 2164 + 2165 + if (hw->mac.type >= e1000_ich10lan) { 2166 + e1000_lan_init_done_ich8lan(hw); 2167 + } else { 2168 + ret_val = e1000e_get_auto_rd_done(hw); 2169 + if (ret_val) { 2170 + /* 2171 + * When auto config read does not complete, do not 2172 + * return with an error. This can happen in situations 2173 + * where there is no eeprom and prevents getting link. 2174 + */ 2175 + hw_dbg(hw, "Auto Read Done did not complete\n"); 2176 + } 2301 2177 } 2302 2178 2303 - ret_val = e1000e_get_auto_rd_done(hw); 2304 - if (ret_val) { 2305 - /* 2306 - * When auto config read does not complete, do not 2307 - * return with an error. This can happen in situations 2308 - * where there is no eeprom and prevents getting link. 2309 - */ 2310 - hw_dbg(hw, "Auto Read Done did not complete\n"); 2311 - } 2179 + /* 2180 + * For PCH, this write will make sure that any noise 2181 + * will be detected as a CRC error and be dropped rather than show up 2182 + * as a bad packet to the DMA engine. 2183 + */ 2184 + if (hw->mac.type == e1000_pchlan) 2185 + ew32(CRC_OFFSET, 0x65656565); 2312 2186 2313 2187 ew32(IMC, 0xffffffff); 2314 2188 icr = er32(ICR); ··· 2370 2222 for (i = 0; i < mac->mta_reg_count; i++) 2371 2223 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); 2372 2224 2225 + /* 2226 + * The 82578 Rx buffer will stall if wakeup is enabled in host and 2227 + * the ME. Reading the BM_WUC register will clear the host wakeup bit. 2228 + * Reset the phy after disabling host wakeup to reset the Rx buffer. 2229 + */ 2230 + if (hw->phy.type == e1000_phy_82578) { 2231 + hw->phy.ops.read_phy_reg(hw, BM_WUC, &i); 2232 + ret_val = e1000_phy_hw_reset_ich8lan(hw); 2233 + if (ret_val) 2234 + return ret_val; 2235 + } 2236 + 2373 2237 /* Setup link and flow control */ 2374 2238 ret_val = e1000_setup_link_ich8lan(hw); 2375 2239 ··· 2412 2252 ctrl_ext = er32(CTRL_EXT); 2413 2253 ctrl_ext |= E1000_CTRL_EXT_RO_DIS; 2414 2254 ew32(CTRL_EXT, ctrl_ext); 2415 - 2416 - /* 2417 - * The 82578 Rx buffer will stall if wakeup is enabled in host and 2418 - * the ME. Reading the BM_WUC register will clear the host wakeup bit. 2419 - * Reset the phy after disabling host wakeup to reset the Rx buffer. 2420 - */ 2421 - if (hw->phy.type == e1000_phy_82578) { 2422 - e1e_rphy(hw, BM_WUC, &i); 2423 - e1000e_phy_hw_reset_generic(hw); 2424 - } 2425 2255 2426 2256 /* 2427 2257 * Clear all of the statistics registers (clear on read). It is ··· 2634 2484 ret_val = e1000e_get_speed_and_duplex_copper(hw, speed, duplex); 2635 2485 if (ret_val) 2636 2486 return ret_val; 2487 + 2488 + if ((hw->mac.type == e1000_pchlan) && (*speed == SPEED_1000)) { 2489 + ret_val = e1000e_write_kmrn_reg(hw, 2490 + E1000_KMRNCTRLSTA_K1_CONFIG, 2491 + E1000_KMRNCTRLSTA_K1_DISABLE); 2492 + if (ret_val) 2493 + return ret_val; 2494 + } 2637 2495 2638 2496 if ((hw->mac.type == e1000_ich8lan) && 2639 2497 (hw->phy.type == e1000_phy_igp_3) && ··· 3008 2850 { 3009 2851 u32 bank = 0; 3010 2852 2853 + if (hw->mac.type >= e1000_pchlan) { 2854 + u32 status = er32(STATUS); 2855 + 2856 + if (status & E1000_STATUS_PHYRA) 2857 + ew32(STATUS, status & ~E1000_STATUS_PHYRA); 2858 + else 2859 + hw_dbg(hw, 2860 + "PHY Reset Asserted not set - needs delay\n"); 2861 + } 2862 + 3011 2863 e1000e_get_cfg_done(hw); 3012 2864 3013 2865 /* If EEPROM is not marked present, init the IGP 3 PHY manually */ ··· 3089 2921 static struct e1000_mac_operations ich8_mac_ops = { 3090 2922 .id_led_init = e1000e_id_led_init, 3091 2923 .check_mng_mode = e1000_check_mng_mode_ich8lan, 3092 - .check_for_link = e1000e_check_for_copper_link, 2924 + .check_for_link = e1000_check_for_copper_link_ich8lan, 3093 2925 /* cleanup_led dependent on mac type */ 3094 2926 .clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan, 3095 2927 .get_bus_info = e1000_get_bus_info_ich8lan,
-6
drivers/net/e1000e/lib.c
··· 378 378 379 379 mac->get_link_status = 0; 380 380 381 - if (hw->phy.type == e1000_phy_82578) { 382 - ret_val = e1000_link_stall_workaround_hv(hw); 383 - if (ret_val) 384 - return ret_val; 385 - } 386 - 387 381 /* 388 382 * Check if there was DownShift, must be checked 389 383 * immediately after link-up
+11 -1
drivers/net/e1000e/phy.c
··· 1531 1531 */ 1532 1532 ret_val = e1e_rphy(hw, PHY_STATUS, &phy_status); 1533 1533 if (ret_val) 1534 - break; 1534 + /* 1535 + * If the first read fails, another entity may have 1536 + * ownership of the resources, wait and try again to 1537 + * see if they have relinquished the resources yet. 1538 + */ 1539 + udelay(usec_interval); 1535 1540 ret_val = e1e_rphy(hw, PHY_STATUS, &phy_status); 1536 1541 if (ret_val) 1537 1542 break; ··· 2740 2735 u16 data; 2741 2736 2742 2737 if (hw->phy.type != e1000_phy_82578) 2738 + goto out; 2739 + 2740 + /* Do not apply workaround if in PHY loopback bit 14 set */ 2741 + hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &data); 2742 + if (data & PHY_CONTROL_LB) 2743 2743 goto out; 2744 2744 2745 2745 /* check if link is up and at 1Gbps */
+14 -11
drivers/net/forcedeth.c
··· 3514 3514 nv_msi_workaround(np); 3515 3515 3516 3516 #ifdef CONFIG_FORCEDETH_NAPI 3517 - napi_schedule(&np->napi); 3518 - 3519 - /* Disable furthur irq's 3520 - (msix not enabled with napi) */ 3521 - writel(0, base + NvRegIrqMask); 3517 + if (napi_schedule_prep(&np->napi)) { 3518 + /* 3519 + * Disable further irq's (msix not enabled with napi) 3520 + */ 3521 + writel(0, base + NvRegIrqMask); 3522 + __napi_schedule(&np->napi); 3523 + } 3522 3524 3523 3525 #else 3524 3526 do ··· 3617 3615 nv_msi_workaround(np); 3618 3616 3619 3617 #ifdef CONFIG_FORCEDETH_NAPI 3620 - napi_schedule(&np->napi); 3621 - 3622 - /* Disable furthur irq's 3623 - (msix not enabled with napi) */ 3624 - writel(0, base + NvRegIrqMask); 3625 - 3618 + if (napi_schedule_prep(&np->napi)) { 3619 + /* 3620 + * Disable further irq's (msix not enabled with napi) 3621 + */ 3622 + writel(0, base + NvRegIrqMask); 3623 + __napi_schedule(&np->napi); 3624 + } 3626 3625 #else 3627 3626 do 3628 3627 {
-1
drivers/net/ixgbe/ixgbe_ethtool.c
··· 1830 1830 break; 1831 1831 default: 1832 1832 wol->supported = 0; 1833 - retval = 0; 1834 1833 } 1835 1834 1836 1835 return retval;
+20 -12
drivers/net/ixgbe/ixgbe_main.c
··· 2697 2697 2698 2698 /* 2699 2699 * For hot-pluggable SFP+ devices, a new SFP+ module may have 2700 - * arrived before interrupts were enabled. We need to kick off 2701 - * the SFP+ module setup first, then try to bring up link. 2700 + * arrived before interrupts were enabled but after probe. Such 2701 + * devices wouldn't have their type identified yet. We need to 2702 + * kick off the SFP+ module setup first, then try to bring up link. 2702 2703 * If we're not hot-pluggable SFP+, we just need to configure link 2703 2704 * and bring it up. 2704 2705 */ 2705 - err = hw->phy.ops.identify(hw); 2706 - if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 2707 - dev_err(&adapter->pdev->dev, "failed to initialize because " 2708 - "an unsupported SFP+ module type was detected.\n" 2709 - "Reload the driver after installing a supported " 2710 - "module.\n"); 2711 - ixgbe_down(adapter); 2712 - return err; 2706 + if (hw->phy.type == ixgbe_phy_unknown) { 2707 + err = hw->phy.ops.identify(hw); 2708 + if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 2709 + /* 2710 + * Take the device down and schedule the sfp tasklet 2711 + * which will unregister_netdev and log it. 2712 + */ 2713 + ixgbe_down(adapter); 2714 + schedule_work(&adapter->sfp_config_module_task); 2715 + return err; 2716 + } 2713 2717 } 2714 2718 2715 2719 if (ixgbe_is_sfp(hw)) { ··· 3728 3724 if ((hw->phy.type == ixgbe_phy_nl) && 3729 3725 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 3730 3726 s32 ret = hw->phy.ops.identify_sfp(hw); 3731 - if (ret) 3727 + if (ret == IXGBE_ERR_SFP_NOT_PRESENT) 3732 3728 goto reschedule; 3733 3729 ret = hw->phy.ops.reset(hw); 3734 3730 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { ··· 4538 4534 u32 err; 4539 4535 4540 4536 adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK; 4537 + 4538 + /* Time for electrical oscillations to settle down */ 4539 + msleep(100); 4541 4540 err = hw->phy.ops.identify_sfp(hw); 4541 + 4542 4542 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 4543 4543 dev_err(&adapter->pdev->dev, "failed to initialize because " 4544 4544 "an unsupported SFP+ module type was detected.\n" 4545 4545 "Reload the driver after installing a supported " 4546 4546 "module.\n"); 4547 - ixgbe_down(adapter); 4547 + unregister_netdev(adapter->netdev); 4548 4548 return; 4549 4549 } 4550 4550 hw->mac.ops.setup_sfp(hw);
+3
drivers/net/ixgbe/ixgbe_phy.c
··· 60 60 61 61 if (hw->phy.type == ixgbe_phy_unknown) { 62 62 for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) { 63 + hw->phy.mdio.prtad = phy_addr; 63 64 if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) { 64 65 ixgbe_get_phy_id(hw); 65 66 hw->phy.type = ··· 69 68 break; 70 69 } 71 70 } 71 + /* clear value if nothing found */ 72 + hw->phy.mdio.prtad = 0; 72 73 } else { 73 74 status = 0; 74 75 }
+15 -2
drivers/net/netxen/netxen_nic.h
··· 60 60 #define _NETXEN_NIC_LINUX_SUBVERSION 30 61 61 #define NETXEN_NIC_LINUX_VERSIONID "4.0.30" 62 62 63 - #define NETXEN_VERSION_CODE(a, b, c) (((a) << 16) + ((b) << 8) + (c)) 63 + #define NETXEN_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c)) 64 + #define _major(v) (((v) >> 24) & 0xff) 65 + #define _minor(v) (((v) >> 16) & 0xff) 66 + #define _build(v) ((v) & 0xffff) 67 + 68 + /* version in image has weird encoding: 69 + * 7:0 - major 70 + * 15:8 - minor 71 + * 31:16 - build (little endian) 72 + */ 73 + #define NETXEN_DECODE_VERSION(v) \ 74 + NETXEN_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16)) 64 75 65 76 #define NETXEN_NUM_FLASH_SECTORS (64) 66 77 #define NETXEN_FLASH_SECTOR_SIZE (64 * 1024) ··· 625 614 #define NX_P2_MN_ROMIMAGE 0 626 615 #define NX_P3_CT_ROMIMAGE 1 627 616 #define NX_P3_MN_ROMIMAGE 2 617 + #define NX_FLASH_ROMIMAGE 3 628 618 629 619 #define NETXEN_USER_START_OLD NETXEN_PXE_START /* for backward compatibility */ 630 620 ··· 1255 1243 u32 resv3; 1256 1244 1257 1245 u8 has_link_events; 1258 - u8 resv1; 1246 + u8 fw_type; 1259 1247 u16 tx_context_id; 1260 1248 u16 mtu; 1261 1249 u16 is_up; ··· 1399 1387 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter); 1400 1388 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val); 1401 1389 int netxen_load_firmware(struct netxen_adapter *adapter); 1390 + int netxen_need_fw_reset(struct netxen_adapter *adapter); 1402 1391 void netxen_request_firmware(struct netxen_adapter *adapter); 1403 1392 void netxen_release_firmware(struct netxen_adapter *adapter); 1404 1393 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose);
+1
drivers/net/netxen/netxen_nic_hdr.h
··· 853 853 #define NX_PEG_TUNE_CAPABILITY (NETXEN_CAM_RAM(0x02c)) 854 854 855 855 #define NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL (0x14) 856 + #define NETXEN_PEG_ALIVE_COUNTER (NETXEN_CAM_RAM(0xb0)) 856 857 857 858 #define ISR_MSI_INT_TRIGGER(FUNC) (NETXEN_PCIX_PS_REG(PCIX_MSI_F(FUNC))) 858 859 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200)
+92 -19
drivers/net/netxen/netxen_nic_init.c
··· 684 684 } 685 685 686 686 int 687 + netxen_need_fw_reset(struct netxen_adapter *adapter) 688 + { 689 + u32 count, old_count; 690 + u32 val, version, major, minor, build; 691 + int i, timeout; 692 + u8 fw_type; 693 + 694 + /* NX2031 firmware doesn't support heartbit */ 695 + if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 696 + return 1; 697 + 698 + /* last attempt had failed */ 699 + if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 700 + return 1; 701 + 702 + old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 703 + 704 + for (i = 0; i < 10; i++) { 705 + 706 + timeout = msleep_interruptible(200); 707 + if (timeout) { 708 + NXWR32(adapter, CRB_CMDPEG_STATE, 709 + PHAN_INITIALIZE_FAILED); 710 + return -EINTR; 711 + } 712 + 713 + count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 714 + if (count != old_count) 715 + break; 716 + } 717 + 718 + /* firmware is dead */ 719 + if (count == old_count) 720 + return 1; 721 + 722 + /* check if we have got newer or different file firmware */ 723 + if (adapter->fw) { 724 + 725 + const struct firmware *fw = adapter->fw; 726 + 727 + val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 728 + version = NETXEN_DECODE_VERSION(val); 729 + 730 + major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 731 + minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 732 + build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 733 + 734 + if (version > NETXEN_VERSION_CODE(major, minor, build)) 735 + return 1; 736 + 737 + if (version == NETXEN_VERSION_CODE(major, minor, build)) { 738 + 739 + val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 740 + fw_type = (val & 0x4) ? 741 + NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 742 + 743 + if (adapter->fw_type != fw_type) 744 + return 1; 745 + } 746 + } 747 + 748 + return 0; 749 + } 750 + 751 + static char *fw_name[] = { 752 + "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash", 753 + }; 754 + 755 + int 687 756 netxen_load_firmware(struct netxen_adapter *adapter) 688 757 { 689 758 u64 *ptr64; 690 759 u32 i, flashaddr, size; 691 760 const struct firmware *fw = adapter->fw; 761 + struct pci_dev *pdev = adapter->pdev; 762 + 763 + dev_info(&pdev->dev, "loading firmware from %s\n", 764 + fw_name[adapter->fw_type]); 692 765 693 766 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 694 767 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); ··· 829 756 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname) 830 757 { 831 758 __le32 val; 832 - u32 major, minor, build, ver, min_ver, bios; 759 + u32 ver, min_ver, bios; 833 760 struct pci_dev *pdev = adapter->pdev; 834 761 const struct firmware *fw = adapter->fw; 835 762 ··· 841 768 return -EINVAL; 842 769 843 770 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 844 - major = (__force u32)val & 0xff; 845 - minor = ((__force u32)val >> 8) & 0xff; 846 - build = (__force u32)val >> 16; 847 771 848 772 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 849 773 min_ver = NETXEN_VERSION_CODE(4, 0, 216); 850 774 else 851 775 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 852 776 853 - ver = NETXEN_VERSION_CODE(major, minor, build); 777 + ver = NETXEN_DECODE_VERSION(val); 854 778 855 - if ((major > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) { 779 + if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) { 856 780 dev_err(&pdev->dev, 857 781 "%s: firmware version %d.%d.%d unsupported\n", 858 - fwname, major, minor, build); 782 + fwname, _major(ver), _minor(ver), _build(ver)); 859 783 return -EINVAL; 860 784 } 861 785 ··· 868 798 if (netxen_rom_fast_read(adapter, 869 799 NX_FW_VERSION_OFFSET, (int *)&val)) 870 800 return -EIO; 871 - major = (__force u32)val & 0xff; 872 - minor = ((__force u32)val >> 8) & 0xff; 873 - build = (__force u32)val >> 16; 874 - if (NETXEN_VERSION_CODE(major, minor, build) > ver) 801 + val = NETXEN_DECODE_VERSION(val); 802 + if (val > ver) { 803 + dev_info(&pdev->dev, "%s: firmware is older than flash\n", 804 + fwname); 875 805 return -EINVAL; 806 + } 876 807 877 808 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 878 809 return 0; 879 810 } 880 811 881 - static char *fw_name[] = { "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin" }; 882 - 883 812 void netxen_request_firmware(struct netxen_adapter *adapter) 884 813 { 885 814 u32 capability, flashed_ver; 886 - int fw_type; 815 + u8 fw_type; 887 816 struct pci_dev *pdev = adapter->pdev; 888 817 int rc = 0; 889 818 ··· 899 830 900 831 netxen_rom_fast_read(adapter, 901 832 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 833 + flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 834 + 902 835 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 903 836 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 904 837 if (capability & NX_PEG_TUNE_MN_PRESENT) { ··· 908 837 goto request_fw; 909 838 } 910 839 } 840 + 841 + fw_type = NX_FLASH_ROMIMAGE; 842 + adapter->fw = NULL; 843 + goto done; 911 844 912 845 request_fw: 913 846 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev); ··· 921 846 goto request_mn; 922 847 } 923 848 849 + fw_type = NX_FLASH_ROMIMAGE; 924 850 adapter->fw = NULL; 925 851 goto done; 926 852 } ··· 935 859 goto request_mn; 936 860 } 937 861 862 + fw_type = NX_FLASH_ROMIMAGE; 938 863 adapter->fw = NULL; 939 864 goto done; 940 865 } 941 866 942 867 done: 943 - if (adapter->fw) 944 - dev_info(&pdev->dev, "loading firmware from file %s\n", 945 - fw_name[fw_type]); 946 - else 947 - dev_info(&pdev->dev, "loading firmware from flash\n"); 868 + adapter->fw_type = fw_type; 948 869 } 949 870 950 871
+4
drivers/net/netxen/netxen_nic_main.c
··· 718 718 if (request_fw) 719 719 netxen_request_firmware(adapter); 720 720 721 + err = netxen_need_fw_reset(adapter); 722 + if (err <= 0) 723 + return err; 724 + 721 725 if (first_boot != 0x55555555) { 722 726 NXWR32(adapter, CRB_CMDPEG_STATE, 0); 723 727 netxen_pinit_from_rom(adapter, 0);
+1
drivers/net/pcmcia/pcnet_cs.c
··· 1727 1727 PCMCIA_DEVICE_PROD_ID12("PRETEC", "Ethernet CompactLAN 10BaseT 3.3V", 0xebf91155, 0x7f5a4f50), 1728 1728 PCMCIA_DEVICE_PROD_ID12("Psion Dacom", "Gold Card Ethernet", 0xf5f025c2, 0x3a30e110), 1729 1729 PCMCIA_DEVICE_PROD_ID12("=RELIA==", "Ethernet", 0xcdd0644a, 0x00b2e941), 1730 + PCMCIA_DEVICE_PROD_ID12("RIOS Systems Co.", "PC CARD3 ETHERNET", 0x7dd33481, 0x10b41826), 1730 1731 PCMCIA_DEVICE_PROD_ID12("RP", "1625B Ethernet NE2000 Compatible", 0xe3e66e22, 0xb96150df), 1731 1732 PCMCIA_DEVICE_PROD_ID12("RPTI", "EP400 Ethernet NE2000 Compatible", 0xdc6f88fd, 0x4a7e2ae0), 1732 1733 PCMCIA_DEVICE_PROD_ID12("RPTI", "EP401 Ethernet NE2000 Compatible", 0xdc6f88fd, 0x4bcbd7fd),
+22 -3
drivers/net/phy/phy.c
··· 928 928 * Otherwise, it's 0, and we're 929 929 * still waiting for AN */ 930 930 if (err > 0) { 931 - phydev->state = PHY_RUNNING; 931 + err = phy_read_status(phydev); 932 + if (err) 933 + break; 934 + 935 + if (phydev->link) { 936 + phydev->state = PHY_RUNNING; 937 + netif_carrier_on(phydev->attached_dev); 938 + } else 939 + phydev->state = PHY_NOLINK; 940 + phydev->adjust_link(phydev->attached_dev); 932 941 } else { 933 942 phydev->state = PHY_AN; 934 943 phydev->link_timeout = PHY_AN_TIMEOUT; 935 944 } 936 - } else 937 - phydev->state = PHY_RUNNING; 945 + } else { 946 + err = phy_read_status(phydev); 947 + if (err) 948 + break; 949 + 950 + if (phydev->link) { 951 + phydev->state = PHY_RUNNING; 952 + netif_carrier_on(phydev->attached_dev); 953 + } else 954 + phydev->state = PHY_NOLINK; 955 + phydev->adjust_link(phydev->attached_dev); 956 + } 938 957 break; 939 958 } 940 959
+2
drivers/net/qlge/qlge.h
··· 1607 1607 int ql_cam_route_initialize(struct ql_adapter *qdev); 1608 1608 int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data); 1609 1609 int ql_mb_about_fw(struct ql_adapter *qdev); 1610 + void ql_link_on(struct ql_adapter *qdev); 1611 + void ql_link_off(struct ql_adapter *qdev); 1610 1612 1611 1613 #if 1 1612 1614 #define QL_ALL_DUMP
+2 -2
drivers/net/qlge/qlge_ethtool.c
··· 59 59 cqicb->pkt_delay = 60 60 cpu_to_le16(qdev->tx_max_coalesced_frames); 61 61 cqicb->flags = FLAGS_LI; 62 - status = ql_write_cfg(qdev, cqicb, sizeof(cqicb), 62 + status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb), 63 63 CFG_LCQ, rx_ring->cq_id); 64 64 if (status) { 65 65 QPRINTK(qdev, IFUP, ERR, ··· 82 82 cqicb->pkt_delay = 83 83 cpu_to_le16(qdev->rx_max_coalesced_frames); 84 84 cqicb->flags = FLAGS_LI; 85 - status = ql_write_cfg(qdev, cqicb, sizeof(cqicb), 85 + status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb), 86 86 CFG_LCQ, rx_ring->cq_id); 87 87 if (status) { 88 88 QPRINTK(qdev, IFUP, ERR,
+116 -41
drivers/net/qlge/qlge_main.c
··· 214 214 return -ENOMEM; 215 215 } 216 216 217 + status = ql_sem_spinlock(qdev, SEM_ICB_MASK); 218 + if (status) 219 + return status; 220 + 217 221 status = ql_wait_cfg(qdev, bit); 218 222 if (status) { 219 223 QPRINTK(qdev, IFUP, ERR, ··· 225 221 goto exit; 226 222 } 227 223 228 - status = ql_sem_spinlock(qdev, SEM_ICB_MASK); 229 - if (status) 230 - goto exit; 231 224 ql_write32(qdev, ICB_L, (u32) map); 232 225 ql_write32(qdev, ICB_H, (u32) (map >> 32)); 233 - ql_sem_unlock(qdev, SEM_ICB_MASK); /* does flush too */ 234 226 235 227 mask = CFG_Q_MASK | (bit << 16); 236 228 value = bit | (q_id << CFG_Q_SHIFT); ··· 237 237 */ 238 238 status = ql_wait_cfg(qdev, bit); 239 239 exit: 240 + ql_sem_unlock(qdev, SEM_ICB_MASK); /* does flush too */ 240 241 pci_unmap_single(qdev->pdev, map, size, direction); 241 242 return status; 242 243 } ··· 411 410 } 412 411 exit: 413 412 return status; 413 + } 414 + 415 + /* Set or clear MAC address in hardware. We sometimes 416 + * have to clear it to prevent wrong frame routing 417 + * especially in a bonding environment. 418 + */ 419 + static int ql_set_mac_addr(struct ql_adapter *qdev, int set) 420 + { 421 + int status; 422 + char zero_mac_addr[ETH_ALEN]; 423 + char *addr; 424 + 425 + if (set) { 426 + addr = &qdev->ndev->dev_addr[0]; 427 + QPRINTK(qdev, IFUP, DEBUG, 428 + "Set Mac addr %02x:%02x:%02x:%02x:%02x:%02x\n", 429 + addr[0], addr[1], addr[2], addr[3], 430 + addr[4], addr[5]); 431 + } else { 432 + memset(zero_mac_addr, 0, ETH_ALEN); 433 + addr = &zero_mac_addr[0]; 434 + QPRINTK(qdev, IFUP, DEBUG, 435 + "Clearing MAC address on %s\n", 436 + qdev->ndev->name); 437 + } 438 + status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); 439 + if (status) 440 + return status; 441 + status = ql_set_mac_addr_reg(qdev, (u8 *) addr, 442 + MAC_ADDR_TYPE_CAM_MAC, qdev->func * MAX_CQ); 443 + ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); 444 + if (status) 445 + QPRINTK(qdev, IFUP, ERR, "Failed to init mac " 446 + "address.\n"); 447 + return status; 448 + } 449 + 450 + void ql_link_on(struct ql_adapter *qdev) 451 + { 452 + QPRINTK(qdev, LINK, ERR, "%s: Link is up.\n", 453 + qdev->ndev->name); 454 + netif_carrier_on(qdev->ndev); 455 + ql_set_mac_addr(qdev, 1); 456 + } 457 + 458 + void ql_link_off(struct ql_adapter *qdev) 459 + { 460 + QPRINTK(qdev, LINK, ERR, "%s: Link is down.\n", 461 + qdev->ndev->name); 462 + netif_carrier_off(qdev->ndev); 463 + ql_set_mac_addr(qdev, 0); 414 464 } 415 465 416 466 /* Get a specific frame routing value from the CAM. ··· 1680 1628 tx_ring = &qdev->tx_ring[mac_rsp->txq_idx]; 1681 1629 tx_ring_desc = &tx_ring->q[mac_rsp->tid]; 1682 1630 ql_unmap_send(qdev, tx_ring_desc, tx_ring_desc->map_cnt); 1683 - qdev->stats.tx_bytes += tx_ring_desc->map_cnt; 1631 + qdev->stats.tx_bytes += (tx_ring_desc->skb)->len; 1684 1632 qdev->stats.tx_packets++; 1685 1633 dev_kfree_skb(tx_ring_desc->skb); 1686 1634 tx_ring_desc->skb = NULL; ··· 1712 1660 /* Fire up a handler to reset the MPI processor. */ 1713 1661 void ql_queue_fw_error(struct ql_adapter *qdev) 1714 1662 { 1715 - netif_carrier_off(qdev->ndev); 1663 + ql_link_off(qdev); 1716 1664 queue_delayed_work(qdev->workqueue, &qdev->mpi_reset_work, 0); 1717 1665 } 1718 1666 1719 1667 void ql_queue_asic_error(struct ql_adapter *qdev) 1720 1668 { 1721 - netif_carrier_off(qdev->ndev); 1669 + ql_link_off(qdev); 1722 1670 ql_disable_interrupts(qdev); 1723 1671 /* Clear adapter up bit to signal the recovery 1724 1672 * process that it shouldn't kill the reset worker ··· 2156 2104 } 2157 2105 tx_ring_desc = &tx_ring->q[tx_ring->prod_idx]; 2158 2106 mac_iocb_ptr = tx_ring_desc->queue_entry; 2159 - memset((void *)mac_iocb_ptr, 0, sizeof(mac_iocb_ptr)); 2107 + memset((void *)mac_iocb_ptr, 0, sizeof(*mac_iocb_ptr)); 2160 2108 2161 2109 mac_iocb_ptr->opcode = OPCODE_OB_MAC_IOCB; 2162 2110 mac_iocb_ptr->tid = tx_ring_desc->index; ··· 2795 2743 2796 2744 ql_init_tx_ring(qdev, tx_ring); 2797 2745 2798 - err = ql_write_cfg(qdev, wqicb, sizeof(wqicb), CFG_LRQ, 2746 + err = ql_write_cfg(qdev, wqicb, sizeof(*wqicb), CFG_LRQ, 2799 2747 (u16) tx_ring->wq_id); 2800 2748 if (err) { 2801 2749 QPRINTK(qdev, IFUP, ERR, "Failed to load tx_ring.\n"); ··· 3060 3008 int i; 3061 3009 u8 *hash_id = (u8 *) ricb->hash_cq_id; 3062 3010 3063 - memset((void *)ricb, 0, sizeof(ricb)); 3011 + memset((void *)ricb, 0, sizeof(*ricb)); 3064 3012 3065 3013 ricb->base_cq = qdev->rss_ring_first_cq_id | RSS_L4K; 3066 3014 ricb->flags = ··· 3082 3030 3083 3031 QPRINTK(qdev, IFUP, DEBUG, "Initializing RSS.\n"); 3084 3032 3085 - status = ql_write_cfg(qdev, ricb, sizeof(ricb), CFG_LR, 0); 3033 + status = ql_write_cfg(qdev, ricb, sizeof(*ricb), CFG_LR, 0); 3086 3034 if (status) { 3087 3035 QPRINTK(qdev, IFUP, ERR, "Failed to load RICB.\n"); 3088 3036 return status; ··· 3091 3039 return status; 3092 3040 } 3093 3041 3042 + static int ql_clear_routing_entries(struct ql_adapter *qdev) 3043 + { 3044 + int i, status = 0; 3045 + 3046 + status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); 3047 + if (status) 3048 + return status; 3049 + /* Clear all the entries in the routing table. */ 3050 + for (i = 0; i < 16; i++) { 3051 + status = ql_set_routing_reg(qdev, i, 0, 0); 3052 + if (status) { 3053 + QPRINTK(qdev, IFUP, ERR, 3054 + "Failed to init routing register for CAM " 3055 + "packets.\n"); 3056 + break; 3057 + } 3058 + } 3059 + ql_sem_unlock(qdev, SEM_RT_IDX_MASK); 3060 + return status; 3061 + } 3062 + 3094 3063 /* Initialize the frame-to-queue routing. */ 3095 3064 static int ql_route_initialize(struct ql_adapter *qdev) 3096 3065 { 3097 3066 int status = 0; 3098 - int i; 3099 3067 3100 3068 status = ql_sem_spinlock(qdev, SEM_RT_IDX_MASK); 3101 3069 if (status) 3102 3070 return status; 3103 3071 3104 3072 /* Clear all the entries in the routing table. */ 3105 - for (i = 0; i < 16; i++) { 3106 - status = ql_set_routing_reg(qdev, i, 0, 0); 3107 - if (status) { 3108 - QPRINTK(qdev, IFUP, ERR, 3109 - "Failed to init routing register for CAM packets.\n"); 3110 - goto exit; 3111 - } 3112 - } 3073 + status = ql_clear_routing_entries(qdev); 3074 + if (status) 3075 + goto exit; 3113 3076 3114 3077 status = ql_set_routing_reg(qdev, RT_IDX_ALL_ERR_SLOT, RT_IDX_ERR, 1); 3115 3078 if (status) { ··· 3163 3096 3164 3097 int ql_cam_route_initialize(struct ql_adapter *qdev) 3165 3098 { 3166 - int status; 3099 + int status, set; 3167 3100 3168 - status = ql_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); 3169 - if (status) 3170 - return status; 3171 - status = ql_set_mac_addr_reg(qdev, (u8 *) qdev->ndev->perm_addr, 3172 - MAC_ADDR_TYPE_CAM_MAC, qdev->func * MAX_CQ); 3173 - ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK); 3101 + /* If check if the link is up and use to 3102 + * determine if we are setting or clearing 3103 + * the MAC address in the CAM. 3104 + */ 3105 + set = ql_read32(qdev, STS); 3106 + set &= qdev->port_link_up; 3107 + status = ql_set_mac_addr(qdev, set); 3174 3108 if (status) { 3175 3109 QPRINTK(qdev, IFUP, ERR, "Failed to init mac address.\n"); 3176 3110 return status; ··· 3278 3210 { 3279 3211 u32 value; 3280 3212 int status = 0; 3281 - unsigned long end_jiffies = jiffies + 3282 - max((unsigned long)1, usecs_to_jiffies(30)); 3213 + unsigned long end_jiffies; 3283 3214 3215 + /* Clear all the entries in the routing table. */ 3216 + status = ql_clear_routing_entries(qdev); 3217 + if (status) { 3218 + QPRINTK(qdev, IFUP, ERR, "Failed to clear routing bits.\n"); 3219 + return status; 3220 + } 3221 + 3222 + end_jiffies = jiffies + 3223 + max((unsigned long)1, usecs_to_jiffies(30)); 3284 3224 ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR); 3285 3225 3286 3226 do { ··· 3328 3252 int i, status = 0; 3329 3253 struct rx_ring *rx_ring; 3330 3254 3331 - netif_carrier_off(qdev->ndev); 3255 + ql_link_off(qdev); 3332 3256 3333 3257 /* Don't kill the reset worker thread if we 3334 3258 * are in the process of recovery. ··· 3395 3319 } 3396 3320 set_bit(QL_ADAPTER_UP, &qdev->flags); 3397 3321 ql_alloc_rx_buffers(qdev); 3398 - if ((ql_read32(qdev, STS) & qdev->port_init)) 3399 - netif_carrier_on(qdev->ndev); 3322 + /* If the port is initialized and the 3323 + * link is up the turn on the carrier. 3324 + */ 3325 + if ((ql_read32(qdev, STS) & qdev->port_init) && 3326 + (ql_read32(qdev, STS) & qdev->port_link_up)) 3327 + ql_link_on(qdev); 3400 3328 ql_enable_interrupts(qdev); 3401 3329 ql_enable_all_completion_interrupts(qdev); 3402 3330 netif_tx_start_all_queues(qdev->ndev); ··· 3426 3346 return -ENOMEM; 3427 3347 } 3428 3348 status = ql_request_irq(qdev); 3429 - if (status) 3430 - goto err_irq; 3431 - return status; 3432 - err_irq: 3433 - ql_free_mem_resources(qdev); 3434 3349 return status; 3435 3350 } 3436 3351 ··· 3489 3414 3490 3415 for (i = 0; i < qdev->tx_ring_count; i++) { 3491 3416 tx_ring = &qdev->tx_ring[i]; 3492 - memset((void *)tx_ring, 0, sizeof(tx_ring)); 3417 + memset((void *)tx_ring, 0, sizeof(*tx_ring)); 3493 3418 tx_ring->qdev = qdev; 3494 3419 tx_ring->wq_id = i; 3495 3420 tx_ring->wq_len = qdev->tx_ring_size; ··· 3505 3430 3506 3431 for (i = 0; i < qdev->rx_ring_count; i++) { 3507 3432 rx_ring = &qdev->rx_ring[i]; 3508 - memset((void *)rx_ring, 0, sizeof(rx_ring)); 3433 + memset((void *)rx_ring, 0, sizeof(*rx_ring)); 3509 3434 rx_ring->qdev = qdev; 3510 3435 rx_ring->cq_id = i; 3511 3436 rx_ring->cpu = i % cpu_cnt; /* CPU to run handler on. */ ··· 3864 3789 int pos, err = 0; 3865 3790 u16 val16; 3866 3791 3867 - memset((void *)qdev, 0, sizeof(qdev)); 3792 + memset((void *)qdev, 0, sizeof(*qdev)); 3868 3793 err = pci_enable_device(pdev); 3869 3794 if (err) { 3870 3795 dev_err(&pdev->dev, "PCI device enable failed.\n"); ··· 4051 3976 pci_disable_device(pdev); 4052 3977 return err; 4053 3978 } 4054 - netif_carrier_off(ndev); 3979 + ql_link_off(qdev); 4055 3980 ql_display_dev_info(ndev); 4056 3981 cards_found++; 4057 3982 return 0;
+3 -3
drivers/net/qlge/qlge_mpi.c
··· 238 238 &qdev->mpi_port_cfg_work, 0); 239 239 } 240 240 241 - netif_carrier_on(qdev->ndev); 241 + ql_link_on(qdev); 242 242 } 243 243 244 244 static void ql_link_down(struct ql_adapter *qdev, struct mbox_params *mbcp) ··· 251 251 if (status) 252 252 QPRINTK(qdev, DRV, ERR, "Link down AEN broken!\n"); 253 253 254 - netif_carrier_off(qdev->ndev); 254 + ql_link_off(qdev); 255 255 } 256 256 257 257 static int ql_sfp_in(struct ql_adapter *qdev, struct mbox_params *mbcp) ··· 849 849 case MB_CMD_PORT_RESET: 850 850 case MB_CMD_SET_PORT_CFG: 851 851 case MB_CMD_STOP_FW: 852 - netif_carrier_off(qdev->ndev); 852 + ql_link_off(qdev); 853 853 /* Signal the resulting link up AEN 854 854 * that the frame routing and mac addr 855 855 * needs to be set.
+3 -3
drivers/net/smsc911x.c
··· 1938 1938 if (!res) 1939 1939 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1940 1940 1941 - release_mem_region(res->start, res->end - res->start); 1941 + release_mem_region(res->start, resource_size(res)); 1942 1942 1943 1943 iounmap(pdata->ioaddr); 1944 1944 ··· 1976 1976 retval = -ENODEV; 1977 1977 goto out_0; 1978 1978 } 1979 - res_size = res->end - res->start + 1; 1979 + res_size = resource_size(res); 1980 1980 1981 1981 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1982 1982 if (!irq_res) { ··· 2104 2104 out_free_netdev_2: 2105 2105 free_netdev(dev); 2106 2106 out_release_io_1: 2107 - release_mem_region(res->start, res->end - res->start); 2107 + release_mem_region(res->start, resource_size(res)); 2108 2108 out_0: 2109 2109 return retval; 2110 2110 }
+12 -8
drivers/net/tun.c
··· 486 486 { 487 487 struct tun_file *tfile = file->private_data; 488 488 struct tun_struct *tun = __tun_get(tfile); 489 - struct sock *sk = tun->sk; 489 + struct sock *sk; 490 490 unsigned int mask = 0; 491 491 492 492 if (!tun) 493 493 return POLLERR; 494 + 495 + sk = tun->sk; 494 496 495 497 DBG(KERN_INFO "%s: tun_chr_poll\n", tun->dev->name); 496 498 ··· 1326 1324 struct tun_file *tfile = file->private_data; 1327 1325 struct tun_struct *tun; 1328 1326 1329 - 1330 - rtnl_lock(); 1331 1327 tun = __tun_get(tfile); 1332 1328 if (tun) { 1333 - DBG(KERN_INFO "%s: tun_chr_close\n", tun->dev->name); 1329 + struct net_device *dev = tun->dev; 1330 + 1331 + DBG(KERN_INFO "%s: tun_chr_close\n", dev->name); 1334 1332 1335 1333 __tun_detach(tun); 1336 1334 1337 1335 /* If desireable, unregister the netdevice. */ 1338 - if (!(tun->flags & TUN_PERSIST)) 1339 - unregister_netdevice(tun->dev); 1340 - 1336 + if (!(tun->flags & TUN_PERSIST)) { 1337 + rtnl_lock(); 1338 + if (dev->reg_state == NETREG_REGISTERED) 1339 + unregister_netdevice(dev); 1340 + rtnl_unlock(); 1341 + } 1341 1342 } 1342 - rtnl_unlock(); 1343 1343 1344 1344 tun = tfile->tun; 1345 1345 if (tun)
+27 -19
drivers/net/wireless/p54/p54common.c
··· 823 823 struct p54_tx_info *range; 824 824 unsigned long flags; 825 825 826 - if (unlikely(!skb || !dev || skb_queue_empty(&priv->tx_queue))) 826 + if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue))) 827 827 return; 828 828 829 - /* There used to be a check here to see if the SKB was on the 830 - * TX queue or not. This can never happen because all SKBs we 831 - * see here successfully went through p54_assign_address() 832 - * which means the SKB is on the ->tx_queue. 829 + /* 830 + * don't try to free an already unlinked skb 833 831 */ 832 + if (unlikely((!skb->next) || (!skb->prev))) 833 + return; 834 834 835 835 spin_lock_irqsave(&priv->tx_queue.lock, flags); 836 836 info = IEEE80211_SKB_CB(skb); 837 837 range = (void *)info->rate_driver_data; 838 - if (!skb_queue_is_first(&priv->tx_queue, skb)) { 838 + if (skb->prev != (struct sk_buff *)&priv->tx_queue) { 839 839 struct ieee80211_tx_info *ni; 840 840 struct p54_tx_info *mr; 841 841 842 - ni = IEEE80211_SKB_CB(skb_queue_prev(&priv->tx_queue, skb)); 842 + ni = IEEE80211_SKB_CB(skb->prev); 843 843 mr = (struct p54_tx_info *)ni->rate_driver_data; 844 844 } 845 - if (!skb_queue_is_last(&priv->tx_queue, skb)) { 845 + if (skb->next != (struct sk_buff *)&priv->tx_queue) { 846 846 struct ieee80211_tx_info *ni; 847 847 struct p54_tx_info *mr; 848 848 849 - ni = IEEE80211_SKB_CB(skb_queue_next(&priv->tx_queue, skb)); 849 + ni = IEEE80211_SKB_CB(skb->next); 850 850 mr = (struct p54_tx_info *)ni->rate_driver_data; 851 851 } 852 852 __skb_unlink(skb, &priv->tx_queue); ··· 864 864 unsigned long flags; 865 865 866 866 spin_lock_irqsave(&priv->tx_queue.lock, flags); 867 - skb_queue_walk(&priv->tx_queue, entry) { 867 + entry = priv->tx_queue.next; 868 + while (entry != (struct sk_buff *)&priv->tx_queue) { 868 869 struct p54_hdr *hdr = (struct p54_hdr *) entry->data; 869 870 870 871 if (hdr->req_id == req_id) { 871 872 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 872 873 return entry; 873 874 } 875 + entry = entry->next; 874 876 } 875 877 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 876 878 return NULL; ··· 890 888 int count, idx; 891 889 892 890 spin_lock_irqsave(&priv->tx_queue.lock, flags); 893 - skb_queue_walk(&priv->tx_queue, entry) { 891 + entry = (struct sk_buff *) priv->tx_queue.next; 892 + while (entry != (struct sk_buff *)&priv->tx_queue) { 894 893 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry); 895 894 struct p54_hdr *entry_hdr; 896 895 struct p54_tx_data *entry_data; 897 896 unsigned int pad = 0, frame_len; 898 897 899 898 range = (void *)info->rate_driver_data; 900 - if (range->start_addr != addr) 899 + if (range->start_addr != addr) { 900 + entry = entry->next; 901 901 continue; 902 + } 902 903 903 - if (!skb_queue_is_last(&priv->tx_queue, entry)) { 904 + if (entry->next != (struct sk_buff *)&priv->tx_queue) { 904 905 struct ieee80211_tx_info *ni; 905 906 struct p54_tx_info *mr; 906 907 907 - ni = IEEE80211_SKB_CB(skb_queue_next(&priv->tx_queue, 908 - entry)); 908 + ni = IEEE80211_SKB_CB(entry->next); 909 909 mr = (struct p54_tx_info *)ni->rate_driver_data; 910 910 } 911 911 ··· 1168 1164 } 1169 1165 } 1170 1166 1171 - skb_queue_walk(&priv->tx_queue, entry) { 1167 + entry = priv->tx_queue.next; 1168 + while (left--) { 1172 1169 u32 hole_size; 1173 1170 info = IEEE80211_SKB_CB(entry); 1174 1171 range = (void *)info->rate_driver_data; 1175 1172 hole_size = range->start_addr - last_addr; 1176 1173 if (!target_skb && hole_size >= len) { 1177 - target_skb = skb_queue_prev(&priv->tx_queue, entry); 1174 + target_skb = entry->prev; 1178 1175 hole_size -= len; 1179 1176 target_addr = last_addr; 1180 1177 } 1181 1178 largest_hole = max(largest_hole, hole_size); 1182 1179 last_addr = range->end_addr; 1180 + entry = entry->next; 1183 1181 } 1184 1182 if (!target_skb && priv->rx_end - last_addr >= len) { 1185 - target_skb = skb_peek_tail(&priv->tx_queue); 1183 + target_skb = priv->tx_queue.prev; 1186 1184 largest_hole = max(largest_hole, priv->rx_end - last_addr - len); 1187 1185 if (!skb_queue_empty(&priv->tx_queue)) { 1188 1186 info = IEEE80211_SKB_CB(target_skb); ··· 2090 2084 static void p54_stop(struct ieee80211_hw *dev) 2091 2085 { 2092 2086 struct p54_common *priv = dev->priv; 2087 + struct sk_buff *skb; 2093 2088 2094 2089 mutex_lock(&priv->conf_mutex); 2095 2090 priv->mode = NL80211_IFTYPE_UNSPECIFIED; ··· 2105 2098 p54_tx_cancel(dev, priv->cached_beacon); 2106 2099 2107 2100 priv->stop(dev); 2108 - skb_queue_purge(&priv->tx_queue); 2101 + while ((skb = skb_dequeue(&priv->tx_queue))) 2102 + kfree_skb(skb); 2109 2103 priv->cached_beacon = NULL; 2110 2104 priv->tsf_high32 = priv->tsf_low32 = 0; 2111 2105 mutex_unlock(&priv->conf_mutex);
+1
include/linux/if_ether.h
··· 78 78 #define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ 79 79 #define ETH_P_AOE 0x88A2 /* ATA over Ethernet */ 80 80 #define ETH_P_TIPC 0x88CA /* TIPC */ 81 + #define ETH_P_1588 0x88F7 /* IEEE 1588 Timesync */ 81 82 #define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */ 82 83 #define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */ 83 84 #define ETH_P_EDSA 0xDADA /* Ethertype DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
+8 -6
net/9p/trans_fd.c
··· 735 735 if (!*p) 736 736 continue; 737 737 token = match_token(p, tokens, args); 738 - r = match_int(&args[0], &option); 739 - if (r < 0) { 740 - P9_DPRINTK(P9_DEBUG_ERROR, 741 - "integer field, but no integer?\n"); 742 - ret = r; 743 - continue; 738 + if (token != Opt_err) { 739 + r = match_int(&args[0], &option); 740 + if (r < 0) { 741 + P9_DPRINTK(P9_DEBUG_ERROR, 742 + "integer field, but no integer?\n"); 743 + ret = r; 744 + continue; 745 + } 744 746 } 745 747 switch (token) { 746 748 case Opt_port:
+1 -1
net/dsa/mv88e6xxx.c
··· 418 418 int i; 419 419 420 420 for (i = 0; i < 10; i++) { 421 - ret = REG_READ(REG_GLOBAL2, 0x1d); 421 + ret = REG_READ(REG_GLOBAL, 0x1d); 422 422 if ((ret & 0x8000) == 0) 423 423 return 0; 424 424 }
+2 -1
net/ipv4/xfrm4_policy.c
··· 136 136 case IPPROTO_TCP: 137 137 case IPPROTO_SCTP: 138 138 case IPPROTO_DCCP: 139 - if (pskb_may_pull(skb, xprth + 4 - skb->data)) { 139 + if (xprth + 4 < skb->data || 140 + pskb_may_pull(skb, xprth + 4 - skb->data)) { 140 141 __be16 *ports = (__be16 *)xprth; 141 142 142 143 fl->fl_ip_sport = ports[!!reverse];
+27 -3
net/ipv6/addrconf.c
··· 1916 1916 update_lft = 1; 1917 1917 else if (stored_lft <= MIN_VALID_LIFETIME) { 1918 1918 /* valid_lft <= stored_lft is always true */ 1919 - /* XXX: IPsec */ 1920 - update_lft = 0; 1919 + /* 1920 + * RFC 4862 Section 5.5.3e: 1921 + * "Note that the preferred lifetime of 1922 + * the corresponding address is always 1923 + * reset to the Preferred Lifetime in 1924 + * the received Prefix Information 1925 + * option, regardless of whether the 1926 + * valid lifetime is also reset or 1927 + * ignored." 1928 + * 1929 + * So if the preferred lifetime in 1930 + * this advertisement is different 1931 + * than what we have stored, but the 1932 + * valid lifetime is invalid, just 1933 + * reset prefered_lft. 1934 + * 1935 + * We must set the valid lifetime 1936 + * to the stored lifetime since we'll 1937 + * be updating the timestamp below, 1938 + * else we'll set it back to the 1939 + * minumum. 1940 + */ 1941 + if (prefered_lft != ifp->prefered_lft) { 1942 + valid_lft = stored_lft; 1943 + update_lft = 1; 1944 + } 1921 1945 } else { 1922 1946 valid_lft = MIN_VALID_LIFETIME; 1923 1947 if (valid_lft < prefered_lft) ··· 3109 3085 spin_unlock(&ifp->lock); 3110 3086 continue; 3111 3087 } else if (age >= ifp->prefered_lft) { 3112 - /* jiffies - ifp->tsamp > age >= ifp->prefered_lft */ 3088 + /* jiffies - ifp->tstamp > age >= ifp->prefered_lft */ 3113 3089 int deprecate = 0; 3114 3090 3115 3091 if (!(ifp->flags&IFA_F_DEPRECATED)) {
+4 -2
net/ipv6/xfrm6_policy.c
··· 157 157 ipv6_addr_copy(&fl->fl6_dst, reverse ? &hdr->saddr : &hdr->daddr); 158 158 ipv6_addr_copy(&fl->fl6_src, reverse ? &hdr->daddr : &hdr->saddr); 159 159 160 - while (pskb_may_pull(skb, nh + offset + 1 - skb->data)) { 160 + while (nh + offset + 1 < skb->data || 161 + pskb_may_pull(skb, nh + offset + 1 - skb->data)) { 161 162 nh = skb_network_header(skb); 162 163 exthdr = (struct ipv6_opt_hdr *)(nh + offset); 163 164 ··· 178 177 case IPPROTO_TCP: 179 178 case IPPROTO_SCTP: 180 179 case IPPROTO_DCCP: 181 - if (!onlyproto && pskb_may_pull(skb, nh + offset + 4 - skb->data)) { 180 + if (!onlyproto && (nh + offset + 4 < skb->data || 181 + pskb_may_pull(skb, nh + offset + 4 - skb->data))) { 182 182 __be16 *ports = (__be16 *)exthdr; 183 183 184 184 fl->fl_ip_sport = ports[!!reverse];
+2 -23
net/sctp/socket.c
··· 6652 6652 finish_wait(sk->sk_sleep, &wait); 6653 6653 } 6654 6654 6655 - static void sctp_sock_rfree_frag(struct sk_buff *skb) 6656 - { 6657 - struct sk_buff *frag; 6658 - 6659 - if (!skb->data_len) 6660 - goto done; 6661 - 6662 - /* Don't forget the fragments. */ 6663 - skb_walk_frags(skb, frag) 6664 - sctp_sock_rfree_frag(frag); 6665 - 6666 - done: 6667 - sctp_sock_rfree(skb); 6668 - } 6669 - 6670 6655 static void sctp_skb_set_owner_r_frag(struct sk_buff *skb, struct sock *sk) 6671 6656 { 6672 6657 struct sk_buff *frag; ··· 6761 6776 sctp_skb_for_each(skb, &oldsk->sk_receive_queue, tmp) { 6762 6777 event = sctp_skb2event(skb); 6763 6778 if (event->asoc == assoc) { 6764 - sctp_sock_rfree_frag(skb); 6765 6779 __skb_unlink(skb, &oldsk->sk_receive_queue); 6766 6780 __skb_queue_tail(&newsk->sk_receive_queue, skb); 6767 6781 sctp_skb_set_owner_r_frag(skb, newsk); ··· 6791 6807 sctp_skb_for_each(skb, &oldsp->pd_lobby, tmp) { 6792 6808 event = sctp_skb2event(skb); 6793 6809 if (event->asoc == assoc) { 6794 - sctp_sock_rfree_frag(skb); 6795 6810 __skb_unlink(skb, &oldsp->pd_lobby); 6796 6811 __skb_queue_tail(queue, skb); 6797 6812 sctp_skb_set_owner_r_frag(skb, newsk); ··· 6805 6822 6806 6823 } 6807 6824 6808 - sctp_skb_for_each(skb, &assoc->ulpq.reasm, tmp) { 6809 - sctp_sock_rfree_frag(skb); 6825 + sctp_skb_for_each(skb, &assoc->ulpq.reasm, tmp) 6810 6826 sctp_skb_set_owner_r_frag(skb, newsk); 6811 - } 6812 6827 6813 - sctp_skb_for_each(skb, &assoc->ulpq.lobby, tmp) { 6814 - sctp_sock_rfree_frag(skb); 6828 + sctp_skb_for_each(skb, &assoc->ulpq.lobby, tmp) 6815 6829 sctp_skb_set_owner_r_frag(skb, newsk); 6816 - } 6817 6830 6818 6831 /* Set the type of socket to indicate that it is peeled off from the 6819 6832 * original UDP-style socket or created with the accept() call on a