Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'zynq-soc-for-3.20' of https://github.com/Xilinx/linux-xlnx into next/soc

Merge "Zynq SoC changes for 3.20" from Michal Simek:

arm: Xilinx Zynq SoC patches for v3.20

- Enable pincontrol
- Simplified SLCR initialization
- Setup default ARCH_NR_GPIO

* tag 'zynq-soc-for-3.20' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: Simplify SLCR initialization
ARM: zynq: PM: Fixed simple typo.
ARM: zynq: Setup default gpio number for Xilinx Zynq
ARM: zynq: Enable pinctrl

Signed-off-by: Olof Johansson <olof@lixom.net>

+11 -32
+1 -1
arch/arm/Kconfig
··· 1490 1490 # selected platforms. 1491 1491 config ARCH_NR_GPIO 1492 1492 int 1493 - default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 1493 + default 1024 if ARCH_SHMOBILE || ARCH_TEGRA || ARCH_ZYNQ 1494 1494 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \ 1495 1495 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 1496 1496 default 416 if ARCH_SUNXI
+2
arch/arm/mach-zynq/Kconfig
··· 9 9 select HAVE_ARM_TWD if SMP 10 10 select ICST 11 11 select MFD_SYSCON 12 + select PINCTRL 13 + select PINCTRL_ZYNQ 12 14 select SOC_BUS 13 15 help 14 16 Support for Xilinx Zynq ARM Cortex A9 Platform
-2
arch/arm/mach-zynq/common.c
··· 146 146 147 147 platform_device_register(&zynq_cpuidle_device); 148 148 platform_device_register_full(&devinfo); 149 - 150 - zynq_slcr_init(); 151 149 } 152 150 153 151 static void __init zynq_timer_init(void)
+1 -1
arch/arm/mach-zynq/pm.c
··· 61 61 /** 62 62 * zynq_pm_late_init() - Power management init 63 63 * 64 - * Initialization of power management related featurs and infrastructure. 64 + * Initialization of power management related features and infrastructure. 65 65 */ 66 66 void __init zynq_pm_late_init(void) 67 67 {
+7 -28
arch/arm/mach-zynq/slcr.c
··· 47 47 */ 48 48 static int zynq_slcr_write(u32 val, u32 offset) 49 49 { 50 - if (!zynq_slcr_regmap) { 51 - writel(val, zynq_slcr_base + offset); 52 - return 0; 53 - } 54 - 55 50 return regmap_write(zynq_slcr_regmap, offset, val); 56 51 } 57 52 ··· 60 65 */ 61 66 static int zynq_slcr_read(u32 *val, u32 offset) 62 67 { 63 - if (zynq_slcr_regmap) 64 - return regmap_read(zynq_slcr_regmap, offset, val); 65 - 66 - *val = readl(zynq_slcr_base + offset); 67 - 68 - return 0; 68 + return regmap_read(zynq_slcr_regmap, offset, val); 69 69 } 70 70 71 71 /** ··· 186 196 } 187 197 188 198 /** 189 - * zynq_slcr_init - Regular slcr driver init 190 - * Return: 0 on success, negative errno otherwise. 191 - * 192 - * Called early during boot from platform code to remap SLCR area. 193 - */ 194 - int __init zynq_slcr_init(void) 195 - { 196 - zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr"); 197 - if (IS_ERR(zynq_slcr_regmap)) { 198 - pr_err("%s: failed to find zynq-slcr\n", __func__); 199 - return -ENODEV; 200 - } 201 - 202 - return 0; 203 - } 204 - 205 - /** 206 199 * zynq_early_slcr_init - Early slcr init function 207 200 * 208 201 * Return: 0 on success, negative errno otherwise. ··· 209 236 } 210 237 211 238 np->data = (__force void *)zynq_slcr_base; 239 + 240 + zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr"); 241 + if (IS_ERR(zynq_slcr_regmap)) { 242 + pr_err("%s: failed to find zynq-slcr\n", __func__); 243 + return -ENODEV; 244 + } 212 245 213 246 /* unlock the SLCR so that registers can be changed */ 214 247 zynq_slcr_unlock();