Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'at91-dt-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

AT91 DT for 6.5 #2

It contains:
- generic names for shutdown controller nodes
- enablement of DT overlay support for some AT91 boards
- fix reset and SPI CS for lan966x-kontron-kswitch-d10-mmt based boards
- addition of PHY interrupts for lan966x-kontron-kswitch-d10-mmt-8g
board

* tag 'at91-dt-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
ARM: dts: at91: use generic name for shutdown controller

Link: https://lore.kernel.org/r/20230621093853.1575312-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+50 -21
+1 -1
arch/arm/boot/dts/at91-qil_a9260.dts
··· 108 108 status = "okay"; 109 109 }; 110 110 111 - shdwc@fffffd10 { 111 + shdwc: poweroff@fffffd10 { 112 112 atmel,wakeup-counter = <10>; 113 113 atmel,wakeup-rtt-timer; 114 114 };
+1 -1
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
··· 139 139 }; 140 140 }; 141 141 142 - shdwc@f8048010 { 142 + poweroff@f8048010 { 143 143 debounce-delay-us = <976>; 144 144 atmel,wakeup-rtc-timer; 145 145
+1 -1
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
··· 204 204 }; 205 205 }; 206 206 207 - shdwc@f8048010 { 207 + poweroff@f8048010 { 208 208 debounce-delay-us = <976>; 209 209 210 210 input@0 {
+1 -1
arch/arm/boot/dts/at91-sama5d2_xplained.dts
··· 348 348 }; 349 349 }; 350 350 351 - shdwc@f8048010 { 351 + poweroff@f8048010 { 352 352 debounce-delay-us = <976>; 353 353 atmel,wakeup-rtc-timer; 354 354
+1 -1
arch/arm/boot/dts/at91sam9260.dtsi
··· 130 130 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; 131 131 }; 132 132 133 - shdwc@fffffd10 { 133 + shdwc: poweroff@fffffd10 { 134 134 compatible = "atmel,at91sam9260-shdwc"; 135 135 reg = <0xfffffd10 0x10>; 136 136 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
+1 -1
arch/arm/boot/dts/at91sam9260ek.dts
··· 112 112 }; 113 113 }; 114 114 115 - shdwc@fffffd10 { 115 + shdwc: poweroff@fffffd10 { 116 116 atmel,wakeup-counter = <10>; 117 117 atmel,wakeup-rtt-timer; 118 118 };
+1 -1
arch/arm/boot/dts/at91sam9261.dtsi
··· 614 614 clocks = <&slow_xtal>; 615 615 }; 616 616 617 - shdwc@fffffd10 { 617 + poweroff@fffffd10 { 618 618 compatible = "atmel,at91sam9260-shdwc"; 619 619 reg = <0xfffffd10 0x10>; 620 620 clocks = <&slow_xtal>;
+1 -1
arch/arm/boot/dts/at91sam9263.dtsi
··· 158 158 clocks = <&slow_xtal>; 159 159 }; 160 160 161 - shdwc@fffffd10 { 161 + poweroff@fffffd10 { 162 162 compatible = "atmel,at91sam9260-shdwc"; 163 163 reg = <0xfffffd10 0x10>; 164 164 clocks = <&slow_xtal>;
+1 -1
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
··· 126 126 }; 127 127 }; 128 128 129 - shdwc@fffffd10 { 129 + shdwc: poweroff@fffffd10 { 130 130 atmel,wakeup-counter = <10>; 131 131 atmel,wakeup-rtt-timer; 132 132 };
+1 -1
arch/arm/boot/dts/at91sam9g45.dtsi
··· 152 152 }; 153 153 154 154 155 - shdwc@fffffd10 { 155 + poweroff@fffffd10 { 156 156 compatible = "atmel,at91sam9rl-shdwc"; 157 157 reg = <0xfffffd10 0x10>; 158 158 clocks = <&clk32k>;
+1 -1
arch/arm/boot/dts/at91sam9n12.dtsi
··· 140 140 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 141 141 }; 142 142 143 - shdwc@fffffe10 { 143 + poweroff@fffffe10 { 144 144 compatible = "atmel,at91sam9x5-shdwc"; 145 145 reg = <0xfffffe10 0x10>; 146 146 clocks = <&clk32k>;
+1 -1
arch/arm/boot/dts/at91sam9rl.dtsi
··· 778 778 clocks = <&clk32k>; 779 779 }; 780 780 781 - shdwc@fffffd10 { 781 + poweroff@fffffd10 { 782 782 compatible = "atmel,at91sam9260-shdwc"; 783 783 reg = <0xfffffd10 0x10>; 784 784 clocks = <&clk32k>;
+1 -1
arch/arm/boot/dts/at91sam9x5.dtsi
··· 141 141 clocks = <&clk32k>; 142 142 }; 143 143 144 - shutdown_controller: shdwc@fffffe10 { 144 + shutdown_controller: poweroff@fffffe10 { 145 145 compatible = "atmel,at91sam9x5-shdwc"; 146 146 reg = <0xfffffe10 0x10>; 147 147 clocks = <&clk32k>;
+2
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts
··· 15 15 &mdio0 { 16 16 phy2: ethernet-phy@3 { 17 17 reg = <3>; 18 + interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 18 19 }; 19 20 20 21 phy3: ethernet-phy@4 { 21 22 reg = <4>; 23 + interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 22 24 }; 23 25 }; 24 26
+28 -1
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
··· 18 18 19 19 gpio-restart { 20 20 compatible = "gpio-restart"; 21 + pinctrl-0 = <&reset_pins>; 22 + pinctrl-names = "default"; 21 23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 22 24 priority = <200>; 23 25 }; ··· 41 39 status = "okay"; 42 40 43 41 spi3: spi@400 { 44 - pinctrl-0 = <&fc3_b_pins>; 42 + pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>; 45 43 pinctrl-names = "default"; 46 44 status = "okay"; 47 45 cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ··· 49 47 }; 50 48 51 49 &gpio { 50 + pinctrl-0 = <&phy_int_pins>; 51 + pinctrl-names = "default"; 52 + 52 53 fc3_b_pins: fc3-b-pins { 53 54 /* SCK, MISO, MOSI */ 54 55 pins = "GPIO_51", "GPIO_52", "GPIO_53"; ··· 64 59 function = "miim_c"; 65 60 }; 66 61 62 + phy_int_pins: phy-int-pins { 63 + /* PHY_INT# */ 64 + pins = "GPIO_24"; 65 + function = "gpio"; 66 + }; 67 + 68 + reset_pins: reset-pins { 69 + /* SYS_RST# */ 70 + pins = "GPIO_56"; 71 + function = "gpio"; 72 + }; 73 + 67 74 sgpio_a_pins: sgpio-a-pins { 68 75 /* SCK, D0, D1 */ 69 76 pins = "GPIO_32", "GPIO_33", "GPIO_34"; ··· 86 69 /* LD */ 87 70 pins = "GPIO_64"; 88 71 function = "sgpio_b"; 72 + }; 73 + 74 + spi3_cs_pins: spi3-cs-pins { 75 + /* CS# */ 76 + pins = "GPIO_46"; 77 + function = "gpio"; 89 78 }; 90 79 91 80 usart0_pins: usart0-pins { ··· 116 93 117 94 phy4: ethernet-phy@5 { 118 95 reg = <5>; 96 + interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 119 97 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 120 98 }; 121 99 122 100 phy5: ethernet-phy@6 { 123 101 reg = <6>; 102 + interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 124 103 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 125 104 }; 126 105 127 106 phy6: ethernet-phy@7 { 128 107 reg = <7>; 108 + interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 129 109 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 130 110 }; 131 111 132 112 phy7: ethernet-phy@8 { 133 113 reg = <8>; 114 + interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 134 115 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 135 116 }; 136 117 };
+1 -1
arch/arm/boot/dts/sam9x60.dtsi
··· 1297 1297 clocks = <&clk32k 0>; 1298 1298 }; 1299 1299 1300 - shutdown_controller: shdwc@fffffe10 { 1300 + shutdown_controller: poweroff@fffffe10 { 1301 1301 compatible = "microchip,sam9x60-shdwc"; 1302 1302 reg = <0xfffffe10 0x10>; 1303 1303 clocks = <&clk32k 0>;
+1 -1
arch/arm/boot/dts/sama5d2.dtsi
··· 680 680 clocks = <&clk32k>; 681 681 }; 682 682 683 - shutdown_controller: shdwc@f8048010 { 683 + shutdown_controller: poweroff@f8048010 { 684 684 compatible = "atmel,sama5d2-shdwc"; 685 685 reg = <0xf8048010 0x10>; 686 686 clocks = <&clk32k>;
+1 -1
arch/arm/boot/dts/sama5d3.dtsi
··· 1016 1016 clocks = <&clk32k>; 1017 1017 }; 1018 1018 1019 - shutdown_controller: shutdown-controller@fffffe10 { 1019 + shutdown_controller: poweroff@fffffe10 { 1020 1020 compatible = "atmel,at91sam9x5-shdwc"; 1021 1021 reg = <0xfffffe10 0x10>; 1022 1022 clocks = <&clk32k>;
+1 -1
arch/arm/boot/dts/sama5d4.dtsi
··· 740 740 clocks = <&clk32k>; 741 741 }; 742 742 743 - shutdown_controller: shdwc@fc068610 { 743 + shutdown_controller: poweroff@fc068610 { 744 744 compatible = "atmel,at91sam9x5-shdwc"; 745 745 reg = <0xfc068610 0x10>; 746 746 clocks = <&clk32k>;
+1 -1
arch/arm/boot/dts/sama7g5.dtsi
··· 257 257 clocks = <&clk32k 0>; 258 258 }; 259 259 260 - shdwc: shdwc@e001d010 { 260 + shdwc: poweroff@e001d010 { 261 261 compatible = "microchip,sama7g5-shdwc", "syscon"; 262 262 reg = <0xe001d010 0x10>; 263 263 clocks = <&clk32k 0>;
+1 -1
arch/arm/boot/dts/usb_a9260.dts
··· 22 22 23 23 ahb { 24 24 apb { 25 - shdwc@fffffd10 { 25 + shdwc: poweroff@fffffd10 { 26 26 atmel,wakeup-counter = <10>; 27 27 atmel,wakeup-rtt-timer; 28 28 };
+1 -1
arch/arm/boot/dts/usb_a9263.dts
··· 67 67 }; 68 68 }; 69 69 70 - shdwc@fffffd10 { 70 + poweroff@fffffd10 { 71 71 atmel,wakeup-counter = <10>; 72 72 atmel,wakeup-rtt-timer; 73 73 };