Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ACPI / PMIC: Add byt prefix to Crystal Cove PMIC OpRegion driver

Our current Crystal Cove OpRegion driver is only valid for the
Crystal Cove PMIC variant found on Bay Trail (BYT) boards,
Cherry Trail (CHT) based boards use another variant.

At least the regulator registers are different on CHT and these registers
are one of the things controlled by the custom PMIC OpRegion.

Commit 4d9ed62ab142 ("mfd: intel_soc_pmic: Export separate mfd-cell
configs for BYT and CHT") has disabled the intel_pmic_crc.c code for CHT
devices by removing the "crystal_cove_pmic" MFD cell on CHT devices.

This commit renames the intel_pmic_crc.c driver and the cell to be
prefixed with "byt" to indicate that this code is for BYT devices only.

This is a preparation patch for adding a separate PMIC OpRegion
driver for the CHT variant of the Crystal Cove PMIC (sometimes called
Crystal Cove Plus in Android kernel sources).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

authored by

Hans de Goede and committed by
Rafael J. Wysocki
ed852cde a0fcfed1

+8 -7
+4 -3
drivers/acpi/Kconfig
··· 513 513 PMIC chip. 514 514 515 515 if PMIC_OPREGION 516 - config CRC_PMIC_OPREGION 517 - bool "ACPI operation region support for CrystalCove PMIC" 516 + config BYTCRC_PMIC_OPREGION 517 + bool "ACPI operation region support for Bay Trail Crystal Cove PMIC" 518 518 depends on INTEL_SOC_PMIC 519 519 help 520 - This config adds ACPI operation region support for CrystalCove PMIC. 520 + This config adds ACPI operation region support for the Bay Trail 521 + version of the Crystal Cove PMIC. 521 522 522 523 config XPOWER_PMIC_OPREGION 523 524 bool "ACPI operation region support for XPower AXP288 PMIC"
+1 -1
drivers/acpi/Makefile
··· 109 109 obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o 110 110 111 111 obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o 112 - obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o 112 + obj-$(CONFIG_BYTCRC_PMIC_OPREGION) += pmic/intel_pmic_bytcrc.o 113 113 obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o 114 114 obj-$(CONFIG_BXT_WC_PMIC_OPREGION) += pmic/intel_pmic_bxtwc.o 115 115 obj-$(CONFIG_CHT_WC_PMIC_OPREGION) += pmic/intel_pmic_chtwc.o
+2 -2
drivers/acpi/pmic/intel_pmic_crc.c drivers/acpi/pmic/intel_pmic_bytcrc.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* 3 - * Intel CrystalCove PMIC operation region driver 3 + * Intel Bay Trail Crystal Cove PMIC operation region driver 4 4 * 5 5 * Copyright (C) 2014 Intel Corporation. All rights reserved. 6 6 */ ··· 295 295 static struct platform_driver intel_crc_pmic_opregion_driver = { 296 296 .probe = intel_crc_pmic_opregion_probe, 297 297 .driver = { 298 - .name = "crystal_cove_pmic", 298 + .name = "byt_crystal_cove_pmic", 299 299 }, 300 300 }; 301 301 builtin_platform_driver(intel_crc_pmic_opregion_driver);
+1 -1
drivers/mfd/intel_soc_pmic_crc.c
··· 75 75 .resources = gpio_resources, 76 76 }, 77 77 { 78 - .name = "crystal_cove_pmic", 78 + .name = "byt_crystal_cove_pmic", 79 79 }, 80 80 { 81 81 .name = "crystal_cove_pwm",