Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: add binding for the Allwinner DE2 CCU

Allwinner "Display Engine 2.0" contains some clock controls in it.

In order to add them as clock drivers, we need a device tree binding.
Add the binding here.

Also add the device tree binding headers.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

authored by

Icenowy Zheng and committed by
Maxime Ripard
ed74f8a8 d85da227

+63
+31
Documentation/devicetree/bindings/clock/sun8i-de2.txt
··· 1 + Allwinner Display Engine 2.0 Clock Control Binding 2 + -------------------------------------------------- 3 + 4 + Required properties : 5 + - compatible: must contain one of the following compatibles: 6 + - "allwinner,sun8i-a83t-de2-clk" 7 + - "allwinner,sun8i-v3s-de2-clk" 8 + - "allwinner,sun50i-h5-de2-clk" 9 + 10 + - reg: Must contain the registers base address and length 11 + - clocks: phandle to the clocks feeding the display engine subsystem. 12 + Three are needed: 13 + - "mod": the display engine module clock 14 + - "bus": the bus clock for the whole display engine subsystem 15 + - clock-names: Must contain the clock names described just above 16 + - resets: phandle to the reset control for the display engine subsystem. 17 + - #clock-cells : must contain 1 18 + - #reset-cells : must contain 1 19 + 20 + Example: 21 + de2_clocks: clock@1000000 { 22 + compatible = "allwinner,sun8i-a83t-de2-clk"; 23 + reg = <0x01000000 0x100000>; 24 + clocks = <&ccu CLK_BUS_DE>, 25 + <&ccu CLK_DE>; 26 + clock-names = "bus", 27 + "mod"; 28 + resets = <&ccu RST_BUS_DE>; 29 + #clock-cells = <1>; 30 + #reset-cells = <1>; 31 + };
+18
include/dt-bindings/clock/sun8i-de2.h
··· 1 + /* 2 + * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.io> 3 + * 4 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 + */ 6 + 7 + #ifndef _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ 8 + #define _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ 9 + 10 + #define CLK_BUS_MIXER0 0 11 + #define CLK_BUS_MIXER1 1 12 + #define CLK_BUS_WB 2 13 + 14 + #define CLK_MIXER0 6 15 + #define CLK_MIXER1 7 16 + #define CLK_WB 8 17 + 18 + #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */
+14
include/dt-bindings/reset/sun8i-de2.h
··· 1 + /* 2 + * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.io> 3 + * 4 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 + */ 6 + 7 + #ifndef _DT_BINDINGS_RESET_SUN8I_DE2_H_ 8 + #define _DT_BINDINGS_RESET_SUN8I_DE2_H_ 9 + 10 + #define RST_MIXER0 0 11 + #define RST_MIXER1 1 12 + #define RST_WB 2 13 + 14 + #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */