tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

Merge tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.3

1. Fixes for minor warnings.
2. Enable ADC on Exynos5410 Odroid XU board.

* tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add ADC node to Exynos5410 and Odroid XU
ARM: dts: exynos: Raise maximum buck regulator voltages on Arndale Octa
ARM: dts: exynos: Move CPU OPP tables out of SoC node on Exynos5420

Signed-off-by: Olof Johansson <olof@lixom.net>

Olof Johansson ecf89023 f8269581

+145 -129
+5
arch/arm/boot/dts/exynos5410-odroidxu.dts
··· 85 85 }; 86 86 }; 87 87 88 + &adc { 89 + vdd-supply = <&ldo10_reg>; 90 + status = "okay"; 91 + }; 92 + 88 93 &audi2s0 { 89 94 status = "okay"; 90 95 };
+6
arch/arm/boot/dts/exynos5410.dtsi
··· 260 260 }; 261 261 }; 262 262 263 + &adc { 264 + clocks = <&clock CLK_TSADC>; 265 + clock-names = "adc"; 266 + samsung,syscon-phandle = <&pmu_system_controller>; 267 + }; 268 + 263 269 &arm_a15_pmu { 264 270 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 265 271 status = "okay";
+7 -7
arch/arm/boot/dts/exynos5420-arndale-octa.dts
··· 615 615 buck1_reg: BUCK1 { 616 616 regulator-name = "PVDD_MIF_1V1"; 617 617 regulator-min-microvolt = <800000>; 618 - regulator-max-microvolt = <1100000>; 618 + regulator-max-microvolt = <1300000>; 619 619 regulator-always-on; 620 620 }; 621 621 622 622 buck2_reg: BUCK2 { 623 623 regulator-name = "vdd_arm"; 624 624 regulator-min-microvolt = <800000>; 625 - regulator-max-microvolt = <1000000>; 625 + regulator-max-microvolt = <1500000>; 626 626 regulator-always-on; 627 627 }; 628 628 629 629 buck3_reg: BUCK3 { 630 630 regulator-name = "PVDD_INT_1V0"; 631 631 regulator-min-microvolt = <800000>; 632 - regulator-max-microvolt = <1000000>; 632 + regulator-max-microvolt = <1400000>; 633 633 regulator-always-on; 634 634 }; 635 635 636 636 buck4_reg: BUCK4 { 637 637 regulator-name = "PVDD_G3D_1V0"; 638 638 regulator-min-microvolt = <800000>; 639 - regulator-max-microvolt = <1000000>; 639 + regulator-max-microvolt = <1400000>; 640 640 }; 641 641 642 642 buck5_reg: BUCK5 { 643 643 regulator-name = "PVDD_LPDDR3_1V2"; 644 644 regulator-min-microvolt = <800000>; 645 - regulator-max-microvolt = <1200000>; 645 + regulator-max-microvolt = <1400000>; 646 646 regulator-always-on; 647 647 }; 648 648 649 649 buck6_reg: BUCK6 { 650 650 regulator-name = "PVDD_KFC_1V0"; 651 651 regulator-min-microvolt = <800000>; 652 - regulator-max-microvolt = <1000000>; 652 + regulator-max-microvolt = <1500000>; 653 653 regulator-always-on; 654 654 }; 655 655 656 656 buck7_reg: BUCK7 { 657 657 regulator-name = "VIN_LLDO_1V4"; 658 658 regulator-min-microvolt = <800000>; 659 - regulator-max-microvolt = <1400000>; 659 + regulator-max-microvolt = <1500000>; 660 660 regulator-always-on; 661 661 }; 662 662
+118 -122
arch/arm/boot/dts/exynos5420.dtsi
··· 42 42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi. 43 43 */ 44 44 45 + cluster_a15_opp_table: opp_table0 { 46 + compatible = "operating-points-v2"; 47 + opp-shared; 48 + 49 + opp-1800000000 { 50 + opp-hz = /bits/ 64 <1800000000>; 51 + opp-microvolt = <1250000>; 52 + clock-latency-ns = <140000>; 53 + }; 54 + opp-1700000000 { 55 + opp-hz = /bits/ 64 <1700000000>; 56 + opp-microvolt = <1212500>; 57 + clock-latency-ns = <140000>; 58 + }; 59 + opp-1600000000 { 60 + opp-hz = /bits/ 64 <1600000000>; 61 + opp-microvolt = <1175000>; 62 + clock-latency-ns = <140000>; 63 + }; 64 + opp-1500000000 { 65 + opp-hz = /bits/ 64 <1500000000>; 66 + opp-microvolt = <1137500>; 67 + clock-latency-ns = <140000>; 68 + }; 69 + opp-1400000000 { 70 + opp-hz = /bits/ 64 <1400000000>; 71 + opp-microvolt = <1112500>; 72 + clock-latency-ns = <140000>; 73 + }; 74 + opp-1300000000 { 75 + opp-hz = /bits/ 64 <1300000000>; 76 + opp-microvolt = <1062500>; 77 + clock-latency-ns = <140000>; 78 + }; 79 + opp-1200000000 { 80 + opp-hz = /bits/ 64 <1200000000>; 81 + opp-microvolt = <1037500>; 82 + clock-latency-ns = <140000>; 83 + }; 84 + opp-1100000000 { 85 + opp-hz = /bits/ 64 <1100000000>; 86 + opp-microvolt = <1012500>; 87 + clock-latency-ns = <140000>; 88 + }; 89 + opp-1000000000 { 90 + opp-hz = /bits/ 64 <1000000000>; 91 + opp-microvolt = < 987500>; 92 + clock-latency-ns = <140000>; 93 + }; 94 + opp-900000000 { 95 + opp-hz = /bits/ 64 <900000000>; 96 + opp-microvolt = < 962500>; 97 + clock-latency-ns = <140000>; 98 + }; 99 + opp-800000000 { 100 + opp-hz = /bits/ 64 <800000000>; 101 + opp-microvolt = < 937500>; 102 + clock-latency-ns = <140000>; 103 + }; 104 + opp-700000000 { 105 + opp-hz = /bits/ 64 <700000000>; 106 + opp-microvolt = < 912500>; 107 + clock-latency-ns = <140000>; 108 + }; 109 + }; 110 + 111 + cluster_a7_opp_table: opp_table1 { 112 + compatible = "operating-points-v2"; 113 + opp-shared; 114 + 115 + opp-1300000000 { 116 + opp-hz = /bits/ 64 <1300000000>; 117 + opp-microvolt = <1275000>; 118 + clock-latency-ns = <140000>; 119 + }; 120 + opp-1200000000 { 121 + opp-hz = /bits/ 64 <1200000000>; 122 + opp-microvolt = <1212500>; 123 + clock-latency-ns = <140000>; 124 + }; 125 + opp-1100000000 { 126 + opp-hz = /bits/ 64 <1100000000>; 127 + opp-microvolt = <1162500>; 128 + clock-latency-ns = <140000>; 129 + }; 130 + opp-1000000000 { 131 + opp-hz = /bits/ 64 <1000000000>; 132 + opp-microvolt = <1112500>; 133 + clock-latency-ns = <140000>; 134 + }; 135 + opp-900000000 { 136 + opp-hz = /bits/ 64 <900000000>; 137 + opp-microvolt = <1062500>; 138 + clock-latency-ns = <140000>; 139 + }; 140 + opp-800000000 { 141 + opp-hz = /bits/ 64 <800000000>; 142 + opp-microvolt = <1025000>; 143 + clock-latency-ns = <140000>; 144 + }; 145 + opp-700000000 { 146 + opp-hz = /bits/ 64 <700000000>; 147 + opp-microvolt = <975000>; 148 + clock-latency-ns = <140000>; 149 + }; 150 + opp-600000000 { 151 + opp-hz = /bits/ 64 <600000000>; 152 + opp-microvolt = <937500>; 153 + clock-latency-ns = <140000>; 154 + }; 155 + }; 156 + 45 157 soc: soc { 46 - cluster_a15_opp_table: opp_table0 { 47 - compatible = "operating-points-v2"; 48 - opp-shared; 49 - opp-1800000000 { 50 - opp-hz = /bits/ 64 <1800000000>; 51 - opp-microvolt = <1250000>; 52 - clock-latency-ns = <140000>; 53 - }; 54 - opp-1700000000 { 55 - opp-hz = /bits/ 64 <1700000000>; 56 - opp-microvolt = <1212500>; 57 - clock-latency-ns = <140000>; 58 - }; 59 - opp-1600000000 { 60 - opp-hz = /bits/ 64 <1600000000>; 61 - opp-microvolt = <1175000>; 62 - clock-latency-ns = <140000>; 63 - }; 64 - opp-1500000000 { 65 - opp-hz = /bits/ 64 <1500000000>; 66 - opp-microvolt = <1137500>; 67 - clock-latency-ns = <140000>; 68 - }; 69 - opp-1400000000 { 70 - opp-hz = /bits/ 64 <1400000000>; 71 - opp-microvolt = <1112500>; 72 - clock-latency-ns = <140000>; 73 - }; 74 - opp-1300000000 { 75 - opp-hz = /bits/ 64 <1300000000>; 76 - opp-microvolt = <1062500>; 77 - clock-latency-ns = <140000>; 78 - }; 79 - opp-1200000000 { 80 - opp-hz = /bits/ 64 <1200000000>; 81 - opp-microvolt = <1037500>; 82 - clock-latency-ns = <140000>; 83 - }; 84 - opp-1100000000 { 85 - opp-hz = /bits/ 64 <1100000000>; 86 - opp-microvolt = <1012500>; 87 - clock-latency-ns = <140000>; 88 - }; 89 - opp-1000000000 { 90 - opp-hz = /bits/ 64 <1000000000>; 91 - opp-microvolt = < 987500>; 92 - clock-latency-ns = <140000>; 93 - }; 94 - opp-900000000 { 95 - opp-hz = /bits/ 64 <900000000>; 96 - opp-microvolt = < 962500>; 97 - clock-latency-ns = <140000>; 98 - }; 99 - opp-800000000 { 100 - opp-hz = /bits/ 64 <800000000>; 101 - opp-microvolt = < 937500>; 102 - clock-latency-ns = <140000>; 103 - }; 104 - opp-700000000 { 105 - opp-hz = /bits/ 64 <700000000>; 106 - opp-microvolt = < 912500>; 107 - clock-latency-ns = <140000>; 108 - }; 109 - }; 110 - 111 - cluster_a7_opp_table: opp_table1 { 112 - compatible = "operating-points-v2"; 113 - opp-shared; 114 - opp-1300000000 { 115 - opp-hz = /bits/ 64 <1300000000>; 116 - opp-microvolt = <1275000>; 117 - clock-latency-ns = <140000>; 118 - }; 119 - opp-1200000000 { 120 - opp-hz = /bits/ 64 <1200000000>; 121 - opp-microvolt = <1212500>; 122 - clock-latency-ns = <140000>; 123 - }; 124 - opp-1100000000 { 125 - opp-hz = /bits/ 64 <1100000000>; 126 - opp-microvolt = <1162500>; 127 - clock-latency-ns = <140000>; 128 - }; 129 - opp-1000000000 { 130 - opp-hz = /bits/ 64 <1000000000>; 131 - opp-microvolt = <1112500>; 132 - clock-latency-ns = <140000>; 133 - }; 134 - opp-900000000 { 135 - opp-hz = /bits/ 64 <900000000>; 136 - opp-microvolt = <1062500>; 137 - clock-latency-ns = <140000>; 138 - }; 139 - opp-800000000 { 140 - opp-hz = /bits/ 64 <800000000>; 141 - opp-microvolt = <1025000>; 142 - clock-latency-ns = <140000>; 143 - }; 144 - opp-700000000 { 145 - opp-hz = /bits/ 64 <700000000>; 146 - opp-microvolt = <975000>; 147 - clock-latency-ns = <140000>; 148 - }; 149 - opp-600000000 { 150 - opp-hz = /bits/ 64 <600000000>; 151 - opp-microvolt = <937500>; 152 - clock-latency-ns = <140000>; 153 - }; 154 - }; 155 - 156 158 cci: cci@10d20000 { 157 159 compatible = "arm,cci-400"; 158 160 #address-cells = <1>; ··· 547 545 clock-names = "bus_clk", "pll_clk"; 548 546 #address-cells = <1>; 549 547 #size-cells = <0>; 550 - status = "disabled"; 551 - }; 552 - 553 - adc: adc@12d10000 { 554 - compatible = "samsung,exynos-adc-v2"; 555 - reg = <0x12D10000 0x100>; 556 - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 557 - clocks = <&clock CLK_TSADC>; 558 - clock-names = "adc"; 559 - #io-channel-cells = <1>; 560 - io-channel-ranges; 561 - samsung,syscon-phandle = <&pmu_system_controller>; 562 548 status = "disabled"; 563 549 }; 564 550 ··· 1351 1361 #include "exynos5420-trip-points.dtsi" 1352 1362 }; 1353 1363 }; 1364 + }; 1365 + 1366 + &adc { 1367 + clocks = <&clock CLK_TSADC>; 1368 + clock-names = "adc"; 1369 + samsung,syscon-phandle = <&pmu_system_controller>; 1354 1370 }; 1355 1371 1356 1372 &dp {
+9
arch/arm/boot/dts/exynos54xx.dtsi
··· 96 96 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 97 97 }; 98 98 99 + adc: adc@12d10000 { 100 + compatible = "samsung,exynos-adc-v2"; 101 + reg = <0x12d10000 0x100>; 102 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 103 + #io-channel-cells = <1>; 104 + io-channel-ranges; 105 + status = "disabled"; 106 + }; 107 + 99 108 /* i2c_0-3 are defined in exynos5.dtsi */ 100 109 hsi2c_4: i2c@12ca0000 { 101 110 compatible = "samsung,exynos5250-hsi2c";