tjh.dev / kernel
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staging/keucr: fix keucr smil.h coding style

fix keucr smil.h coding style

Signed-off-by: Cho, Yu-Chen <acho@novell.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

authored by

Cho, Yu-Chen and committed by
Greg Kroah-Hartman ece114aa 65cdcf36

+147 -138
+147 -138
drivers/staging/keucr/smil.h
··· 44 44 /*************************************************************************** 45 45 Hardware ECC Definition 46 46 ***************************************************************************/ 47 - #define HW_ECC_SUPPORTED 1 /* Hardware ECC Supported */ /* No difinition for Software ECC */ 47 + #define HW_ECC_SUPPORTED 1 /* Hardware ECC Supported */ 48 + /* No difinition for Software ECC */ 48 49 49 50 /*************************************************************************** 50 51 SmartMedia Command & Status Definition 51 52 ***************************************************************************/ 52 53 /* SmartMedia Command */ 53 54 #define WRDATA 0x80 54 - //#define READ 0x00 55 + /* #define READ 0x00 */ 55 56 #define READ_REDT 0x50 56 - //#define WRITE 0x10 57 + /* #define WRITE 0x10 */ 57 58 #define RDSTATUS 0x70 58 59 59 - #define READ1 0x00 //NO 60 - #define READ2 0x01 //NO 61 - #define READ3 0x50 //NO 60 + #define READ1 0x00 /* NO */ 61 + #define READ2 0x01 /* NO */ 62 + #define READ3 0x50 /* NO */ 62 63 #define RST_CHIP 0xFF 63 64 #define ERASE1 0x60 64 65 #define ERASE2 0xD0 ··· 68 67 #define READ_ID_3 0x9A 69 68 70 69 /* 712 SmartMedia Command */ 71 - #define SM_CMD_RESET 0x00 // 0xFF 72 - #define SM_CMD_READ_ID_1 0x10 // 0x90 73 - #define SM_CMD_READ_ID_2 0x20 // 0x91 74 - #define SM_CMD_READ_STAT 0x30 // 0x70 75 - #define SM_CMD_RDMULTPL_STAT 0x40 // 0x71 76 - #define SM_CMD_READ_1 0x50 // 0x00 77 - #define SM_CMD_READ_2 0x60 // 0x01 78 - #define SM_CMD_READ_3 0x70 // 0x50 79 - #define SM_CMD_PAGPRGM_TRUE 0x80 // {0x80, 0x10} 80 - #define SM_CMD_PAGPRGM_DUMY 0x90 // {0x80, 0x11} 81 - #define SM_CMD_PAGPRGM_MBLK 0xA0 // {0x80, 0x15} 82 - #define SM_CMD_BLKERASE 0xB0 // {0x60, 0xD0} 83 - #define SM_CMD_BLKERASE_MULTPL 0xC0 // {0x60-0x60, 0xD0} 70 + #define SM_CMD_RESET 0x00 /* 0xFF */ 71 + #define SM_CMD_READ_ID_1 0x10 /* 0x90 */ 72 + #define SM_CMD_READ_ID_2 0x20 /* 0x91 */ 73 + #define SM_CMD_READ_STAT 0x30 /* 0x70 */ 74 + #define SM_CMD_RDMULTPL_STAT 0x40 /* 0x71 */ 75 + #define SM_CMD_READ_1 0x50 /* 0x00 */ 76 + #define SM_CMD_READ_2 0x60 /* 0x01 */ 77 + #define SM_CMD_READ_3 0x70 /* 0x50 */ 78 + #define SM_CMD_PAGPRGM_TRUE 0x80 /* {0x80, 0x10} */ 79 + #define SM_CMD_PAGPRGM_DUMY 0x90 /* {0x80, 0x11} */ 80 + #define SM_CMD_PAGPRGM_MBLK 0xA0 /* {0x80, 0x15} */ 81 + #define SM_CMD_BLKERASE 0xB0 /* {0x60, 0xD0} */ 82 + #define SM_CMD_BLKERASE_MULTPL 0xC0 /* {0x60-0x60, 0xD0} */ 84 83 85 84 #define SM_CRADDTCT_DEBNCETIMER_EN 0x02 86 85 #define SM_CMD_START_BIT 0x01 ··· 88 87 #define SM_WaitCmdDone { while (!SM_CmdDone); } 89 88 #define SM_WaitDmaDone { while (!SM_DmaDone); } 90 89 91 - // SmartMedia Status 92 - #define WR_FAIL 0x01 // 0:Pass, 1:Fail 93 - #define SUSPENDED 0x20 // 0:Not Suspended, 1:Suspended 94 - #define READY 0x40 // 0:Busy, 1:Ready 95 - #define WR_PRTCT 0x80 // 0:Protect, 1:Not Protect 90 + /* SmartMedia Status */ 91 + #define WR_FAIL 0x01 /* 0:Pass, 1:Fail */ 92 + #define SUSPENDED 0x20 /* 0:Not Suspended, 1:Suspended */ 93 + #define READY 0x40 /* 0:Busy, 1:Ready */ 94 + #define WR_PRTCT 0x80 /* 0:Protect, 1:Not Protect */ 96 95 97 - // SmartMedia Busy Time (1bit:0.1ms) 98 - #define BUSY_PROG 200 // tPROG : 20ms ----- Program Time old : 200 99 - #define BUSY_ERASE 4000 // tBERASE : 400ms ----- Block Erase Time old : 4000 100 - //for 712 Test 101 - //#define BUSY_READ 1 // tR : 100us ----- Data transfer Time old : 1 102 - //#define BUSY_READ 10 // tR : 100us ----- Data transfer Time old : 1 103 - #define BUSY_READ 200 // tR : 20ms ----- Data transfer Time old : 1 104 - //#define BUSY_RESET 60 // tRST : 6ms ----- Device Resetting Time old : 60 105 - #define BUSY_RESET 600 // tRST : 60ms ----- Device Resetting Time old : 60 96 + /* SmartMedia Busy Time (1bit:0.1ms) */ 97 + #define BUSY_PROG 200 /* tPROG : 20ms ----- Program Time old : 200 */ 98 + #define BUSY_ERASE 4000 /* tBERASE : 400ms ----- Block Erase Time old : 4000 */ 106 99 107 - // Hardware Timer (1bit:0.1ms) 108 - #define TIME_PON 3000 // 300ms ------ Power On Wait Time 109 - #define TIME_CDCHK 200 // 20ms ------ Card Check Interval Timer 110 - #define TIME_WPCHK 50 // 5ms ------ WP Check Interval Timer 111 - #define TIME_5VCHK 10 // 1ms ------ 5V Check Interval Timer 100 + /*for 712 Test */ 101 + /* #define BUSY_READ 1 *//* tR : 100us ----- Data transfer Time old : 1 */ 102 + /* #define BUSY_READ 10 *//* tR : 100us ----- Data transfer Time old : 1 */ 103 + 104 + #define BUSY_READ 200 /* tR : 20ms ----- Data transfer Time old : 1 */ 105 + 106 + /* #define BUSY_RESET 60 *//* tRST : 6ms ----- Device Resetting Time old : 60 */ 107 + 108 + #define BUSY_RESET 600 /* tRST : 60ms ----- Device Resetting Time old : 60 */ 109 + 110 + /* Hardware Timer (1bit:0.1ms) */ 111 + #define TIME_PON 3000 /* 300ms ------ Power On Wait Time */ 112 + #define TIME_CDCHK 200 /* 20ms ------ Card Check Interval Timer */ 113 + #define TIME_WPCHK 50 /* 5ms ------ WP Check Interval Timer */ 114 + #define TIME_5VCHK 10 /* 1ms ------ 5V Check Interval Timer */ 112 115 113 116 /*************************************************************************** 114 117 Redundant Data ··· 134 129 SmartMedia Model & Attribute 135 130 ***************************************************************************/ 136 131 /* SmartMedia Attribute */ 137 - #define NOWP 0x00 // 0... .... No Write Protect 138 - #define WP 0x80 // 1... .... Write Protected 139 - #define MASK 0x00 // .00. .... NAND MASK ROM Model 140 - #define FLASH 0x20 // .01. .... NAND Flash ROM Model 141 - #define AD3CYC 0x00 // ...0 .... Address 3-cycle 142 - #define AD4CYC 0x10 // ...1 .... Address 4-cycle 143 - #define BS16 0x00 // .... 00.. 16page/block 144 - #define BS32 0x04 // .... 01.. 32page/block 145 - #define PS256 0x00 // .... ..00 256byte/page 146 - #define PS512 0x01 // .... ..01 512byte/page 147 - #define MWP 0x80 // WriteProtect mask 148 - #define MFLASH 0x60 // Flash Rom mask 149 - #define MADC 0x10 // Address Cycle 150 - #define MBS 0x0C // BlockSize mask 151 - #define MPS 0x03 // PageSize mask 132 + #define NOWP 0x00 /* 0... .... No Write Protect */ 133 + #define WP 0x80 /* 1... .... Write Protected */ 134 + #define MASK 0x00 /* .00. .... NAND MASK ROM Model */ 135 + #define FLASH 0x20 /* .01. .... NAND Flash ROM Model */ 136 + #define AD3CYC 0x00 /* ...0 .... Address 3-cycle */ 137 + #define AD4CYC 0x10 /* ...1 .... Address 4-cycle */ 138 + #define BS16 0x00 /* .... 00.. 16page/block */ 139 + #define BS32 0x04 /* .... 01.. 32page/block */ 140 + #define PS256 0x00 /* .... ..00 256byte/page */ 141 + #define PS512 0x01 /* .... ..01 512byte/page */ 142 + #define MWP 0x80 /* WriteProtect mask */ 143 + #define MFLASH 0x60 /* Flash Rom mask */ 144 + #define MADC 0x10 /* Address Cycle */ 145 + #define MBS 0x0C /* BlockSize mask */ 146 + #define MPS 0x03 /* PageSize mask */ 152 147 153 148 /* SmartMedia Model */ 154 - #define NOSSFDC 0x00 // NO SmartMedia 155 - #define SSFDC1MB 0x01 // 1MB SmartMedia 156 - #define SSFDC2MB 0x02 // 2MB SmartMedia 157 - #define SSFDC4MB 0x03 // 4MB SmartMedia 158 - #define SSFDC8MB 0x04 // 8MB SmartMedia 159 - #define SSFDC16MB 0x05 // 16MB SmartMedia 160 - #define SSFDC32MB 0x06 // 32MB SmartMedia 161 - #define SSFDC64MB 0x07 // 64MB SmartMedia 162 - #define SSFDC128MB 0x08 //128MB SmartMedia 149 + #define NOSSFDC 0x00 /* NO SmartMedia */ 150 + #define SSFDC1MB 0x01 /* 1MB SmartMedia */ 151 + #define SSFDC2MB 0x02 /* 2MB SmartMedia */ 152 + #define SSFDC4MB 0x03 /* 4MB SmartMedia */ 153 + #define SSFDC8MB 0x04 /* 8MB SmartMedia */ 154 + #define SSFDC16MB 0x05 /* 16MB SmartMedia */ 155 + #define SSFDC32MB 0x06 /* 32MB SmartMedia */ 156 + #define SSFDC64MB 0x07 /* 64MB SmartMedia */ 157 + #define SSFDC128MB 0x08 /*128MB SmartMedia */ 163 158 #define SSFDC256MB 0x09 164 159 #define SSFDC512MB 0x0A 165 160 #define SSFDC1GB 0x0B ··· 168 163 /*************************************************************************** 169 164 Struct Definition 170 165 ***************************************************************************/ 171 - struct SSFDCTYPE 172 - { 166 + struct SSFDCTYPE { 173 167 BYTE Model; 174 168 BYTE Attribute; 175 169 BYTE MaxZones; ··· 187 183 WORD MaxLogBlocks; 188 184 } *SSFDCTYPE_T; 189 185 190 - struct ADDRESS 191 - { 186 + struct ADDRESS { 192 187 BYTE Zone; /* Zone Number */ 193 188 BYTE Sector; /* Sector(512byte) Number on Block */ 194 189 WORD PhyBlock; /* Physical Block Number on Zone */ ··· 202 199 WORD LogBlock; /* Logical Block Number of Zone */ 203 200 } *ADDRESS_T; 204 201 205 - struct CIS_AREA 206 - { 202 + struct CIS_AREA { 207 203 BYTE Sector; /* Sector(512byte) Number on Block */ 208 204 WORD PhyBlock; /* Physical Block Number on Zone 0 */ 209 205 }; ··· 221 219 extern struct ADDRESS Media; 222 220 extern struct CIS_AREA CisArea; 223 221 224 - //----- SMILMain.c --------------------------------------------------- 222 + /* 223 + * SMILMain.c 224 + */ 225 225 /******************************************/ 226 - int Init_D_SmartMedia (void); 227 - int Pwoff_D_SmartMedia (void); 228 - int Check_D_SmartMedia (void); 229 - int Check_D_Parameter (struct us_data *,WORD *,BYTE *,BYTE *); 230 - int Media_D_ReadSector (struct us_data *,DWORD,WORD,BYTE *); 231 - int Media_D_WriteSector (struct us_data *,DWORD,WORD,BYTE *); 232 - int Media_D_CopySector (struct us_data *,DWORD,WORD,BYTE *); 233 - int Media_D_EraseBlock (struct us_data *,DWORD,WORD); 234 - int Media_D_EraseAll (struct us_data *); 226 + int Init_D_SmartMedia(void); 227 + int Pwoff_D_SmartMedia(void); 228 + int Check_D_SmartMedia(void); 229 + int Check_D_Parameter(struct us_data *, WORD *, BYTE *, BYTE *); 230 + int Media_D_ReadSector(struct us_data *, DWORD, WORD, BYTE *); 231 + int Media_D_WriteSector(struct us_data *, DWORD, WORD, BYTE *); 232 + int Media_D_CopySector(struct us_data *, DWORD, WORD, BYTE *); 233 + int Media_D_EraseBlock(struct us_data *, DWORD, WORD); 234 + int Media_D_EraseAll(struct us_data *); 235 235 /******************************************/ 236 - int Media_D_OneSectWriteStart (struct us_data *,DWORD,BYTE *); 237 - int Media_D_OneSectWriteNext (struct us_data *,BYTE *); 238 - int Media_D_OneSectWriteFlush (struct us_data *); 236 + int Media_D_OneSectWriteStart(struct us_data *, DWORD, BYTE *); 237 + int Media_D_OneSectWriteNext(struct us_data *, BYTE *); 238 + int Media_D_OneSectWriteFlush(struct us_data *); 239 239 240 240 /******************************************/ 241 241 extern int SM_FreeMem(void); /* ENE SM function */ 242 - void SM_EnableLED (struct us_data *,BOOLEAN); 243 - void Led_D_TernOn (void); 244 - void Led_D_TernOff (void); 242 + void SM_EnableLED(struct us_data *, BOOLEAN); 243 + void Led_D_TernOn(void); 244 + void Led_D_TernOff(void); 245 245 246 - int Media_D_EraseAllRedtData (DWORD Index, BOOLEAN CheckBlock); 247 - //DWORD Media_D_GetMediaInfo (struct us_data * fdoExt, PIOCTL_MEDIA_INFO_IN pParamIn, PIOCTL_MEDIA_INFO_OUT pParamOut); 246 + int Media_D_EraseAllRedtData(DWORD Index, BOOLEAN CheckBlock); 247 + /*DWORD Media_D_GetMediaInfo(struct us_data * fdoExt, 248 + PIOCTL_MEDIA_INFO_IN pParamIn, PIOCTL_MEDIA_INFO_OUT pParamOut); */ 248 249 249 - //----- SMILSub.c ---------------------------------------------------- 250 + /* 251 + * SMILSub.c 252 + */ 250 253 /******************************************/ 251 - int Check_D_DataBlank (BYTE *); 252 - int Check_D_FailBlock (BYTE *); 253 - int Check_D_DataStatus (BYTE *); 254 - int Load_D_LogBlockAddr (BYTE *); 255 - void Clr_D_RedundantData (BYTE *); 256 - void Set_D_LogBlockAddr (BYTE *); 257 - void Set_D_FailBlock (BYTE *); 258 - void Set_D_DataStaus (BYTE *); 259 - 260 - /******************************************/ 261 - void Ssfdc_D_Reset (struct us_data *); 262 - int Ssfdc_D_ReadCisSect (struct us_data *, BYTE *,BYTE *); 263 - void Ssfdc_D_WriteRedtMode (void); 264 - void Ssfdc_D_ReadID (BYTE *, BYTE); 265 - int Ssfdc_D_ReadSect (struct us_data *, BYTE *,BYTE *); 266 - int Ssfdc_D_ReadBlock (struct us_data *, WORD, BYTE *,BYTE *); 267 - int Ssfdc_D_WriteSect (struct us_data *, BYTE *,BYTE *); 268 - int Ssfdc_D_WriteBlock (struct us_data *, WORD, BYTE *,BYTE *); 269 - int Ssfdc_D_CopyBlock (struct us_data *, WORD, BYTE *,BYTE *); 270 - int Ssfdc_D_WriteSectForCopy (struct us_data *, BYTE *,BYTE *); 271 - int Ssfdc_D_EraseBlock (struct us_data *); 272 - int Ssfdc_D_ReadRedtData (struct us_data *, BYTE *); 273 - int Ssfdc_D_WriteRedtData (struct us_data *, BYTE *); 274 - int Ssfdc_D_CheckStatus (void); 275 - int Set_D_SsfdcModel (BYTE); 276 - void Cnt_D_Reset (void); 277 - int Cnt_D_PowerOn (void); 278 - void Cnt_D_PowerOff (void); 279 - void Cnt_D_LedOn (void); 280 - void Cnt_D_LedOff (void); 281 - int Check_D_CntPower (void); 282 - int Check_D_CardExist (void); 283 - int Check_D_CardStsChg (void); 284 - int Check_D_SsfdcWP (void); 285 - int SM_ReadBlock (struct us_data *, BYTE *,BYTE *); 286 - 287 - int Ssfdc_D_ReadSect_DMA (struct us_data *, BYTE *,BYTE *); 288 - int Ssfdc_D_ReadSect_PIO (struct us_data *, BYTE *,BYTE *); 289 - int Ssfdc_D_WriteSect_DMA (struct us_data *, BYTE *,BYTE *); 290 - int Ssfdc_D_WriteSect_PIO (struct us_data *, BYTE *,BYTE *); 254 + int Check_D_DataBlank(BYTE *); 255 + int Check_D_FailBlock(BYTE *); 256 + int Check_D_DataStatus(BYTE *); 257 + int Load_D_LogBlockAddr(BYTE *); 258 + void Clr_D_RedundantData(BYTE *); 259 + void Set_D_LogBlockAddr(BYTE *); 260 + void Set_D_FailBlock(BYTE *); 261 + void Set_D_DataStaus(BYTE *); 291 262 292 263 /******************************************/ 293 - int Check_D_ReadError (BYTE *); 294 - int Check_D_Correct (BYTE *,BYTE *); 295 - int Check_D_CISdata (BYTE *,BYTE *); 296 - void Set_D_RightECC (BYTE *); 264 + void Ssfdc_D_Reset(struct us_data *); 265 + int Ssfdc_D_ReadCisSect(struct us_data *, BYTE *, BYTE *); 266 + void Ssfdc_D_WriteRedtMode(void); 267 + void Ssfdc_D_ReadID(BYTE *, BYTE); 268 + int Ssfdc_D_ReadSect(struct us_data *, BYTE *, BYTE *); 269 + int Ssfdc_D_ReadBlock(struct us_data *, WORD, BYTE *, BYTE *); 270 + int Ssfdc_D_WriteSect(struct us_data *, BYTE *, BYTE *); 271 + int Ssfdc_D_WriteBlock(struct us_data *, WORD, BYTE *, BYTE *); 272 + int Ssfdc_D_CopyBlock(struct us_data *, WORD, BYTE *, BYTE *); 273 + int Ssfdc_D_WriteSectForCopy(struct us_data *, BYTE *, BYTE *); 274 + int Ssfdc_D_EraseBlock(struct us_data *); 275 + int Ssfdc_D_ReadRedtData(struct us_data *, BYTE *); 276 + int Ssfdc_D_WriteRedtData(struct us_data *, BYTE *); 277 + int Ssfdc_D_CheckStatus(void); 278 + int Set_D_SsfdcModel(BYTE); 279 + void Cnt_D_Reset(void); 280 + int Cnt_D_PowerOn(void); 281 + void Cnt_D_PowerOff(void); 282 + void Cnt_D_LedOn(void); 283 + void Cnt_D_LedOff(void); 284 + int Check_D_CntPower(void); 285 + int Check_D_CardExist(void); 286 + int Check_D_CardStsChg(void); 287 + int Check_D_SsfdcWP(void); 288 + int SM_ReadBlock(struct us_data *, BYTE *, BYTE *); 297 289 298 - //----- SMILECC.c ---------------------------------------------------- 299 - void calculate_ecc (BYTE *, BYTE *, BYTE *, BYTE *, BYTE *); 300 - BYTE correct_data (BYTE *, BYTE *, BYTE, BYTE, BYTE); 301 - int _Correct_D_SwECC (BYTE *,BYTE *,BYTE *); 302 - void _Calculate_D_SwECC (BYTE *,BYTE *); 290 + int Ssfdc_D_ReadSect_DMA(struct us_data *, BYTE *, BYTE *); 291 + int Ssfdc_D_ReadSect_PIO(struct us_data *, BYTE *, BYTE *); 292 + int Ssfdc_D_WriteSect_DMA(struct us_data *, BYTE *, BYTE *); 293 + int Ssfdc_D_WriteSect_PIO(struct us_data *, BYTE *, BYTE *); 303 294 304 - void SM_Init (void); 295 + /******************************************/ 296 + int Check_D_ReadError(BYTE *); 297 + int Check_D_Correct(BYTE *, BYTE *); 298 + int Check_D_CISdata(BYTE *, BYTE *); 299 + void Set_D_RightECC(BYTE *); 305 300 306 - #endif // already included 301 + /* 302 + * SMILECC.c 303 + */ 304 + void calculate_ecc(BYTE *, BYTE *, BYTE *, BYTE *, BYTE *); 305 + BYTE correct_data(BYTE *, BYTE *, BYTE, BYTE, BYTE); 306 + int _Correct_D_SwECC(BYTE *, BYTE *, BYTE *); 307 + void _Calculate_D_SwECC(BYTE *, BYTE *); 308 + 309 + void SM_Init(void); 310 + 311 + #endif /* already included */