Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: renesas: r8a73a4: Add TMU nodes

Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
and the clocks serving them.

Note that TMU channels 1 and 2 are not added, as their interrupts are
not wired to the interrupt controller for the AP-System Core (INTC-SYS),
only to the interrupt controller for the AP-Realtime Core (INTC-RT).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1a60832f3ba37afb4a5791f4e5db4610ab31beb3.1710864964.git.geert+renesas@glider.be

+41
+37
arch/arm/boot/dts/renesas/r8a73a4.dtsi
··· 60 60 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 61 61 }; 62 62 63 + tmu0: timer@e61e0000 { 64 + compatible = "renesas,tmu-r8a73a4", "renesas,tmu"; 65 + reg = <0 0xe61e0000 0 0x30>; 66 + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 67 + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 68 + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 69 + interrupt-names = "tuni0", "tuni1", "tuni2"; 70 + clocks = <&mstp1_clks R8A73A4_CLK_TMU0>; 71 + clock-names = "fck"; 72 + power-domains = <&pd_c5>; 73 + status = "disabled"; 74 + }; 75 + 76 + tmu3: timer@fff80000 { 77 + compatible = "renesas,tmu-r8a73a4", "renesas,tmu"; 78 + reg = <0 0xfff80000 0 0x30>; 79 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 80 + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 81 + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 82 + interrupt-names = "tuni0", "tuni1", "tuni2"; 83 + clocks = <&mstp1_clks R8A73A4_CLK_TMU3>; 84 + clock-names = "fck"; 85 + power-domains = <&pd_a3r>; 86 + status = "disabled"; 87 + }; 88 + 63 89 dbsc1: memory-controller@e6790000 { 64 90 compatible = "renesas,dbsc-r8a73a4"; 65 91 reg = <0 0xe6790000 0 0x10000>; ··· 680 654 }; 681 655 682 656 /* Gate clocks */ 657 + mstp1_clks: mstp1_clks@e6150134 { 658 + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; 659 + reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; 660 + clocks = <&cp_clk>, <&mp_clk>; 661 + #clock-cells = <1>; 662 + clock-indices = < 663 + R8A73A4_CLK_TMU0 R8A73A4_CLK_TMU3 664 + >; 665 + clock-output-names = 666 + "tmu0", "tmu3"; 667 + }; 683 668 mstp2_clks: mstp2_clks@e6150138 { 684 669 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; 685 670 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+4
include/dt-bindings/clock/r8a73a4-clock.h
··· 24 24 #define R8A73A4_CLK_ZS 14 25 25 #define R8A73A4_CLK_HP 15 26 26 27 + /* MSTP1 */ 28 + #define R8A73A4_CLK_TMU0 25 29 + #define R8A73A4_CLK_TMU3 21 30 + 27 31 /* MSTP2 */ 28 32 #define R8A73A4_CLK_DMAC 18 29 33 #define R8A73A4_CLK_SCIFB3 17