+5
drivers/tty/serial/fsl_lpuart.c
+5
drivers/tty/serial/fsl_lpuart.c
···
921
921
writeb(val | UARTPFIFO_TXFE | UARTPFIFO_RXFE,
922
922
sport->port.membase + UARTPFIFO);
923
923
924
+
/* explicitly clear RDRF */
925
+
readb(sport->port.membase + UARTSR1);
926
+
924
927
/* flush Tx and Rx FIFO */
925
928
writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH,
926
929
sport->port.membase + UARTCFIFO);
···
1078
1075
1079
1076
sport->txfifo_size = 0x1 << (((temp >> UARTPFIFO_TXSIZE_OFF) &
1080
1077
UARTPFIFO_FIFOSIZE_MASK) + 1);
1078
+
1079
+
sport->port.fifosize = sport->txfifo_size;
1081
1080
1082
1081
sport->rxfifo_size = 0x1 << (((temp >> UARTPFIFO_RXSIZE_OFF) &
1083
1082
UARTPFIFO_FIFOSIZE_MASK) + 1);