cpufreq / intel_pstate: Set timer timeout correctly

The current calculation of the delay time is wrong and a cut and
paste error from a previous experimental driver. This can result in
the timeout being set to jiffies + 1 which setup the driver to race
with itself if the APIC timer interrupt happens at just the right
time.

References: https://bugzilla.redhat.com/show_bug.cgi?id=920289
Reported-by: Adam Williamson <awilliam@redhat.com>
Reported-and-tested-by: Parag Warudkar <parag.lkml@gmail.com>
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

authored by

Dirk Brandewie and committed by
Rafael J. Wysocki
ec376a2a 31880c37

-1
-1
drivers/cpufreq/intel_pstate.c
··· 502 502 503 503 sample_time = cpu->pstate_policy->sample_rate_ms; 504 504 delay = msecs_to_jiffies(sample_time); 505 - delay -= jiffies % delay; 506 505 mod_timer_pinned(&cpu->timer, jiffies + delay); 507 506 } 508 507