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iio: adc: Add Renesas GyroADC bindings
Add DT bindings for the Renesas RCar GyroADC block. This block is
a simple 4/8-channel ADC which samples 12/15/24 bits of data every
cycle from all channels.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Simon Horman <horms+renesas@verge.net.au>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: linux-renesas-soc@vger.kernel.org
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Rob Herring <robh@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
authored by
Marek Vasut
and committed by
Jonathan Cameron
ec2ef153
63d8d50c
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Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
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Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt
···
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* Renesas RCar GyroADC device driver
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The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
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which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
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are sampled by the GyroADC block in a round-robin fashion and the result
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presented in the GyroADC registers.
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Required properties:
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- compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc".
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The <soc-specific> should be one of:
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renesas,r8a7791-gyroadc - for the GyroADC block present
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in r8a7791 SoC
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renesas,r8a7792-gyroadc - for the GyroADC with interrupt
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block present in r8a7792 SoC
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- reg: Address and length of the register set for the device
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- clocks: References to all the clocks specified in the clock-names
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property as specified in
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Documentation/devicetree/bindings/clock/clock-bindings.txt.
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- clock-names: Shall contain "fck" and "if". The "fck" is the GyroADC block
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clock, the "if" is the interface clock.
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- power-domains: Must contain a reference to the PM domain, if available.
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- #address-cells: Should be <1> (setting for the subnodes) for all ADCs
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except for "fujitsu,mb88101a". Should be <0> (setting for
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only subnode) for "fujitsu,mb88101a".
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- #size-cells: Should be <0> (setting for the subnodes)
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Sub-nodes:
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You must define subnode(s) which select the connected ADC type and reference
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voltage for the GyroADC channels.
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Required properties for subnodes:
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- compatible: Should be either of:
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"fujitsu,mb88101a"
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- Fujitsu MB88101A compatible mode,
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12bit sampling, up to 4 channels can be sampled in
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round-robin fashion. One Fujitsu chip supplies four
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GyroADC channels with data as it contains four ADCs
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on the chip and thus for 4-channel operation, single
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MB88101A is required. The Cx chipselect lines of the
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MB88101A connect directly to two CHS lines of the
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GyroADC, no demuxer is required. The data out line
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of each MB88101A connects to a shared input pin of
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the GyroADC.
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"ti,adcs7476" or "ti,adc121" or "adi,ad7476"
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- TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode,
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15bit sampling, up to 8 channels can be sampled in
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round-robin fashion. One TI/ADI chip supplies single
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ADC channel with data, thus for 8-channel operation,
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8 chips are required. A 3:8 chipselect demuxer is
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required to connect the nCS line of the TI/ADI chips
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to the GyroADC, while MISO line of each TI/ADI ADC
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connects to a shared input pin of the GyroADC.
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"maxim,max1162" or "maxim,max11100"
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- Maxim MAX1162 / Maxim MAX11100 compatible mode,
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16bit sampling, up to 8 channels can be sampled in
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round-robin fashion. One Maxim chip supplies single
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ADC channel with data, thus for 8-channel operation,
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8 chips are required. A 3:8 chipselect demuxer is
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required to connect the nCS line of the MAX chips
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to the GyroADC, while MISO line of each Maxim ADC
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connects to a shared input pin of the GyroADC.
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- reg: Should be the number of the analog input. Should be present
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for all ADCs except "fujitsu,mb88101a".
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- vref-supply: Reference to the channel reference voltage regulator.
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Example:
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vref_max1162: regulator-vref-max1162 {
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compatible = "regulator-fixed";
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regulator-name = "MAX1162 Vref";
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regulator-min-microvolt = <4096000>;
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regulator-max-microvolt = <4096000>;
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};
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adc@e6e54000 {
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compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
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reg = <0 0xe6e54000 0 64>;
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clocks = <&mstp9_clks R8A7791_CLK_GYROADC>, <&clk_65m>;
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clock-names = "fck", "if";
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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pinctrl-0 = <&adc_pins>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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reg = <0>;
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compatible = "maxim,max1162";
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vref-supply = <&vref_max1162>;
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};
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adc@1 {
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reg = <1>;
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compatible = "maxim,max1162";
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vref-supply = <&vref_max1162>;
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};
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};