NTB: Move files in preparation for NTB abstraction

+2 -2

drivers/net/Kconfig

··· 203 203 def_bool NETPOLL 204 204 205 205 config NTB_NETDEV 206 - tristate "Virtual Ethernet over NTB" 207 - depends on NTB 206 + tristate "Virtual Ethernet over NTB Transport" 207 + depends on NTB_TRANSPORT 208 208 209 209 config RIONET 210 210 tristate "RapidIO Ethernet over messaging driver support"

+3 -3

drivers/net/ntb_netdev.c

··· 49 49 #include <linux/ethtool.h> 50 50 #include <linux/module.h> 51 51 #include <linux/pci.h> 52 - #include <linux/ntb.h> 52 + #include <linux/ntb_transport.h> 53 53 54 54 #define NTB_NETDEV_VER "0.7" 55 55 ··· 410 410 rc = ntb_register_client_dev(KBUILD_MODNAME); 411 411 if (rc) 412 412 return rc; 413 - return ntb_register_client(&ntb_netdev_client); 413 + return ntb_transport_register_client(&ntb_netdev_client); 414 414 } 415 415 module_init(ntb_netdev_init_module); 416 416 417 417 static void __exit ntb_netdev_exit_module(void) 418 418 { 419 - ntb_unregister_client(&ntb_netdev_client); 419 + ntb_transport_unregister_client(&ntb_netdev_client); 420 420 ntb_unregister_client_dev(KBUILD_MODNAME); 421 421 } 422 422 module_exit(ntb_netdev_exit_module);

+2 -2

drivers/ntb/Makefile

··· 1 - obj-$(CONFIG_NTB) += ntb.o 1 + obj-$(CONFIG_NTB) += ntb_hw_intel.o 2 2 3 - ntb-objs := ntb_hw.o ntb_transport.o 3 + ntb_hw_intel-objs := hw/intel/ntb_hw_intel.o ntb_transport.o

+1 -2

drivers/ntb/ntb_hw.c drivers/ntb/hw/intel/ntb_hw_intel.c

··· 53 53 #include <linux/pci.h> 54 54 #include <linux/random.h> 55 55 #include <linux/slab.h> 56 - #include "ntb_hw.h" 57 - #include "ntb_regs.h" 56 + #include "ntb_hw_intel.h" 58 57 59 58 #define NTB_NAME "Intel(R) PCI-E Non-Transparent Bridge Driver" 60 59 #define NTB_VER "1.0"

+130 -1

drivers/ntb/ntb_hw.h drivers/ntb/hw/intel/ntb_hw_intel.h

··· 45 45 * Contact Information: 46 46 * Jon Mason <jon.mason@intel.com> 47 47 */ 48 - #include <linux/ntb.h> 48 + #include <linux/ntb_transport.h> 49 49 50 + #define NTB_LINK_STATUS_ACTIVE 0x2000 51 + #define NTB_LINK_SPEED_MASK 0x000f 52 + #define NTB_LINK_WIDTH_MASK 0x03f0 53 + 54 + #define SNB_MSIX_CNT 4 55 + #define SNB_MAX_B2B_SPADS 16 56 + #define SNB_MAX_COMPAT_SPADS 16 57 + /* Reserve the uppermost bit for link interrupt */ 58 + #define SNB_MAX_DB_BITS 15 59 + #define SNB_LINK_DB 15 60 + #define SNB_DB_BITS_PER_VEC 5 61 + #define HSX_SPLITBAR_MAX_MW 3 62 + #define SNB_MAX_MW 2 63 + #define SNB_ERRATA_MAX_MW 1 64 + 65 + #define SNB_DB_HW_LINK 0x8000 66 + 67 + #define SNB_UNCERRSTS_OFFSET 0x014C 68 + #define SNB_CORERRSTS_OFFSET 0x0158 69 + #define SNB_LINK_STATUS_OFFSET 0x01A2 70 + #define SNB_PCICMD_OFFSET 0x0504 71 + #define SNB_DEVCTRL_OFFSET 0x0598 72 + #define SNB_DEVSTS_OFFSET 0x059A 73 + #define SNB_SLINK_STATUS_OFFSET 0x05A2 74 + 75 + #define SNB_PBAR2LMT_OFFSET 0x0000 76 + #define SNB_PBAR4LMT_OFFSET 0x0008 77 + #define SNB_PBAR5LMT_OFFSET 0x000C 78 + #define SNB_PBAR2XLAT_OFFSET 0x0010 79 + #define SNB_PBAR4XLAT_OFFSET 0x0018 80 + #define SNB_PBAR5XLAT_OFFSET 0x001C 81 + #define SNB_SBAR2LMT_OFFSET 0x0020 82 + #define SNB_SBAR4LMT_OFFSET 0x0028 83 + #define SNB_SBAR5LMT_OFFSET 0x002C 84 + #define SNB_SBAR2XLAT_OFFSET 0x0030 85 + #define SNB_SBAR4XLAT_OFFSET 0x0038 86 + #define SNB_SBAR5XLAT_OFFSET 0x003C 87 + #define SNB_SBAR0BASE_OFFSET 0x0040 88 + #define SNB_SBAR2BASE_OFFSET 0x0048 89 + #define SNB_SBAR4BASE_OFFSET 0x0050 90 + #define SNB_SBAR5BASE_OFFSET 0x0054 91 + #define SNB_NTBCNTL_OFFSET 0x0058 92 + #define SNB_SBDF_OFFSET 0x005C 93 + #define SNB_PDOORBELL_OFFSET 0x0060 94 + #define SNB_PDBMSK_OFFSET 0x0062 95 + #define SNB_SDOORBELL_OFFSET 0x0064 96 + #define SNB_SDBMSK_OFFSET 0x0066 97 + #define SNB_USMEMMISS_OFFSET 0x0070 98 + #define SNB_SPAD_OFFSET 0x0080 99 + #define SNB_SPADSEMA4_OFFSET 0x00c0 100 + #define SNB_WCCNTRL_OFFSET 0x00e0 101 + #define SNB_B2B_SPAD_OFFSET 0x0100 102 + #define SNB_B2B_DOORBELL_OFFSET 0x0140 103 + #define SNB_B2B_XLAT_OFFSETL 0x0144 104 + #define SNB_B2B_XLAT_OFFSETU 0x0148 105 + 106 + /* 107 + * The addresses are setup so the 32bit BARs can function. Thus 108 + * the addresses are all in 32bit space 109 + */ 110 + #define SNB_MBAR01_USD_ADDR 0x000000002100000CULL 111 + #define SNB_MBAR23_USD_ADDR 0x000000004100000CULL 112 + #define SNB_MBAR4_USD_ADDR 0x000000008100000CULL 113 + #define SNB_MBAR5_USD_ADDR 0x00000000A100000CULL 114 + #define SNB_MBAR01_DSD_ADDR 0x000000002000000CULL 115 + #define SNB_MBAR23_DSD_ADDR 0x000000004000000CULL 116 + #define SNB_MBAR4_DSD_ADDR 0x000000008000000CULL 117 + #define SNB_MBAR5_DSD_ADDR 0x00000000A000000CULL 118 + 119 + #define BWD_MSIX_CNT 34 120 + #define BWD_MAX_SPADS 16 121 + #define BWD_MAX_DB_BITS 34 122 + #define BWD_DB_BITS_PER_VEC 1 123 + #define BWD_MAX_MW 2 124 + 125 + #define BWD_PCICMD_OFFSET 0xb004 126 + #define BWD_MBAR23_OFFSET 0xb018 127 + #define BWD_MBAR45_OFFSET 0xb020 128 + #define BWD_DEVCTRL_OFFSET 0xb048 129 + #define BWD_LINK_STATUS_OFFSET 0xb052 130 + #define BWD_ERRCORSTS_OFFSET 0xb110 131 + 132 + #define BWD_SBAR2XLAT_OFFSET 0x0008 133 + #define BWD_SBAR4XLAT_OFFSET 0x0010 134 + #define BWD_PDOORBELL_OFFSET 0x0020 135 + #define BWD_PDBMSK_OFFSET 0x0028 136 + #define BWD_NTBCNTL_OFFSET 0x0060 137 + #define BWD_EBDF_OFFSET 0x0064 138 + #define BWD_SPAD_OFFSET 0x0080 139 + #define BWD_SPADSEMA_OFFSET 0x00c0 140 + #define BWD_STKYSPAD_OFFSET 0x00c4 141 + #define BWD_PBAR2XLAT_OFFSET 0x8008 142 + #define BWD_PBAR4XLAT_OFFSET 0x8010 143 + #define BWD_B2B_DOORBELL_OFFSET 0x8020 144 + #define BWD_B2B_SPAD_OFFSET 0x8080 145 + #define BWD_B2B_SPADSEMA_OFFSET 0x80c0 146 + #define BWD_B2B_STKYSPAD_OFFSET 0x80c4 147 + 148 + #define BWD_MODPHY_PCSREG4 0x1c004 149 + #define BWD_MODPHY_PCSREG6 0x1c006 150 + 151 + #define BWD_IP_BASE 0xC000 152 + #define BWD_DESKEWSTS_OFFSET (BWD_IP_BASE + 0x3024) 153 + #define BWD_LTSSMERRSTS0_OFFSET (BWD_IP_BASE + 0x3180) 154 + #define BWD_LTSSMSTATEJMP_OFFSET (BWD_IP_BASE + 0x3040) 155 + #define BWD_IBSTERRRCRVSTS0_OFFSET (BWD_IP_BASE + 0x3324) 156 + 157 + #define BWD_DESKEWSTS_DBERR (1 << 15) 158 + #define BWD_LTSSMERRSTS0_UNEXPECTEDEI (1 << 20) 159 + #define BWD_LTSSMSTATEJMP_FORCEDETECT (1 << 2) 160 + #define BWD_IBIST_ERR_OFLOW 0x7FFF7FFF 161 + 162 + #define NTB_CNTL_CFG_LOCK (1 << 0) 163 + #define NTB_CNTL_LINK_DISABLE (1 << 1) 164 + #define NTB_CNTL_S2P_BAR23_SNOOP (1 << 2) 165 + #define NTB_CNTL_P2S_BAR23_SNOOP (1 << 4) 166 + #define NTB_CNTL_S2P_BAR4_SNOOP (1 << 6) 167 + #define NTB_CNTL_P2S_BAR4_SNOOP (1 << 8) 168 + #define NTB_CNTL_S2P_BAR5_SNOOP (1 << 12) 169 + #define NTB_CNTL_P2S_BAR5_SNOOP (1 << 14) 170 + #define BWD_CNTL_LINK_DOWN (1 << 16) 171 + 172 + #define NTB_PPD_OFFSET 0x00D4 173 + #define SNB_PPD_CONN_TYPE 0x0003 174 + #define SNB_PPD_DEV_TYPE 0x0010 175 + #define SNB_PPD_SPLIT_BAR (1 << 6) 176 + #define BWD_PPD_INIT_LINK 0x0008 177 + #define BWD_PPD_CONN_TYPE 0x0300 178 + #define BWD_PPD_DEV_TYPE 0x1000 50 179 #define PCI_DEVICE_ID_INTEL_NTB_B2B_JSF 0x3725 51 180 #define PCI_DEVICE_ID_INTEL_NTB_PS_JSF 0x3726 52 181 #define PCI_DEVICE_ID_INTEL_NTB_SS_JSF 0x3727

-177

drivers/ntb/ntb_regs.h

··· 1 - /* 2 - * This file is provided under a dual BSD/GPLv2 license. When using or 3 - * redistributing this file, you may do so under either license. 4 - * 5 - * GPL LICENSE SUMMARY 6 - * 7 - * Copyright(c) 2012 Intel Corporation. All rights reserved. 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of version 2 of the GNU General Public License as 11 - * published by the Free Software Foundation. 12 - * 13 - * BSD LICENSE 14 - * 15 - * Copyright(c) 2012 Intel Corporation. All rights reserved. 16 - * 17 - * Redistribution and use in source and binary forms, with or without 18 - * modification, are permitted provided that the following conditions 19 - * are met: 20 - * 21 - * * Redistributions of source code must retain the above copyright 22 - * notice, this list of conditions and the following disclaimer. 23 - * * Redistributions in binary form must reproduce the above copy 24 - * notice, this list of conditions and the following disclaimer in 25 - * the documentation and/or other materials provided with the 26 - * distribution. 27 - * * Neither the name of Intel Corporation nor the names of its 28 - * contributors may be used to endorse or promote products derived 29 - * from this software without specific prior written permission. 30 - * 31 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 36 - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 37 - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 38 - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 39 - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 40 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 41 - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 - * 43 - * Intel PCIe NTB Linux driver 44 - * 45 - * Contact Information: 46 - * Jon Mason <jon.mason@intel.com> 47 - */ 48 - 49 - #define NTB_LINK_STATUS_ACTIVE 0x2000 50 - #define NTB_LINK_SPEED_MASK 0x000f 51 - #define NTB_LINK_WIDTH_MASK 0x03f0 52 - 53 - #define SNB_MSIX_CNT 4 54 - #define SNB_MAX_B2B_SPADS 16 55 - #define SNB_MAX_COMPAT_SPADS 16 56 - /* Reserve the uppermost bit for link interrupt */ 57 - #define SNB_MAX_DB_BITS 15 58 - #define SNB_LINK_DB 15 59 - #define SNB_DB_BITS_PER_VEC 5 60 - #define HSX_SPLITBAR_MAX_MW 3 61 - #define SNB_MAX_MW 2 62 - #define SNB_ERRATA_MAX_MW 1 63 - 64 - #define SNB_DB_HW_LINK 0x8000 65 - 66 - #define SNB_UNCERRSTS_OFFSET 0x014C 67 - #define SNB_CORERRSTS_OFFSET 0x0158 68 - #define SNB_LINK_STATUS_OFFSET 0x01A2 69 - #define SNB_PCICMD_OFFSET 0x0504 70 - #define SNB_DEVCTRL_OFFSET 0x0598 71 - #define SNB_DEVSTS_OFFSET 0x059A 72 - #define SNB_SLINK_STATUS_OFFSET 0x05A2 73 - 74 - #define SNB_PBAR2LMT_OFFSET 0x0000 75 - #define SNB_PBAR4LMT_OFFSET 0x0008 76 - #define SNB_PBAR5LMT_OFFSET 0x000C 77 - #define SNB_PBAR2XLAT_OFFSET 0x0010 78 - #define SNB_PBAR4XLAT_OFFSET 0x0018 79 - #define SNB_PBAR5XLAT_OFFSET 0x001C 80 - #define SNB_SBAR2LMT_OFFSET 0x0020 81 - #define SNB_SBAR4LMT_OFFSET 0x0028 82 - #define SNB_SBAR5LMT_OFFSET 0x002C 83 - #define SNB_SBAR2XLAT_OFFSET 0x0030 84 - #define SNB_SBAR4XLAT_OFFSET 0x0038 85 - #define SNB_SBAR5XLAT_OFFSET 0x003C 86 - #define SNB_SBAR0BASE_OFFSET 0x0040 87 - #define SNB_SBAR2BASE_OFFSET 0x0048 88 - #define SNB_SBAR4BASE_OFFSET 0x0050 89 - #define SNB_SBAR5BASE_OFFSET 0x0054 90 - #define SNB_NTBCNTL_OFFSET 0x0058 91 - #define SNB_SBDF_OFFSET 0x005C 92 - #define SNB_PDOORBELL_OFFSET 0x0060 93 - #define SNB_PDBMSK_OFFSET 0x0062 94 - #define SNB_SDOORBELL_OFFSET 0x0064 95 - #define SNB_SDBMSK_OFFSET 0x0066 96 - #define SNB_USMEMMISS_OFFSET 0x0070 97 - #define SNB_SPAD_OFFSET 0x0080 98 - #define SNB_SPADSEMA4_OFFSET 0x00c0 99 - #define SNB_WCCNTRL_OFFSET 0x00e0 100 - #define SNB_B2B_SPAD_OFFSET 0x0100 101 - #define SNB_B2B_DOORBELL_OFFSET 0x0140 102 - #define SNB_B2B_XLAT_OFFSETL 0x0144 103 - #define SNB_B2B_XLAT_OFFSETU 0x0148 104 - 105 - /* 106 - * The addresses are setup so the 32bit BARs can function. Thus 107 - * the addresses are all in 32bit space 108 - */ 109 - #define SNB_MBAR01_USD_ADDR 0x000000002100000CULL 110 - #define SNB_MBAR23_USD_ADDR 0x000000004100000CULL 111 - #define SNB_MBAR4_USD_ADDR 0x000000008100000CULL 112 - #define SNB_MBAR5_USD_ADDR 0x00000000A100000CULL 113 - #define SNB_MBAR01_DSD_ADDR 0x000000002000000CULL 114 - #define SNB_MBAR23_DSD_ADDR 0x000000004000000CULL 115 - #define SNB_MBAR4_DSD_ADDR 0x000000008000000CULL 116 - #define SNB_MBAR5_DSD_ADDR 0x00000000A000000CULL 117 - 118 - #define BWD_MSIX_CNT 34 119 - #define BWD_MAX_SPADS 16 120 - #define BWD_MAX_DB_BITS 34 121 - #define BWD_DB_BITS_PER_VEC 1 122 - #define BWD_MAX_MW 2 123 - 124 - #define BWD_PCICMD_OFFSET 0xb004 125 - #define BWD_MBAR23_OFFSET 0xb018 126 - #define BWD_MBAR45_OFFSET 0xb020 127 - #define BWD_DEVCTRL_OFFSET 0xb048 128 - #define BWD_LINK_STATUS_OFFSET 0xb052 129 - #define BWD_ERRCORSTS_OFFSET 0xb110 130 - 131 - #define BWD_SBAR2XLAT_OFFSET 0x0008 132 - #define BWD_SBAR4XLAT_OFFSET 0x0010 133 - #define BWD_PDOORBELL_OFFSET 0x0020 134 - #define BWD_PDBMSK_OFFSET 0x0028 135 - #define BWD_NTBCNTL_OFFSET 0x0060 136 - #define BWD_EBDF_OFFSET 0x0064 137 - #define BWD_SPAD_OFFSET 0x0080 138 - #define BWD_SPADSEMA_OFFSET 0x00c0 139 - #define BWD_STKYSPAD_OFFSET 0x00c4 140 - #define BWD_PBAR2XLAT_OFFSET 0x8008 141 - #define BWD_PBAR4XLAT_OFFSET 0x8010 142 - #define BWD_B2B_DOORBELL_OFFSET 0x8020 143 - #define BWD_B2B_SPAD_OFFSET 0x8080 144 - #define BWD_B2B_SPADSEMA_OFFSET 0x80c0 145 - #define BWD_B2B_STKYSPAD_OFFSET 0x80c4 146 - 147 - #define BWD_MODPHY_PCSREG4 0x1c004 148 - #define BWD_MODPHY_PCSREG6 0x1c006 149 - 150 - #define BWD_IP_BASE 0xC000 151 - #define BWD_DESKEWSTS_OFFSET (BWD_IP_BASE + 0x3024) 152 - #define BWD_LTSSMERRSTS0_OFFSET (BWD_IP_BASE + 0x3180) 153 - #define BWD_LTSSMSTATEJMP_OFFSET (BWD_IP_BASE + 0x3040) 154 - #define BWD_IBSTERRRCRVSTS0_OFFSET (BWD_IP_BASE + 0x3324) 155 - 156 - #define BWD_DESKEWSTS_DBERR (1 << 15) 157 - #define BWD_LTSSMERRSTS0_UNEXPECTEDEI (1 << 20) 158 - #define BWD_LTSSMSTATEJMP_FORCEDETECT (1 << 2) 159 - #define BWD_IBIST_ERR_OFLOW 0x7FFF7FFF 160 - 161 - #define NTB_CNTL_CFG_LOCK (1 << 0) 162 - #define NTB_CNTL_LINK_DISABLE (1 << 1) 163 - #define NTB_CNTL_S2P_BAR23_SNOOP (1 << 2) 164 - #define NTB_CNTL_P2S_BAR23_SNOOP (1 << 4) 165 - #define NTB_CNTL_S2P_BAR4_SNOOP (1 << 6) 166 - #define NTB_CNTL_P2S_BAR4_SNOOP (1 << 8) 167 - #define NTB_CNTL_S2P_BAR5_SNOOP (1 << 12) 168 - #define NTB_CNTL_P2S_BAR5_SNOOP (1 << 14) 169 - #define BWD_CNTL_LINK_DOWN (1 << 16) 170 - 171 - #define NTB_PPD_OFFSET 0x00D4 172 - #define SNB_PPD_CONN_TYPE 0x0003 173 - #define SNB_PPD_DEV_TYPE 0x0010 174 - #define SNB_PPD_SPLIT_BAR (1 << 6) 175 - #define BWD_PPD_INIT_LINK 0x0008 176 - #define BWD_PPD_CONN_TYPE 0x0300 177 - #define BWD_PPD_DEV_TYPE 0x1000

+7 -7

drivers/ntb/ntb_transport.c

··· 56 56 #include <linux/pci.h> 57 57 #include <linux/slab.h> 58 58 #include <linux/types.h> 59 - #include "ntb_hw.h" 59 + #include "hw/intel/ntb_hw_intel.h" 60 60 61 61 #define NTB_TRANSPORT_VERSION 3 62 62 ··· 360 360 EXPORT_SYMBOL_GPL(ntb_register_client_dev); 361 361 362 362 /** 363 - * ntb_register_client - Register NTB client driver 363 + * ntb_transport_register_client - Register NTB client driver 364 364 * @drv: NTB client driver to be registered 365 365 * 366 366 * Register an NTB client driver with the NTB transport layer 367 367 * 368 368 * RETURNS: An appropriate -ERRNO error value on error, or zero for success. 369 369 */ 370 - int ntb_register_client(struct ntb_client *drv) 370 + int ntb_transport_register_client(struct ntb_client *drv) 371 371 { 372 372 drv->driver.bus = &ntb_bus_type; 373 373 ··· 376 376 377 377 return driver_register(&drv->driver); 378 378 } 379 - EXPORT_SYMBOL_GPL(ntb_register_client); 379 + EXPORT_SYMBOL_GPL(ntb_transport_register_client); 380 380 381 381 /** 382 - * ntb_unregister_client - Unregister NTB client driver 382 + * ntb_transport_unregister_client - Unregister NTB client driver 383 383 * @drv: NTB client driver to be unregistered 384 384 * 385 385 * Unregister an NTB client driver with the NTB transport layer 386 386 * 387 387 * RETURNS: An appropriate -ERRNO error value on error, or zero for success. 388 388 */ 389 - void ntb_unregister_client(struct ntb_client *drv) 389 + void ntb_transport_unregister_client(struct ntb_client *drv) 390 390 { 391 391 driver_unregister(&drv->driver); 392 392 } 393 - EXPORT_SYMBOL_GPL(ntb_unregister_client); 393 + EXPORT_SYMBOL_GPL(ntb_transport_unregister_client); 394 394 395 395 static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count, 396 396 loff_t *offp)

+2 -2

include/linux/ntb.h include/linux/ntb_transport.h

··· 59 59 NTB_LINK_UP, 60 60 }; 61 61 62 - int ntb_register_client(struct ntb_client *drvr); 63 - void ntb_unregister_client(struct ntb_client *drvr); 62 + int ntb_transport_register_client(struct ntb_client *drvr); 63 + void ntb_transport_unregister_client(struct ntb_client *drvr); 64 64 int ntb_register_client_dev(char *device_name); 65 65 void ntb_unregister_client_dev(char *device_name); 66 66