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kernel os linux

ARM: dts: armada-xp: add buffer manager nodes

Armada XP network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its
internal SRAM (bm-bppi), which is used for indirect access to buffer
pointer ring residing in DRAM.

Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Marcin Wojtas and committed by
David S. Miller
ebae1376 c49e99c2

+19
+19
arch/arm/boot/dts/armada-xp.dtsi
··· 253 253 marvell,crypto-sram-size = <0x800>; 254 254 }; 255 255 256 + bm: bm@c0000 { 257 + compatible = "marvell,armada-380-neta-bm"; 258 + reg = <0xc0000 0xac>; 259 + clocks = <&gateclk 13>; 260 + internal-mem = <&bm_bppi>; 261 + status = "disabled"; 262 + }; 263 + 256 264 xor@f0900 { 257 265 compatible = "marvell,orion-xor"; 258 266 reg = <0xF0900 0x100 ··· 298 290 #address-cells = <1>; 299 291 #size-cells = <1>; 300 292 ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>; 293 + }; 294 + 295 + bm_bppi: bm-bppi { 296 + compatible = "mmio-sram"; 297 + reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>; 298 + ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>; 299 + #address-cells = <1>; 300 + #size-cells = <1>; 301 + clocks = <&gateclk 13>; 302 + no-memory-wc; 303 + status = "disabled"; 301 304 }; 302 305 }; 303 306