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dt-bindings: clk: sprd: add bindings for sc9863a clock controller
add a new bindings to describe sc9863a clock compatible string.
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200304072730.9193-4-zhang.lyra@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
authored by
Chunyan Zhang
and committed by
Stephen Boyd
eba8ba8a
2112d1dd
+105
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Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml
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Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2019 Unisoc Inc.
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: SC9863A Clock Control Unit Device Tree Bindings
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maintainers:
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- Orson Zhai <orsonzhai@gmail.com>
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- Baolin Wang <baolin.wang7@gmail.com>
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- Chunyan Zhang <zhang.lyra@gmail.com>
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properties:
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"#clock-cells":
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const: 1
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compatible :
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enum:
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- sprd,sc9863a-ap-clk
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- sprd,sc9863a-aon-clk
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- sprd,sc9863a-apahb-gate
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- sprd,sc9863a-pmu-gate
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- sprd,sc9863a-aonapb-gate
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- sprd,sc9863a-pll
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- sprd,sc9863a-mpll
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- sprd,sc9863a-rpll
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- sprd,sc9863a-dpll
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- sprd,sc9863a-mm-gate
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- sprd,sc9863a-apapb-gate
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clocks:
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minItems: 1
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maxItems: 4
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description: |
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The input parent clock(s) phandle for this clock, only list fixed
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clocks which are declared in devicetree.
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clock-names:
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minItems: 1
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maxItems: 4
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items:
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- const: ext-26m
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- const: ext-32k
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- const: ext-4m
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- const: rco-100m
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reg:
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maxItems: 1
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required:
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- compatible
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- '#clock-cells'
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if:
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properties:
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compatible:
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enum:
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- sprd,sc9863a-ap-clk
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- sprd,sc9863a-aon-clk
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then:
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required:
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- reg
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else:
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description: |
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Other SC9863a clock nodes should be the child of a syscon node in
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which compatible string shoule be:
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"sprd,sc9863a-glbregs", "syscon", "simple-mfd"
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The 'reg' property for the clock node is also required if there is a sub
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range of registers for the clocks.
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examples:
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- |
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ap_clk: clock-controller@21500000 {
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compatible = "sprd,sc9863a-ap-clk";
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reg = <0 0x21500000 0 0x1000>;
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clocks = <&ext_26m>, <&ext_32k>;
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clock-names = "ext-26m", "ext-32k";
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#clock-cells = <1>;
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};
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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ap_ahb_regs: syscon@20e00000 {
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compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
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reg = <0 0x20e00000 0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x20e00000 0x4000>;
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apahb_gate: apahb-gate@0 {
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compatible = "sprd,sc9863a-apahb-gate";
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reg = <0x0 0x1020>;
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#clock-cells = <1>;
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};
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};
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};
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...