Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-4.7a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First round of IIO new device support, features and cleanups for the 4.7 cycle.

New core support
* UV light modifier (for intensity)
* UV light index channel type.

New device support
* hp206c barometer and altimeter
- new driver.
* mcp4131 potentiometer
- new driver supporting lots of parts from Microchip.
* mma8452
- FXLS8471Q support
- NXP LPC18XX SOC ADC
- new driver.
- NXP LPC18XX SOC DAC
- new driver.
- rockchip_saradc
- support rk3399
* st accel
- h3lis331dl support

Staging driver removals
* adis16204
- obsolete part making it hard to get parts to test the driver in order
to clean it up.
* adis16220
- obsolete part making it hard to get the parts test the driver in order
to clean it up.

Features
* core
- convenience functions to claim / release direct access to the device.
Makes more consistent handling of this corner easier. Used in ad7192 driver.
* ak8975
- power regulator support.
* at91-sama5d2
- differential channel support.
* mma8452
- runtime pm support
- drop device specific autosleep and use the runtime pm one instead.
* ms5611
- DT bindings
- oversampling ratio support

Cleanups and minor fixes
* MAINTAINERS
- Peter got married - hence name change!

* Documentation
- Fix a typo in in_proximity_raw description.
- Add some missing docs for iio_buffer_access_funcs.

* Tools
- update iio_event_monitor names to match new stuff.
- make generic_buffer look for triggers ending in -trigger as we let these in
for a number of drivers a long time back and now it is a fairly common
option.

Drivers
* staging wide
- convert bare unsigned usage to unsigned int to comply with coding style.
* non staging wide:
- since boiler plate gpio handling of interrupts has been moved into the
ACPI core we don't need to include gpio/consumer.h in a load of drivers so
drop it.
* ad7606
- fix an endian casting sparse warning.
* ak8975
- fix a possible unitialized warning from gcc.
- drop and unused field left over from earlier cleanups
- fix a missing regulator_disable on exit.
* at91-sama5d2
- typo and indentation
- missing IOMEM dependency.
- cleanup mode register usage by avoidling erasing whole thing when changing
the sampling frequency.
* bmc150
- use the core demux and available_scan_masks to simplify buffer handling
- optimize the transfers in the trigger handler now we have a magic function
to emulate bulk reads (under circumstances met here). This matters with some
rather dumb i2c adapters in particular.
- use a single regmap_conf for all bus types as they were all the same.
* bmg160
- use the core demux and available_scan_masks to simplify the buffer handling
- optimize the transfers in the trigger handler now we have a magic funciton
to emulate bulk rads (under circumstances met here).
- drop gpio interrupt probing from the driver (ACPI) as now handled by the
ACPI core.
* ina2xx-adc
- update the CALIB register when RShunt changes.
- fix scale for VShunt - in reality this error canceled out when used.
* isl29028
- use regmap to retrieve the struct device instead of carrying a second
copy of it around.
* kxcjk-1013
- use core demux
- optimize i2c transfers in the trigger handler.
* mcp4531
- refactor to use a pointer to access model parameters instead of indexing
into the array each time.
* mma8452
- style fixes
- avoid swtiching to active whenever the config changes
- add missin i2c_device_id for mma8451
* mpu6050
- fix possible NULL dereference.
- fix the name / chip_id used when ACPI used (otherwise reports as NULL).
* ms5611
- fix a missing regulator_disable that left the regulator on during removal.
* mxc4005
- drop gpio interrupt handling for ACPI case from driver as the core now
handles this case.
* st-sensors
- note that there are only ever a maximum of 3 axis on current st-sensors
so just allocate a fixed sized buffer big enough for that.
* tpl0102
- change the i2c_check_functionality condition to bring it inline with other
IIO users as EOPNOTSUPP.
* tsl2563
- replace deprecated flush_scheduled_work

+2494 -1475
+13 -2
Documentation/ABI/testing/sysfs-bus-iio
··· 1233 1233 Contact: linux-iio@vger.kernel.org 1234 1234 Description: 1235 1235 Proximity measurement indicating that some 1236 - object is near the sensor, usually be observing 1236 + object is near the sensor, usually by observing 1237 1237 reflectivity of infrared or ultrasound emitted. 1238 1238 Often these sensors are unit less and as such conversion 1239 1239 to SI units is not possible. Higher proximity measurements ··· 1255 1255 What: /sys/.../iio:deviceX/in_intensityY_raw 1256 1256 What: /sys/.../iio:deviceX/in_intensityY_ir_raw 1257 1257 What: /sys/.../iio:deviceX/in_intensityY_both_raw 1258 + What: /sys/.../iio:deviceX/in_intensityY_uv_raw 1258 1259 KernelVersion: 3.4 1259 1260 Contact: linux-iio@vger.kernel.org 1260 1261 Description: 1261 1262 Unit-less light intensity. Modifiers both and ir indicate 1262 1263 that measurements contains visible and infrared light 1263 - components or just infrared light, respectively. 1264 + components or just infrared light, respectively. Modifier uv indicates 1265 + that measurements contain ultraviolet light components. 1266 + 1267 + What: /sys/.../iio:deviceX/in_uvindex_input 1268 + KernelVersion: 4.6 1269 + Contact: linux-iio@vger.kernel.org 1270 + Description: 1271 + UV light intensity index measuring the human skin's response to 1272 + different wavelength of sunlight weighted according to the 1273 + standardised CIE Erythemal Action Spectrum. UV index values range 1274 + from 0 (low) to >=11 (extreme). 1264 1275 1265 1276 What: /sys/.../iio:deviceX/in_intensity_red_integration_time 1266 1277 What: /sys/.../iio:deviceX/in_intensity_green_integration_time
+2 -1
Documentation/devicetree/bindings/iio/accel/mma8452.txt
··· 1 - Freescale MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC or MMA8653FC 1 + Freescale MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC or FXLS8471Q 2 2 triaxial accelerometer 3 3 4 4 Required properties: ··· 9 9 * "fsl,mma8453" 10 10 * "fsl,mma8652" 11 11 * "fsl,mma8653" 12 + * "fsl,fxls8471" 12 13 13 14 - reg: the I2C address of the chip 14 15
+21
Documentation/devicetree/bindings/iio/adc/lpc1850-adc.txt
··· 1 + NXP LPC1850 ADC bindings 2 + 3 + Required properties: 4 + - compatible: Should be "nxp,lpc1850-adc" 5 + - reg: Offset and length of the register set for the ADC device 6 + - interrupts: The interrupt number for the ADC device 7 + - clocks: The root clock of the ADC controller 8 + - vref-supply: The regulator supply ADC reference voltage 9 + - resets: phandle to reset controller and line specifier 10 + 11 + Example: 12 + 13 + adc0: adc@400e3000 { 14 + compatible = "nxp,lpc1850-adc"; 15 + reg = <0x400e3000 0x1000>; 16 + interrupts = <17>; 17 + clocks = <&ccu1 CLK_APB3_ADC0>; 18 + vref-supply = <&reg_vdda>; 19 + resets = <&rgu 40>; 20 + status = "disabled"; 21 + };
+5 -1
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
··· 1 1 Rockchip Successive Approximation Register (SAR) A/D Converter bindings 2 2 3 3 Required properties: 4 - - compatible: Should be "rockchip,saradc" or "rockchip,rk3066-tsadc" 4 + - compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc" 5 + - "rockchip,saradc": for rk3188, rk3288 6 + - "rockchip,rk3066-tsadc": for rk3036 7 + - "rockchip,rk3399-saradc": for rk3399 8 + 5 9 - reg: physical base address of the controller and length of memory mapped 6 10 region. 7 11 - interrupts: The interrupt number to the cpu. The interrupt specifier format
+20
Documentation/devicetree/bindings/iio/dac/lpc1850-dac.txt
··· 1 + NXP LPC1850 DAC bindings 2 + 3 + Required properties: 4 + - compatible: Should be "nxp,lpc1850-dac" 5 + - reg: Offset and length of the register set for the ADC device 6 + - interrupts: The interrupt number for the ADC device 7 + - clocks: The root clock of the ADC controller 8 + - vref-supply: The regulator supply ADC reference voltage 9 + - resets: phandle to reset controller and line specifier 10 + 11 + Example: 12 + dac: dac@400e1000 { 13 + compatible = "nxp,lpc1850-dac"; 14 + reg = <0x400e1000 0x1000>; 15 + interrupts = <0>; 16 + clocks = <&ccu1 CLK_APB3_DAC>; 17 + vref-supply = <&reg_vdda>; 18 + resets = <&rgu 42>; 19 + status = "disabled"; 20 + };
+2
Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
··· 8 8 Optional properties: 9 9 10 10 - gpios : should be device tree identifier of the magnetometer DRDY pin 11 + - vdd-supply: an optional regulator that needs to be on to provide VDD 11 12 12 13 Example: 13 14 ··· 16 15 compatible = "asahi-kasei,ak8975"; 17 16 reg = <0x0c>; 18 17 gpios = <&gpj0 7 0>; 18 + vdd-supply = <&ldo_3v3_gnss>; 19 19 };
+84
Documentation/devicetree/bindings/iio/potentiometer/mcp4131.txt
··· 1 + * Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X Digital Potentiometer 2 + driver 3 + 4 + The node for this driver must be a child node of a SPI controller, hence 5 + all mandatory properties described in 6 + 7 + Documentation/devicetree/bindings/spi/spi-bus.txt 8 + 9 + must be specified. 10 + 11 + Required properties: 12 + - compatible: Must be one of the following, depending on the 13 + model: 14 + "microchip,mcp4131-502" 15 + "microchip,mcp4131-103" 16 + "microchip,mcp4131-503" 17 + "microchip,mcp4131-104" 18 + "microchip,mcp4132-502" 19 + "microchip,mcp4132-103" 20 + "microchip,mcp4132-503" 21 + "microchip,mcp4132-104" 22 + "microchip,mcp4141-502" 23 + "microchip,mcp4141-103" 24 + "microchip,mcp4141-503" 25 + "microchip,mcp4141-104" 26 + "microchip,mcp4142-502" 27 + "microchip,mcp4142-103" 28 + "microchip,mcp4142-503" 29 + "microchip,mcp4142-104" 30 + "microchip,mcp4151-502" 31 + "microchip,mcp4151-103" 32 + "microchip,mcp4151-503" 33 + "microchip,mcp4151-104" 34 + "microchip,mcp4152-502" 35 + "microchip,mcp4152-103" 36 + "microchip,mcp4152-503" 37 + "microchip,mcp4152-104" 38 + "microchip,mcp4161-502" 39 + "microchip,mcp4161-103" 40 + "microchip,mcp4161-503" 41 + "microchip,mcp4161-104" 42 + "microchip,mcp4162-502" 43 + "microchip,mcp4162-103" 44 + "microchip,mcp4162-503" 45 + "microchip,mcp4162-104" 46 + "microchip,mcp4231-502" 47 + "microchip,mcp4231-103" 48 + "microchip,mcp4231-503" 49 + "microchip,mcp4231-104" 50 + "microchip,mcp4232-502" 51 + "microchip,mcp4232-103" 52 + "microchip,mcp4232-503" 53 + "microchip,mcp4232-104" 54 + "microchip,mcp4241-502" 55 + "microchip,mcp4241-103" 56 + "microchip,mcp4241-503" 57 + "microchip,mcp4241-104" 58 + "microchip,mcp4242-502" 59 + "microchip,mcp4242-103" 60 + "microchip,mcp4242-503" 61 + "microchip,mcp4242-104" 62 + "microchip,mcp4251-502" 63 + "microchip,mcp4251-103" 64 + "microchip,mcp4251-503" 65 + "microchip,mcp4251-104" 66 + "microchip,mcp4252-502" 67 + "microchip,mcp4252-103" 68 + "microchip,mcp4252-503" 69 + "microchip,mcp4252-104" 70 + "microchip,mcp4261-502" 71 + "microchip,mcp4261-103" 72 + "microchip,mcp4261-503" 73 + "microchip,mcp4261-104" 74 + "microchip,mcp4262-502" 75 + "microchip,mcp4262-103" 76 + "microchip,mcp4262-503" 77 + "microchip,mcp4262-104" 78 + 79 + Example: 80 + mcp4131: mcp4131@0 { 81 + compatible = "mcp4131-502"; 82 + reg = <0>; 83 + spi-max-frequency = <500000>; 84 + };
+19
Documentation/devicetree/bindings/iio/pressure/ms5611.txt
··· 1 + MEAS ms5611 family pressure sensors 2 + 3 + Pressure sensors from MEAS Switzerland with SPI and I2C bus interfaces. 4 + 5 + Required properties: 6 + - compatible: "meas,ms5611" or "meas,ms5607" 7 + - reg: the I2C address or SPI chip select the device will respond to 8 + 9 + Optional properties: 10 + - vdd-supply: an optional regulator that needs to be on to provide VDD 11 + power to the sensor. 12 + 13 + Example: 14 + 15 + ms5607@77 { 16 + compatible = "meas,ms5607"; 17 + reg = <0x77>; 18 + vdd-supply = <&ldo_3v3_gnss>; 19 + };
+1
Documentation/devicetree/bindings/iio/st-sensors.txt
··· 37 37 - st,lsm330-accel 38 38 - st,lsm303agr-accel 39 39 - st,lis2dh12-accel 40 + - st,h3lis331dl-accel 40 41 41 42 Gyroscopes: 42 43 - st,l3g4200d-gyro
+1
Documentation/devicetree/bindings/vendor-prefixes.txt
··· 141 141 lltc Linear Technology Corporation 142 142 marvell Marvell Technology Group Ltd. 143 143 maxim Maxim Integrated Products 144 + meas Measurement Specialties 144 145 mediatek MediaTek Inc. 145 146 melexis Melexis N.V. 146 147 merrii Merrii Technology Co., Ltd.
+1 -1
MAINTAINERS
··· 5538 5538 M: Jonathan Cameron <jic23@kernel.org> 5539 5539 R: Hartmut Knaack <knaack.h@gmx.de> 5540 5540 R: Lars-Peter Clausen <lars@metafoo.de> 5541 - R: Peter Meerwald <pmeerw@pmeerw.net> 5541 + R: Peter Meerwald-Stadler <pmeerw@pmeerw.net> 5542 5542 L: linux-iio@vger.kernel.org 5543 5543 S: Maintained 5544 5544 F: drivers/iio/
+3 -2
drivers/iio/accel/Kconfig
··· 64 64 help 65 65 Say yes here to build support for STMicroelectronics accelerometers: 66 66 LSM303DLH, LSM303DLHC, LIS3DH, LSM330D, LSM330DL, LSM330DLC, 67 - LIS331DLH, LSM303DL, LSM303DLM, LSM330, LIS2DH12. 67 + LIS331DLH, LSM303DL, LSM303DLM, LSM330, LIS2DH12, H3LIS331DL. 68 68 69 69 This driver can also be built as a module. If so, these modules 70 70 will be created: ··· 143 143 select IIO_TRIGGERED_BUFFER 144 144 help 145 145 Say yes here to build support for the following Freescale 3-axis 146 - accelerometers: MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC. 146 + accelerometers: MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC, 147 + FXLS8471Q. 147 148 148 149 To compile this driver as a module, choose M here: the module 149 150 will be called mma8452.
+14 -15
drivers/iio/accel/bmc150-accel-core.c
··· 25 25 #include <linux/delay.h> 26 26 #include <linux/slab.h> 27 27 #include <linux/acpi.h> 28 - #include <linux/gpio/consumer.h> 29 28 #include <linux/pm.h> 30 29 #include <linux/pm_runtime.h> 31 30 #include <linux/iio/iio.h> ··· 137 138 AXIS_X, 138 139 AXIS_Y, 139 140 AXIS_Z, 141 + AXIS_MAX, 140 142 }; 141 143 142 144 enum bmc150_power_modes { ··· 246 246 {500000, BMC150_ACCEL_SLEEP_500_MS}, 247 247 {1000000, BMC150_ACCEL_SLEEP_1_SEC} }; 248 248 249 - static const struct regmap_config bmc150_i2c_regmap_conf = { 249 + const struct regmap_config bmc150_regmap_conf = { 250 250 .reg_bits = 8, 251 251 .val_bits = 8, 252 252 .max_register = 0x3f, 253 253 }; 254 + EXPORT_SYMBOL_GPL(bmc150_regmap_conf); 254 255 255 256 static int bmc150_accel_set_mode(struct bmc150_accel_data *data, 256 257 enum bmc150_power_modes mode, ··· 989 988 .realbits = (bits), \ 990 989 .storagebits = 16, \ 991 990 .shift = 16 - (bits), \ 991 + .endianness = IIO_LE, \ 992 992 }, \ 993 993 .event_spec = &bmc150_accel_event, \ 994 994 .num_event_specs = 1 \ ··· 1106 1104 .driver_module = THIS_MODULE, 1107 1105 }; 1108 1106 1107 + static const unsigned long bmc150_accel_scan_masks[] = { 1108 + BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z), 1109 + 0}; 1110 + 1109 1111 static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p) 1110 1112 { 1111 1113 struct iio_poll_func *pf = p; 1112 1114 struct iio_dev *indio_dev = pf->indio_dev; 1113 1115 struct bmc150_accel_data *data = iio_priv(indio_dev); 1114 - int bit, ret, i = 0; 1115 - unsigned int raw_val; 1116 + int ret; 1116 1117 1117 1118 mutex_lock(&data->mutex); 1118 - for_each_set_bit(bit, indio_dev->active_scan_mask, 1119 - indio_dev->masklength) { 1120 - ret = regmap_bulk_read(data->regmap, 1121 - BMC150_ACCEL_AXIS_TO_REG(bit), &raw_val, 1122 - 2); 1123 - if (ret < 0) { 1124 - mutex_unlock(&data->mutex); 1125 - goto err_read; 1126 - } 1127 - data->buffer[i++] = raw_val; 1128 - } 1119 + ret = regmap_bulk_read(data->regmap, BMC150_ACCEL_REG_XOUT_L, 1120 + data->buffer, AXIS_MAX * 2); 1129 1121 mutex_unlock(&data->mutex); 1122 + if (ret < 0) 1123 + goto err_read; 1130 1124 1131 1125 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 1132 1126 pf->timestamp); ··· 1572 1574 indio_dev->channels = data->chip_info->channels; 1573 1575 indio_dev->num_channels = data->chip_info->num_channels; 1574 1576 indio_dev->name = name ? name : data->chip_info->name; 1577 + indio_dev->available_scan_masks = bmc150_accel_scan_masks; 1575 1578 indio_dev->modes = INDIO_DIRECT_MODE; 1576 1579 indio_dev->info = &bmc150_accel_info; 1577 1580
+1 -6
drivers/iio/accel/bmc150-accel-i2c.c
··· 28 28 29 29 #include "bmc150-accel.h" 30 30 31 - static const struct regmap_config bmc150_i2c_regmap_conf = { 32 - .reg_bits = 8, 33 - .val_bits = 8, 34 - }; 35 - 36 31 static int bmc150_accel_probe(struct i2c_client *client, 37 32 const struct i2c_device_id *id) 38 33 { ··· 38 43 i2c_check_functionality(client->adapter, 39 44 I2C_FUNC_SMBUS_READ_I2C_BLOCK); 40 45 41 - regmap = devm_regmap_init_i2c(client, &bmc150_i2c_regmap_conf); 46 + regmap = devm_regmap_init_i2c(client, &bmc150_regmap_conf); 42 47 if (IS_ERR(regmap)) { 43 48 dev_err(&client->dev, "Failed to initialize i2c regmap\n"); 44 49 return PTR_ERR(regmap);
+1 -7
drivers/iio/accel/bmc150-accel-spi.c
··· 25 25 26 26 #include "bmc150-accel.h" 27 27 28 - static const struct regmap_config bmc150_spi_regmap_conf = { 29 - .reg_bits = 8, 30 - .val_bits = 8, 31 - .max_register = 0x3f, 32 - }; 33 - 34 28 static int bmc150_accel_probe(struct spi_device *spi) 35 29 { 36 30 struct regmap *regmap; 37 31 const struct spi_device_id *id = spi_get_device_id(spi); 38 32 39 - regmap = devm_regmap_init_spi(spi, &bmc150_spi_regmap_conf); 33 + regmap = devm_regmap_init_spi(spi, &bmc150_regmap_conf); 40 34 if (IS_ERR(regmap)) { 41 35 dev_err(&spi->dev, "Failed to initialize spi regmap\n"); 42 36 return PTR_ERR(regmap);
+1
drivers/iio/accel/bmc150-accel.h
··· 16 16 const char *name, bool block_supported); 17 17 int bmc150_accel_core_remove(struct device *dev); 18 18 extern const struct dev_pm_ops bmc150_accel_pm_ops; 19 + extern const struct regmap_config bmc150_regmap_conf; 19 20 20 21 #endif /* _BMC150_ACCEL_H_ */
+12 -13
drivers/iio/accel/kxcjk-1013.c
··· 20 20 #include <linux/slab.h> 21 21 #include <linux/string.h> 22 22 #include <linux/acpi.h> 23 - #include <linux/gpio/consumer.h> 24 23 #include <linux/pm.h> 25 24 #include <linux/pm_runtime.h> 26 25 #include <linux/iio/iio.h> ··· 114 115 AXIS_X, 115 116 AXIS_Y, 116 117 AXIS_Z, 118 + AXIS_MAX, 117 119 }; 118 120 119 121 enum kxcjk1013_mode { ··· 922 922 .realbits = 12, \ 923 923 .storagebits = 16, \ 924 924 .shift = 4, \ 925 - .endianness = IIO_CPU, \ 925 + .endianness = IIO_LE, \ 926 926 }, \ 927 927 .event_spec = &kxcjk1013_event, \ 928 928 .num_event_specs = 1 \ ··· 953 953 .driver_module = THIS_MODULE, 954 954 }; 955 955 956 + static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 957 + 956 958 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 957 959 { 958 960 struct iio_poll_func *pf = p; 959 961 struct iio_dev *indio_dev = pf->indio_dev; 960 962 struct kxcjk1013_data *data = iio_priv(indio_dev); 961 - int bit, ret, i = 0; 963 + int ret; 962 964 963 965 mutex_lock(&data->mutex); 964 - 965 - for_each_set_bit(bit, indio_dev->active_scan_mask, 966 - indio_dev->masklength) { 967 - ret = kxcjk1013_get_acc_reg(data, bit); 968 - if (ret < 0) { 969 - mutex_unlock(&data->mutex); 970 - goto err; 971 - } 972 - data->buffer[i++] = ret; 973 - } 966 + ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 967 + KXCJK1013_REG_XOUT_L, 968 + AXIS_MAX * 2, 969 + (u8 *)data->buffer); 974 970 mutex_unlock(&data->mutex); 971 + if (ret < 0) 972 + goto err; 975 973 976 974 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 977 975 data->timestamp); ··· 1202 1204 indio_dev->dev.parent = &client->dev; 1203 1205 indio_dev->channels = kxcjk1013_channels; 1204 1206 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1207 + indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1205 1208 indio_dev->name = name; 1206 1209 indio_dev->modes = INDIO_DIRECT_MODE; 1207 1210 indio_dev->info = &kxcjk1013_info;
+167 -21
drivers/iio/accel/mma8452.c
··· 6 6 * MMA8453Q (10 bit) 7 7 * MMA8652FC (12 bit) 8 8 * MMA8653FC (10 bit) 9 + * FXLS8471Q (14 bit) 9 10 * 10 11 * Copyright 2015 Martin Kepplinger <martin.kepplinger@theobroma-systems.com> 11 12 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net> ··· 17 16 * 18 17 * 7-bit I2C slave address 0x1c/0x1d (pin selectable) 19 18 * 20 - * TODO: orientation events, autosleep 19 + * TODO: orientation events 21 20 */ 22 21 23 22 #include <linux/module.h> ··· 32 31 #include <linux/delay.h> 33 32 #include <linux/of_device.h> 34 33 #include <linux/of_irq.h> 34 + #include <linux/pm_runtime.h> 35 35 36 36 #define MMA8452_STATUS 0x00 37 37 #define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0)) ··· 93 91 #define MMA8453_DEVICE_ID 0x3a 94 92 #define MMA8652_DEVICE_ID 0x4a 95 93 #define MMA8653_DEVICE_ID 0x5a 94 + #define FXLS8471_DEVICE_ID 0x6a 95 + 96 + #define MMA8452_AUTO_SUSPEND_DELAY_MS 2000 96 97 97 98 struct mma8452_data { 98 99 struct i2c_client *client; ··· 177 172 return -EIO; 178 173 } 179 174 175 + static int mma8452_set_runtime_pm_state(struct i2c_client *client, bool on) 176 + { 177 + #ifdef CONFIG_PM 178 + int ret; 179 + 180 + if (on) { 181 + ret = pm_runtime_get_sync(&client->dev); 182 + } else { 183 + pm_runtime_mark_last_busy(&client->dev); 184 + ret = pm_runtime_put_autosuspend(&client->dev); 185 + } 186 + 187 + if (ret < 0) { 188 + dev_err(&client->dev, 189 + "failed to change power state to %d\n", on); 190 + if (on) 191 + pm_runtime_put_noidle(&client->dev); 192 + 193 + return ret; 194 + } 195 + #endif 196 + 197 + return 0; 198 + } 199 + 180 200 static int mma8452_read(struct mma8452_data *data, __be16 buf[3]) 181 201 { 182 202 int ret = mma8452_drdy(data); ··· 209 179 if (ret < 0) 210 180 return ret; 211 181 212 - return i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X, 213 - 3 * sizeof(__be16), (u8 *)buf); 182 + ret = mma8452_set_runtime_pm_state(data->client, true); 183 + if (ret) 184 + return ret; 185 + 186 + ret = i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X, 187 + 3 * sizeof(__be16), (u8 *)buf); 188 + 189 + ret = mma8452_set_runtime_pm_state(data->client, false); 190 + 191 + return ret; 214 192 } 215 193 216 194 static ssize_t mma8452_show_int_plus_micros(char *buf, const int (*vals)[2], ··· 395 357 return IIO_VAL_INT_PLUS_MICRO; 396 358 case IIO_CHAN_INFO_CALIBBIAS: 397 359 ret = i2c_smbus_read_byte_data(data->client, 398 - MMA8452_OFF_X + chan->scan_index); 360 + MMA8452_OFF_X + 361 + chan->scan_index); 399 362 if (ret < 0) 400 363 return ret; 401 364 ··· 431 392 data->ctrl_reg1); 432 393 } 433 394 395 + /* returns >0 if active, 0 if in standby and <0 on error */ 396 + static int mma8452_is_active(struct mma8452_data *data) 397 + { 398 + int reg; 399 + 400 + reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG1); 401 + if (reg < 0) 402 + return reg; 403 + 404 + return reg & MMA8452_CTRL_ACTIVE; 405 + } 406 + 434 407 static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val) 435 408 { 436 409 int ret; 410 + int is_active; 437 411 438 412 mutex_lock(&data->lock); 439 413 440 - /* config can only be changed when in standby */ 441 - ret = mma8452_standby(data); 442 - if (ret < 0) 414 + is_active = mma8452_is_active(data); 415 + if (is_active < 0) { 416 + ret = is_active; 443 417 goto fail; 418 + } 419 + 420 + /* config can only be changed when in standby */ 421 + if (is_active > 0) { 422 + ret = mma8452_standby(data); 423 + if (ret < 0) 424 + goto fail; 425 + } 444 426 445 427 ret = i2c_smbus_write_byte_data(data->client, reg, val); 446 428 if (ret < 0) 447 429 goto fail; 448 430 449 - ret = mma8452_active(data); 450 - if (ret < 0) 451 - goto fail; 431 + if (is_active > 0) { 432 + ret = mma8452_active(data); 433 + if (ret < 0) 434 + goto fail; 435 + } 452 436 453 437 ret = 0; 454 438 fail: ··· 480 418 return ret; 481 419 } 482 420 483 - /* returns >0 if in freefall mode, 0 if not or <0 if an error occured */ 421 + /* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */ 484 422 static int mma8452_freefall_mode_enabled(struct mma8452_data *data) 485 423 { 486 424 int val; ··· 730 668 if (ret < 0) 731 669 return ret; 732 670 733 - return !!(ret & BIT(chan->scan_index + chip->ev_cfg_chan_shift)); 671 + return !!(ret & BIT(chan->scan_index + 672 + chip->ev_cfg_chan_shift)); 734 673 default: 735 674 return -EINVAL; 736 675 } ··· 745 682 { 746 683 struct mma8452_data *data = iio_priv(indio_dev); 747 684 const struct mma_chip_info *chip = data->chip_info; 748 - int val; 685 + int val, ret; 686 + 687 + ret = mma8452_set_runtime_pm_state(data->client, state); 688 + if (ret) 689 + return ret; 749 690 750 691 switch (dir) { 751 692 case IIO_EV_DIR_FALLING: ··· 1057 990 mma8453, 1058 991 mma8652, 1059 992 mma8653, 993 + fxls8471, 1060 994 }; 1061 995 1062 996 static const struct mma_chip_info mma_chip_info_table[] = { ··· 1071 1003 * bit. 1072 1004 * The userspace interface uses m/s^2 and we declare micro units 1073 1005 * So scale factor for 12 bit here is given by: 1074 - * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665 1006 + * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665 1075 1007 */ 1076 1008 .mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} }, 1077 1009 .ev_cfg = MMA8452_TRANSIENT_CFG, ··· 1149 1081 .ev_ths_mask = MMA8452_FF_MT_THS_MASK, 1150 1082 .ev_count = MMA8452_FF_MT_COUNT, 1151 1083 }, 1084 + [fxls8471] = { 1085 + .chip_id = FXLS8471_DEVICE_ID, 1086 + .channels = mma8451_channels, 1087 + .num_channels = ARRAY_SIZE(mma8451_channels), 1088 + .mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} }, 1089 + .ev_cfg = MMA8452_TRANSIENT_CFG, 1090 + .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE, 1091 + .ev_cfg_chan_shift = 1, 1092 + .ev_src = MMA8452_TRANSIENT_SRC, 1093 + .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE, 1094 + .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE, 1095 + .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE, 1096 + .ev_ths = MMA8452_TRANSIENT_THS, 1097 + .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK, 1098 + .ev_count = MMA8452_TRANSIENT_COUNT, 1099 + }, 1152 1100 }; 1153 1101 1154 1102 static struct attribute *mma8452_attributes[] = { ··· 1198 1114 { 1199 1115 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1200 1116 struct mma8452_data *data = iio_priv(indio_dev); 1201 - int reg; 1117 + int reg, ret; 1118 + 1119 + ret = mma8452_set_runtime_pm_state(data->client, state); 1120 + if (ret) 1121 + return ret; 1202 1122 1203 1123 reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG4); 1204 1124 if (reg < 0) ··· 1294 1206 { .compatible = "fsl,mma8453", .data = &mma_chip_info_table[mma8453] }, 1295 1207 { .compatible = "fsl,mma8652", .data = &mma_chip_info_table[mma8652] }, 1296 1208 { .compatible = "fsl,mma8653", .data = &mma_chip_info_table[mma8653] }, 1209 + { .compatible = "fsl,fxls8471", .data = &mma_chip_info_table[fxls8471] }, 1297 1210 { } 1298 1211 }; 1299 1212 MODULE_DEVICE_TABLE(of, mma8452_dt_ids); ··· 1332 1243 case MMA8453_DEVICE_ID: 1333 1244 case MMA8652_DEVICE_ID: 1334 1245 case MMA8653_DEVICE_ID: 1246 + case FXLS8471_DEVICE_ID: 1335 1247 if (ret == data->chip_info->chip_id) 1336 1248 break; 1337 1249 default: ··· 1430 1340 goto buffer_cleanup; 1431 1341 } 1432 1342 1343 + ret = pm_runtime_set_active(&client->dev); 1344 + if (ret < 0) 1345 + goto buffer_cleanup; 1346 + 1347 + pm_runtime_enable(&client->dev); 1348 + pm_runtime_set_autosuspend_delay(&client->dev, 1349 + MMA8452_AUTO_SUSPEND_DELAY_MS); 1350 + pm_runtime_use_autosuspend(&client->dev); 1351 + 1433 1352 ret = iio_device_register(indio_dev); 1434 1353 if (ret < 0) 1435 1354 goto buffer_cleanup; ··· 1463 1364 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1464 1365 1465 1366 iio_device_unregister(indio_dev); 1367 + 1368 + pm_runtime_disable(&client->dev); 1369 + pm_runtime_set_suspended(&client->dev); 1370 + pm_runtime_put_noidle(&client->dev); 1371 + 1466 1372 iio_triggered_buffer_cleanup(indio_dev); 1467 1373 mma8452_trigger_cleanup(indio_dev); 1468 1374 mma8452_standby(iio_priv(indio_dev)); 1469 1375 1470 1376 return 0; 1471 1377 } 1378 + 1379 + #ifdef CONFIG_PM 1380 + static int mma8452_runtime_suspend(struct device *dev) 1381 + { 1382 + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1383 + struct mma8452_data *data = iio_priv(indio_dev); 1384 + int ret; 1385 + 1386 + mutex_lock(&data->lock); 1387 + ret = mma8452_standby(data); 1388 + mutex_unlock(&data->lock); 1389 + if (ret < 0) { 1390 + dev_err(&data->client->dev, "powering off device failed\n"); 1391 + return -EAGAIN; 1392 + } 1393 + 1394 + return 0; 1395 + } 1396 + 1397 + static int mma8452_runtime_resume(struct device *dev) 1398 + { 1399 + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1400 + struct mma8452_data *data = iio_priv(indio_dev); 1401 + int ret, sleep_val; 1402 + 1403 + ret = mma8452_active(data); 1404 + if (ret < 0) 1405 + return ret; 1406 + 1407 + ret = mma8452_get_odr_index(data); 1408 + sleep_val = 1000 / mma8452_samp_freq[ret][0]; 1409 + if (sleep_val < 20) 1410 + usleep_range(sleep_val * 1000, 20000); 1411 + else 1412 + msleep_interruptible(sleep_val); 1413 + 1414 + return 0; 1415 + } 1416 + #endif 1472 1417 1473 1418 #ifdef CONFIG_PM_SLEEP 1474 1419 static int mma8452_suspend(struct device *dev) ··· 1526 1383 return mma8452_active(iio_priv(i2c_get_clientdata( 1527 1384 to_i2c_client(dev)))); 1528 1385 } 1529 - 1530 - static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume); 1531 - #define MMA8452_PM_OPS (&mma8452_pm_ops) 1532 - #else 1533 - #define MMA8452_PM_OPS NULL 1534 1386 #endif 1535 1387 1388 + static const struct dev_pm_ops mma8452_pm_ops = { 1389 + SET_SYSTEM_SLEEP_PM_OPS(mma8452_suspend, mma8452_resume) 1390 + SET_RUNTIME_PM_OPS(mma8452_runtime_suspend, 1391 + mma8452_runtime_resume, NULL) 1392 + }; 1393 + 1536 1394 static const struct i2c_device_id mma8452_id[] = { 1395 + { "mma8451", mma8451 }, 1537 1396 { "mma8452", mma8452 }, 1538 1397 { "mma8453", mma8453 }, 1539 1398 { "mma8652", mma8652 }, 1540 1399 { "mma8653", mma8653 }, 1400 + { "fxls8471", fxls8471 }, 1541 1401 { } 1542 1402 }; 1543 1403 MODULE_DEVICE_TABLE(i2c, mma8452_id); ··· 1549 1403 .driver = { 1550 1404 .name = "mma8452", 1551 1405 .of_match_table = of_match_ptr(mma8452_dt_ids), 1552 - .pm = MMA8452_PM_OPS, 1406 + .pm = &mma8452_pm_ops, 1553 1407 }, 1554 1408 .probe = mma8452_probe, 1555 1409 .remove = mma8452_remove,
-1
drivers/iio/accel/mma9553.c
··· 17 17 #include <linux/interrupt.h> 18 18 #include <linux/slab.h> 19 19 #include <linux/acpi.h> 20 - #include <linux/gpio/consumer.h> 21 20 #include <linux/iio/iio.h> 22 21 #include <linux/iio/sysfs.h> 23 22 #include <linux/iio/events.h>
-29
drivers/iio/accel/mxc4005.c
··· 17 17 #include <linux/i2c.h> 18 18 #include <linux/iio/iio.h> 19 19 #include <linux/acpi.h> 20 - #include <linux/gpio/consumer.h> 21 20 #include <linux/regmap.h> 22 21 #include <linux/iio/sysfs.h> 23 22 #include <linux/iio/trigger.h> ··· 379 380 .owner = THIS_MODULE, 380 381 }; 381 382 382 - static int mxc4005_gpio_probe(struct i2c_client *client, 383 - struct mxc4005_data *data) 384 - { 385 - struct device *dev; 386 - struct gpio_desc *gpio; 387 - int ret; 388 - 389 - if (!client) 390 - return -EINVAL; 391 - 392 - dev = &client->dev; 393 - 394 - gpio = devm_gpiod_get_index(dev, "mxc4005_int", 0, GPIOD_IN); 395 - if (IS_ERR(gpio)) { 396 - dev_err(dev, "failed to get acpi gpio index\n"); 397 - return PTR_ERR(gpio); 398 - } 399 - 400 - ret = gpiod_to_irq(gpio); 401 - 402 - dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret); 403 - 404 - return ret; 405 - } 406 - 407 383 static int mxc4005_chip_init(struct mxc4005_data *data) 408 384 { 409 385 int ret; ··· 443 469 "failed to setup iio triggered buffer\n"); 444 470 return ret; 445 471 } 446 - 447 - if (client->irq < 0) 448 - client->irq = mxc4005_gpio_probe(client, data); 449 472 450 473 if (client->irq > 0) { 451 474 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
+1
drivers/iio/accel/st_accel.h
··· 14 14 #include <linux/types.h> 15 15 #include <linux/iio/common/st_sensors.h> 16 16 17 + #define H3LIS331DL_DRIVER_NAME "h3lis331dl_accel" 17 18 #define LIS3LV02DL_ACCEL_DEV_NAME "lis3lv02dl_accel" 18 19 #define LSM303DLHC_ACCEL_DEV_NAME "lsm303dlhc_accel" 19 20 #define LIS3DH_ACCEL_DEV_NAME "lis3dh"
+92
drivers/iio/accel/st_accel_core.c
··· 39 39 #define ST_ACCEL_FS_AVL_6G 6 40 40 #define ST_ACCEL_FS_AVL_8G 8 41 41 #define ST_ACCEL_FS_AVL_16G 16 42 + #define ST_ACCEL_FS_AVL_100G 100 43 + #define ST_ACCEL_FS_AVL_200G 200 44 + #define ST_ACCEL_FS_AVL_400G 400 42 45 43 46 /* CUSTOM VALUES FOR SENSOR 1 */ 44 47 #define ST_ACCEL_1_WAI_EXP 0x33 ··· 183 180 #define ST_ACCEL_5_IG1_EN_ADDR 0x21 184 181 #define ST_ACCEL_5_IG1_EN_MASK 0x08 185 182 #define ST_ACCEL_5_MULTIREAD_BIT false 183 + 184 + /* CUSTOM VALUES FOR SENSOR 6 */ 185 + #define ST_ACCEL_6_WAI_EXP 0x32 186 + #define ST_ACCEL_6_ODR_ADDR 0x20 187 + #define ST_ACCEL_6_ODR_MASK 0x18 188 + #define ST_ACCEL_6_ODR_AVL_50HZ_VAL 0x00 189 + #define ST_ACCEL_6_ODR_AVL_100HZ_VAL 0x01 190 + #define ST_ACCEL_6_ODR_AVL_400HZ_VAL 0x02 191 + #define ST_ACCEL_6_ODR_AVL_1000HZ_VAL 0x03 192 + #define ST_ACCEL_6_PW_ADDR 0x20 193 + #define ST_ACCEL_6_PW_MASK 0x20 194 + #define ST_ACCEL_6_FS_ADDR 0x23 195 + #define ST_ACCEL_6_FS_MASK 0x30 196 + #define ST_ACCEL_6_FS_AVL_100_VAL 0x00 197 + #define ST_ACCEL_6_FS_AVL_200_VAL 0x01 198 + #define ST_ACCEL_6_FS_AVL_400_VAL 0x03 199 + #define ST_ACCEL_6_FS_AVL_100_GAIN IIO_G_TO_M_S_2(49000) 200 + #define ST_ACCEL_6_FS_AVL_200_GAIN IIO_G_TO_M_S_2(98000) 201 + #define ST_ACCEL_6_FS_AVL_400_GAIN IIO_G_TO_M_S_2(195000) 202 + #define ST_ACCEL_6_BDU_ADDR 0x23 203 + #define ST_ACCEL_6_BDU_MASK 0x80 204 + #define ST_ACCEL_6_DRDY_IRQ_ADDR 0x22 205 + #define ST_ACCEL_6_DRDY_IRQ_INT1_MASK 0x02 206 + #define ST_ACCEL_6_DRDY_IRQ_INT2_MASK 0x10 207 + #define ST_ACCEL_6_IHL_IRQ_ADDR 0x22 208 + #define ST_ACCEL_6_IHL_IRQ_MASK 0x80 209 + #define ST_ACCEL_6_MULTIREAD_BIT true 186 210 187 211 static const struct iio_chan_spec st_accel_8bit_channels[] = { 188 212 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ··· 586 556 }, 587 557 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT, 588 558 .bootime = 2, /* guess */ 559 + }, 560 + { 561 + .wai = ST_ACCEL_6_WAI_EXP, 562 + .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 563 + .sensors_supported = { 564 + [0] = H3LIS331DL_DRIVER_NAME, 565 + }, 566 + .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 567 + .odr = { 568 + .addr = ST_ACCEL_6_ODR_ADDR, 569 + .mask = ST_ACCEL_6_ODR_MASK, 570 + .odr_avl = { 571 + { 50, ST_ACCEL_6_ODR_AVL_50HZ_VAL }, 572 + { 100, ST_ACCEL_6_ODR_AVL_100HZ_VAL, }, 573 + { 400, ST_ACCEL_6_ODR_AVL_400HZ_VAL, }, 574 + { 1000, ST_ACCEL_6_ODR_AVL_1000HZ_VAL, }, 575 + }, 576 + }, 577 + .pw = { 578 + .addr = ST_ACCEL_6_PW_ADDR, 579 + .mask = ST_ACCEL_6_PW_MASK, 580 + .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 581 + .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 582 + }, 583 + .enable_axis = { 584 + .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 585 + .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 586 + }, 587 + .fs = { 588 + .addr = ST_ACCEL_6_FS_ADDR, 589 + .mask = ST_ACCEL_6_FS_MASK, 590 + .fs_avl = { 591 + [0] = { 592 + .num = ST_ACCEL_FS_AVL_100G, 593 + .value = ST_ACCEL_6_FS_AVL_100_VAL, 594 + .gain = ST_ACCEL_6_FS_AVL_100_GAIN, 595 + }, 596 + [1] = { 597 + .num = ST_ACCEL_FS_AVL_200G, 598 + .value = ST_ACCEL_6_FS_AVL_200_VAL, 599 + .gain = ST_ACCEL_6_FS_AVL_200_GAIN, 600 + }, 601 + [2] = { 602 + .num = ST_ACCEL_FS_AVL_400G, 603 + .value = ST_ACCEL_6_FS_AVL_400_VAL, 604 + .gain = ST_ACCEL_6_FS_AVL_400_GAIN, 605 + }, 606 + }, 607 + }, 608 + .bdu = { 609 + .addr = ST_ACCEL_6_BDU_ADDR, 610 + .mask = ST_ACCEL_6_BDU_MASK, 611 + }, 612 + .drdy_irq = { 613 + .addr = ST_ACCEL_6_DRDY_IRQ_ADDR, 614 + .mask_int1 = ST_ACCEL_6_DRDY_IRQ_INT1_MASK, 615 + .mask_int2 = ST_ACCEL_6_DRDY_IRQ_INT2_MASK, 616 + .addr_ihl = ST_ACCEL_6_IHL_IRQ_ADDR, 617 + .mask_ihl = ST_ACCEL_6_IHL_IRQ_MASK, 618 + }, 619 + .multi_read_bit = ST_ACCEL_6_MULTIREAD_BIT, 620 + .bootime = 2, 589 621 }, 590 622 }; 591 623
+4
drivers/iio/accel/st_accel_i2c.c
··· 76 76 .compatible = "st,lis2dh12-accel", 77 77 .data = LIS2DH12_ACCEL_DEV_NAME, 78 78 }, 79 + { 80 + .compatible = "st,h3lis331dl-accel", 81 + .data = H3LIS331DL_DRIVER_NAME, 82 + }, 79 83 {}, 80 84 }; 81 85 MODULE_DEVICE_TABLE(of, st_accel_of_match);
-1
drivers/iio/accel/stk8312.c
··· 11 11 */ 12 12 13 13 #include <linux/acpi.h> 14 - #include <linux/gpio/consumer.h> 15 14 #include <linux/i2c.h> 16 15 #include <linux/interrupt.h> 17 16 #include <linux/kernel.h>
-1
drivers/iio/accel/stk8ba50.c
··· 11 11 */ 12 12 13 13 #include <linux/acpi.h> 14 - #include <linux/gpio/consumer.h> 15 14 #include <linux/i2c.h> 16 15 #include <linux/interrupt.h> 17 16 #include <linux/kernel.h>
+11
drivers/iio/adc/Kconfig
··· 134 134 config AT91_SAMA5D2_ADC 135 135 tristate "Atmel AT91 SAMA5D2 ADC" 136 136 depends on ARCH_AT91 || COMPILE_TEST 137 + depends on HAS_IOMEM 137 138 help 138 139 Say yes here to build support for Atmel SAMA5D2 ADC which is 139 140 available on SAMA5D2 SoC family. ··· 241 240 242 241 To compile this driver as a module, choose M here: the module will be 243 242 called lp8788_adc. 243 + 244 + config LPC18XX_ADC 245 + tristate "NXP LPC18xx ADC driver" 246 + depends on ARCH_LPC18XX || COMPILE_TEST 247 + depends on OF && HAS_IOMEM 248 + help 249 + Say yes here to build support for NXP LPC18XX ADC. 250 + 251 + To compile this driver as a module, choose M here: the module will be 252 + called lpc18xx_adc. 244 253 245 254 config MAX1027 246 255 tristate "Maxim max1027 ADC driver"
+1
drivers/iio/adc/Makefile
··· 25 25 obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o 26 26 obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o 27 27 obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o 28 + obj-$(CONFIG_LPC18XX_ADC) += lpc18xx_adc.o 28 29 obj-$(CONFIG_MAX1027) += max1027.o 29 30 obj-$(CONFIG_MAX1363) += max1363.o 30 31 obj-$(CONFIG_MCP320X) += mcp320x.o
+74 -28
drivers/iio/adc/at91-sama5d2_adc.c
··· 66 66 #define AT91_SAMA5D2_MR_PRESCAL(v) ((v) << AT91_SAMA5D2_MR_PRESCAL_OFFSET) 67 67 #define AT91_SAMA5D2_MR_PRESCAL_OFFSET 8 68 68 #define AT91_SAMA5D2_MR_PRESCAL_MAX 0xff 69 + #define AT91_SAMA5D2_MR_PRESCAL_MASK GENMASK(15, 8) 69 70 /* Startup Time */ 70 71 #define AT91_SAMA5D2_MR_STARTUP(v) ((v) << 16) 72 + #define AT91_SAMA5D2_MR_STARTUP_MASK GENMASK(19, 16) 71 73 /* Analog Change */ 72 74 #define AT91_SAMA5D2_MR_ANACH BIT(23) 73 75 /* Tracking Time */ ··· 94 92 /* Last Converted Data Register */ 95 93 #define AT91_SAMA5D2_LCDR 0x20 96 94 /* Interrupt Enable Register */ 97 - #define AT91_SAMA5D2_IER 0x24 95 + #define AT91_SAMA5D2_IER 0x24 98 96 /* Interrupt Disable Register */ 99 - #define AT91_SAMA5D2_IDR 0x28 97 + #define AT91_SAMA5D2_IDR 0x28 100 98 /* Interrupt Mask Register */ 101 - #define AT91_SAMA5D2_IMR 0x2c 99 + #define AT91_SAMA5D2_IMR 0x2c 102 100 /* Interrupt Status Register */ 103 - #define AT91_SAMA5D2_ISR 0x30 101 + #define AT91_SAMA5D2_ISR 0x30 104 102 /* Last Channel Trigger Mode Register */ 105 103 #define AT91_SAMA5D2_LCTMR 0x34 106 104 /* Last Channel Compare Window Register */ ··· 108 106 /* Overrun Status Register */ 109 107 #define AT91_SAMA5D2_OVER 0x3c 110 108 /* Extended Mode Register */ 111 - #define AT91_SAMA5D2_EMR 0x40 109 + #define AT91_SAMA5D2_EMR 0x40 112 110 /* Compare Window Register */ 113 - #define AT91_SAMA5D2_CWR 0x44 111 + #define AT91_SAMA5D2_CWR 0x44 114 112 /* Channel Gain Register */ 115 - #define AT91_SAMA5D2_CGR 0x48 113 + #define AT91_SAMA5D2_CGR 0x48 114 + 116 115 /* Channel Offset Register */ 117 - #define AT91_SAMA5D2_COR 0x4c 116 + #define AT91_SAMA5D2_COR 0x4c 117 + #define AT91_SAMA5D2_COR_DIFF_OFFSET 16 118 + 118 119 /* Channel Data Register 0 */ 119 120 #define AT91_SAMA5D2_CDR0 0x50 120 121 /* Analog Control Register */ 121 - #define AT91_SAMA5D2_ACR 0x94 122 + #define AT91_SAMA5D2_ACR 0x94 122 123 /* Touchscreen Mode Register */ 123 124 #define AT91_SAMA5D2_TSMR 0xb0 124 125 /* Touchscreen X Position Register */ ··· 135 130 /* Correction Select Register */ 136 131 #define AT91_SAMA5D2_COSR 0xd0 137 132 /* Correction Value Register */ 138 - #define AT91_SAMA5D2_CVR 0xd4 133 + #define AT91_SAMA5D2_CVR 0xd4 139 134 /* Channel Error Correction Register */ 140 135 #define AT91_SAMA5D2_CECR 0xd8 141 136 /* Write Protection Mode Register */ ··· 145 140 /* Version Register */ 146 141 #define AT91_SAMA5D2_VERSION 0xfc 147 142 148 - #define AT91_AT91_SAMA5D2_CHAN(num, addr) \ 143 + #define AT91_SAMA5D2_CHAN_SINGLE(num, addr) \ 149 144 { \ 150 145 .type = IIO_VOLTAGE, \ 151 146 .channel = num, \ ··· 158 153 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 159 154 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ 160 155 .datasheet_name = "CH"#num, \ 156 + .indexed = 1, \ 157 + } 158 + 159 + #define AT91_SAMA5D2_CHAN_DIFF(num, num2, addr) \ 160 + { \ 161 + .type = IIO_VOLTAGE, \ 162 + .differential = 1, \ 163 + .channel = num, \ 164 + .channel2 = num2, \ 165 + .address = addr, \ 166 + .scan_type = { \ 167 + .sign = 's', \ 168 + .realbits = 12, \ 169 + }, \ 170 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 171 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 172 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ 173 + .datasheet_name = "CH"#num"-CH"#num2, \ 161 174 .indexed = 1, \ 162 175 } 163 176 ··· 208 185 }; 209 186 210 187 static const struct iio_chan_spec at91_adc_channels[] = { 211 - AT91_AT91_SAMA5D2_CHAN(0, 0x50), 212 - AT91_AT91_SAMA5D2_CHAN(1, 0x54), 213 - AT91_AT91_SAMA5D2_CHAN(2, 0x58), 214 - AT91_AT91_SAMA5D2_CHAN(3, 0x5c), 215 - AT91_AT91_SAMA5D2_CHAN(4, 0x60), 216 - AT91_AT91_SAMA5D2_CHAN(5, 0x64), 217 - AT91_AT91_SAMA5D2_CHAN(6, 0x68), 218 - AT91_AT91_SAMA5D2_CHAN(7, 0x6c), 219 - AT91_AT91_SAMA5D2_CHAN(8, 0x70), 220 - AT91_AT91_SAMA5D2_CHAN(9, 0x74), 221 - AT91_AT91_SAMA5D2_CHAN(10, 0x78), 222 - AT91_AT91_SAMA5D2_CHAN(11, 0x7c), 188 + AT91_SAMA5D2_CHAN_SINGLE(0, 0x50), 189 + AT91_SAMA5D2_CHAN_SINGLE(1, 0x54), 190 + AT91_SAMA5D2_CHAN_SINGLE(2, 0x58), 191 + AT91_SAMA5D2_CHAN_SINGLE(3, 0x5c), 192 + AT91_SAMA5D2_CHAN_SINGLE(4, 0x60), 193 + AT91_SAMA5D2_CHAN_SINGLE(5, 0x64), 194 + AT91_SAMA5D2_CHAN_SINGLE(6, 0x68), 195 + AT91_SAMA5D2_CHAN_SINGLE(7, 0x6c), 196 + AT91_SAMA5D2_CHAN_SINGLE(8, 0x70), 197 + AT91_SAMA5D2_CHAN_SINGLE(9, 0x74), 198 + AT91_SAMA5D2_CHAN_SINGLE(10, 0x78), 199 + AT91_SAMA5D2_CHAN_SINGLE(11, 0x7c), 200 + AT91_SAMA5D2_CHAN_DIFF(0, 1, 0x50), 201 + AT91_SAMA5D2_CHAN_DIFF(2, 3, 0x58), 202 + AT91_SAMA5D2_CHAN_DIFF(4, 5, 0x60), 203 + AT91_SAMA5D2_CHAN_DIFF(6, 7, 0x68), 204 + AT91_SAMA5D2_CHAN_DIFF(8, 9, 0x70), 205 + AT91_SAMA5D2_CHAN_DIFF(10, 11, 0x78), 223 206 }; 224 207 225 208 static unsigned at91_adc_startup_time(unsigned startup_time_min, ··· 255 226 static void at91_adc_setup_samp_freq(struct at91_adc_state *st, unsigned freq) 256 227 { 257 228 struct iio_dev *indio_dev = iio_priv_to_dev(st); 258 - unsigned f_per, prescal, startup; 229 + unsigned f_per, prescal, startup, mr; 259 230 260 231 f_per = clk_get_rate(st->per_clk); 261 232 prescal = (f_per / (2 * freq)) - 1; ··· 263 234 startup = at91_adc_startup_time(st->soc_info.startup_time, 264 235 freq / 1000); 265 236 266 - at91_adc_writel(st, AT91_SAMA5D2_MR, 267 - AT91_SAMA5D2_MR_TRANSFER(2) 268 - | AT91_SAMA5D2_MR_STARTUP(startup) 269 - | AT91_SAMA5D2_MR_PRESCAL(prescal)); 237 + mr = at91_adc_readl(st, AT91_SAMA5D2_MR); 238 + mr &= ~(AT91_SAMA5D2_MR_STARTUP_MASK | AT91_SAMA5D2_MR_PRESCAL_MASK); 239 + mr |= AT91_SAMA5D2_MR_STARTUP(startup); 240 + mr |= AT91_SAMA5D2_MR_PRESCAL(prescal); 241 + at91_adc_writel(st, AT91_SAMA5D2_MR, mr); 270 242 271 243 dev_dbg(&indio_dev->dev, "freq: %u, startup: %u, prescal: %u\n", 272 244 freq, startup, prescal); ··· 308 278 int *val, int *val2, long mask) 309 279 { 310 280 struct at91_adc_state *st = iio_priv(indio_dev); 281 + u32 cor = 0; 311 282 int ret; 312 283 313 284 switch (mask) { ··· 317 286 318 287 st->chan = chan; 319 288 289 + if (chan->differential) 290 + cor = (BIT(chan->channel) | BIT(chan->channel2)) << 291 + AT91_SAMA5D2_COR_DIFF_OFFSET; 292 + 293 + at91_adc_writel(st, AT91_SAMA5D2_COR, cor); 320 294 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); 321 295 at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel)); 322 296 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START); ··· 334 298 335 299 if (ret > 0) { 336 300 *val = st->conversion_value; 301 + if (chan->scan_type.sign == 's') 302 + *val = sign_extend32(*val, 11); 337 303 ret = IIO_VAL_INT; 338 304 st->conversion_done = false; 339 305 } ··· 348 310 349 311 case IIO_CHAN_INFO_SCALE: 350 312 *val = st->vref_uv / 1000; 313 + if (chan->differential) 314 + *val *= 2; 351 315 *val2 = chan->scan_type.realbits; 352 316 return IIO_VAL_FRACTIONAL_LOG2; 353 317 ··· 484 444 485 445 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST); 486 446 at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff); 447 + /* 448 + * Transfer field must be set to 2 according to the datasheet and 449 + * allows different analog settings for each channel. 450 + */ 451 + at91_adc_writel(st, AT91_SAMA5D2_MR, 452 + AT91_SAMA5D2_MR_TRANSFER(2) | AT91_SAMA5D2_MR_ANACH); 487 453 488 454 at91_adc_setup_samp_freq(st, st->soc_info.min_sample_rate); 489 455
+26 -17
drivers/iio/adc/ina2xx-adc.c
··· 185 185 case IIO_CHAN_INFO_SCALE: 186 186 switch (chan->address) { 187 187 case INA2XX_SHUNT_VOLTAGE: 188 - /* processed (mV) = raw*1000/shunt_div */ 188 + /* processed (mV) = raw/shunt_div */ 189 189 *val2 = chip->config->shunt_div; 190 - *val = 1000; 190 + *val = 1; 191 191 return IIO_VAL_FRACTIONAL; 192 192 193 193 case INA2XX_BUS_VOLTAGE: ··· 350 350 return len; 351 351 } 352 352 353 + /* 354 + * Set current LSB to 1mA, shunt is in uOhms 355 + * (equation 13 in datasheet). We hardcode a Current_LSB 356 + * of 1.0 x10-6. The only remaining parameter is RShunt. 357 + * There is no need to expose the CALIBRATION register 358 + * to the user for now. But we need to reset this register 359 + * if the user updates RShunt after driver init, e.g upon 360 + * reading an EEPROM/Probe-type value. 361 + */ 362 + static int ina2xx_set_calibration(struct ina2xx_chip_info *chip) 363 + { 364 + u16 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor, 365 + chip->shunt_resistor); 366 + 367 + return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval); 368 + } 369 + 353 370 static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val) 354 371 { 355 372 if (val <= 0 || val > chip->config->calibration_factor) ··· 399 382 return ret; 400 383 401 384 ret = set_shunt_resistor(chip, val); 385 + if (ret) 386 + return ret; 387 + 388 + /* Update the Calibration register */ 389 + ret = ina2xx_set_calibration(chip); 402 390 if (ret) 403 391 return ret; 404 392 ··· 624 602 /* Initialize the configuration and calibration registers. */ 625 603 static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config) 626 604 { 627 - u16 regval; 628 - int ret; 629 - 630 - ret = regmap_write(chip->regmap, INA2XX_CONFIG, config); 605 + int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config); 631 606 if (ret) 632 607 return ret; 633 608 634 - /* 635 - * Set current LSB to 1mA, shunt is in uOhms 636 - * (equation 13 in datasheet). We hardcode a Current_LSB 637 - * of 1.0 x10-6. The only remaining parameter is RShunt. 638 - * There is no need to expose the CALIBRATION register 639 - * to the user for now. 640 - */ 641 - regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor, 642 - chip->shunt_resistor); 643 - 644 - return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval); 609 + return ina2xx_set_calibration(chip); 645 610 } 646 611 647 612 static int ina2xx_probe(struct i2c_client *client,
+231
drivers/iio/adc/lpc18xx_adc.c
··· 1 + /* 2 + * IIO ADC driver for NXP LPC18xx ADC 3 + * 4 + * Copyright (C) 2016 Joachim Eastwood <manabian@gmail.com> 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + * 10 + * UNSUPPORTED hardware features: 11 + * - Hardware triggers 12 + * - Burst mode 13 + * - Interrupts 14 + * - DMA 15 + */ 16 + 17 + #include <linux/clk.h> 18 + #include <linux/err.h> 19 + #include <linux/iio/iio.h> 20 + #include <linux/iio/driver.h> 21 + #include <linux/io.h> 22 + #include <linux/iopoll.h> 23 + #include <linux/module.h> 24 + #include <linux/mutex.h> 25 + #include <linux/of.h> 26 + #include <linux/of_device.h> 27 + #include <linux/platform_device.h> 28 + #include <linux/regulator/consumer.h> 29 + 30 + /* LPC18XX ADC registers and bits */ 31 + #define LPC18XX_ADC_CR 0x000 32 + #define LPC18XX_ADC_CR_CLKDIV_SHIFT 8 33 + #define LPC18XX_ADC_CR_PDN BIT(21) 34 + #define LPC18XX_ADC_CR_START_NOW (0x1 << 24) 35 + #define LPC18XX_ADC_GDR 0x004 36 + 37 + /* Data register bits */ 38 + #define LPC18XX_ADC_SAMPLE_SHIFT 6 39 + #define LPC18XX_ADC_SAMPLE_MASK 0x3ff 40 + #define LPC18XX_ADC_CONV_DONE BIT(31) 41 + 42 + /* Clock should be 4.5 MHz or less */ 43 + #define LPC18XX_ADC_CLK_TARGET 4500000 44 + 45 + struct lpc18xx_adc { 46 + struct regulator *vref; 47 + void __iomem *base; 48 + struct device *dev; 49 + struct mutex lock; 50 + struct clk *clk; 51 + u32 cr_reg; 52 + }; 53 + 54 + #define LPC18XX_ADC_CHAN(_idx) { \ 55 + .type = IIO_VOLTAGE, \ 56 + .indexed = 1, \ 57 + .channel = _idx, \ 58 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 59 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 60 + } 61 + 62 + static const struct iio_chan_spec lpc18xx_adc_iio_channels[] = { 63 + LPC18XX_ADC_CHAN(0), 64 + LPC18XX_ADC_CHAN(1), 65 + LPC18XX_ADC_CHAN(2), 66 + LPC18XX_ADC_CHAN(3), 67 + LPC18XX_ADC_CHAN(4), 68 + LPC18XX_ADC_CHAN(5), 69 + LPC18XX_ADC_CHAN(6), 70 + LPC18XX_ADC_CHAN(7), 71 + }; 72 + 73 + static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) 74 + { 75 + int ret; 76 + u32 reg; 77 + 78 + reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; 79 + writel(reg, adc->base + LPC18XX_ADC_CR); 80 + 81 + ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, 82 + reg & LPC18XX_ADC_CONV_DONE, 3, 9); 83 + if (ret) { 84 + dev_warn(adc->dev, "adc read timed out\n"); 85 + return ret; 86 + } 87 + 88 + return (reg >> LPC18XX_ADC_SAMPLE_SHIFT) & LPC18XX_ADC_SAMPLE_MASK; 89 + } 90 + 91 + static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev, 92 + struct iio_chan_spec const *chan, 93 + int *val, int *val2, long mask) 94 + { 95 + struct lpc18xx_adc *adc = iio_priv(indio_dev); 96 + 97 + switch (mask) { 98 + case IIO_CHAN_INFO_RAW: 99 + mutex_lock(&adc->lock); 100 + *val = lpc18xx_adc_read_chan(adc, chan->channel); 101 + mutex_unlock(&adc->lock); 102 + if (*val < 0) 103 + return *val; 104 + 105 + return IIO_VAL_INT; 106 + 107 + case IIO_CHAN_INFO_SCALE: 108 + *val = regulator_get_voltage(adc->vref) / 1000; 109 + *val2 = 10; 110 + 111 + return IIO_VAL_FRACTIONAL_LOG2; 112 + } 113 + 114 + return -EINVAL; 115 + } 116 + 117 + static const struct iio_info lpc18xx_adc_info = { 118 + .read_raw = lpc18xx_adc_read_raw, 119 + .driver_module = THIS_MODULE, 120 + }; 121 + 122 + static int lpc18xx_adc_probe(struct platform_device *pdev) 123 + { 124 + struct iio_dev *indio_dev; 125 + struct lpc18xx_adc *adc; 126 + struct resource *res; 127 + unsigned int clkdiv; 128 + unsigned long rate; 129 + int ret; 130 + 131 + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc)); 132 + if (!indio_dev) 133 + return -ENOMEM; 134 + 135 + platform_set_drvdata(pdev, indio_dev); 136 + adc = iio_priv(indio_dev); 137 + adc->dev = &pdev->dev; 138 + mutex_init(&adc->lock); 139 + 140 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 141 + adc->base = devm_ioremap_resource(&pdev->dev, res); 142 + if (IS_ERR(adc->base)) 143 + return PTR_ERR(adc->base); 144 + 145 + adc->clk = devm_clk_get(&pdev->dev, NULL); 146 + if (IS_ERR(adc->clk)) { 147 + dev_err(&pdev->dev, "error getting clock\n"); 148 + return PTR_ERR(adc->clk); 149 + } 150 + 151 + rate = clk_get_rate(adc->clk); 152 + clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET); 153 + 154 + adc->vref = devm_regulator_get(&pdev->dev, "vref"); 155 + if (IS_ERR(adc->vref)) { 156 + dev_err(&pdev->dev, "error getting regulator\n"); 157 + return PTR_ERR(adc->vref); 158 + } 159 + 160 + indio_dev->name = dev_name(&pdev->dev); 161 + indio_dev->dev.parent = &pdev->dev; 162 + indio_dev->info = &lpc18xx_adc_info; 163 + indio_dev->modes = INDIO_DIRECT_MODE; 164 + indio_dev->channels = lpc18xx_adc_iio_channels; 165 + indio_dev->num_channels = ARRAY_SIZE(lpc18xx_adc_iio_channels); 166 + 167 + ret = regulator_enable(adc->vref); 168 + if (ret) { 169 + dev_err(&pdev->dev, "unable to enable regulator\n"); 170 + return ret; 171 + } 172 + 173 + ret = clk_prepare_enable(adc->clk); 174 + if (ret) { 175 + dev_err(&pdev->dev, "unable to enable clock\n"); 176 + goto dis_reg; 177 + } 178 + 179 + adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) | 180 + LPC18XX_ADC_CR_PDN; 181 + writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR); 182 + 183 + ret = iio_device_register(indio_dev); 184 + if (ret) { 185 + dev_err(&pdev->dev, "unable to register device\n"); 186 + goto dis_clk; 187 + } 188 + 189 + return 0; 190 + 191 + dis_clk: 192 + writel(0, adc->base + LPC18XX_ADC_CR); 193 + clk_disable_unprepare(adc->clk); 194 + dis_reg: 195 + regulator_disable(adc->vref); 196 + return ret; 197 + } 198 + 199 + static int lpc18xx_adc_remove(struct platform_device *pdev) 200 + { 201 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 202 + struct lpc18xx_adc *adc = iio_priv(indio_dev); 203 + 204 + iio_device_unregister(indio_dev); 205 + 206 + writel(0, adc->base + LPC18XX_ADC_CR); 207 + clk_disable_unprepare(adc->clk); 208 + regulator_disable(adc->vref); 209 + 210 + return 0; 211 + } 212 + 213 + static const struct of_device_id lpc18xx_adc_match[] = { 214 + { .compatible = "nxp,lpc1850-adc" }, 215 + { /* sentinel */ } 216 + }; 217 + MODULE_DEVICE_TABLE(of, lpc18xx_adc_match); 218 + 219 + static struct platform_driver lpc18xx_adc_driver = { 220 + .probe = lpc18xx_adc_probe, 221 + .remove = lpc18xx_adc_remove, 222 + .driver = { 223 + .name = "lpc18xx-adc", 224 + .of_match_table = lpc18xx_adc_match, 225 + }, 226 + }; 227 + module_platform_driver(lpc18xx_adc_driver); 228 + 229 + MODULE_DESCRIPTION("LPC18xx ADC driver"); 230 + MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>"); 231 + MODULE_LICENSE("GPL v2");
+19
drivers/iio/adc/rockchip_saradc.c
··· 159 159 .clk_rate = 50000, 160 160 }; 161 161 162 + static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = { 163 + ADC_CHANNEL(0, "adc0"), 164 + ADC_CHANNEL(1, "adc1"), 165 + ADC_CHANNEL(2, "adc2"), 166 + ADC_CHANNEL(3, "adc3"), 167 + ADC_CHANNEL(4, "adc4"), 168 + ADC_CHANNEL(5, "adc5"), 169 + }; 170 + 171 + static const struct rockchip_saradc_data rk3399_saradc_data = { 172 + .num_bits = 10, 173 + .channels = rockchip_rk3399_saradc_iio_channels, 174 + .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels), 175 + .clk_rate = 1000000, 176 + }; 177 + 162 178 static const struct of_device_id rockchip_saradc_match[] = { 163 179 { 164 180 .compatible = "rockchip,saradc", ··· 182 166 }, { 183 167 .compatible = "rockchip,rk3066-tsadc", 184 168 .data = &rk3066_tsadc_data, 169 + }, { 170 + .compatible = "rockchip,rk3399-saradc", 171 + .data = &rk3399_saradc_data, 185 172 }, 186 173 {}, 187 174 };
+7 -21
drivers/iio/common/st_sensors/st_sensors_buffer.c
··· 24 24 25 25 int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf) 26 26 { 27 - u8 *addr; 27 + u8 addr[3]; /* no ST sensor has more than 3 channels */ 28 28 int i, n = 0, len; 29 29 struct st_sensor_data *sdata = iio_priv(indio_dev); 30 30 unsigned int num_data_channels = sdata->num_data_channels; 31 31 unsigned int byte_for_channel = 32 32 indio_dev->channels[0].scan_type.storagebits >> 3; 33 - 34 - addr = kmalloc(num_data_channels, GFP_KERNEL); 35 - if (!addr) { 36 - len = -ENOMEM; 37 - goto st_sensors_get_buffer_element_error; 38 - } 39 33 40 34 for (i = 0; i < num_data_channels; i++) { 41 35 if (test_bit(i, indio_dev->active_scan_mask)) { ··· 51 57 u8 *rx_array; 52 58 rx_array = kmalloc(byte_for_channel * num_data_channels, 53 59 GFP_KERNEL); 54 - if (!rx_array) { 55 - len = -ENOMEM; 56 - goto st_sensors_free_memory; 57 - } 60 + if (!rx_array) 61 + return -ENOMEM; 58 62 59 63 len = sdata->tf->read_multiple_byte(&sdata->tb, 60 64 sdata->dev, addr[0], ··· 60 68 rx_array, sdata->multiread_bit); 61 69 if (len < 0) { 62 70 kfree(rx_array); 63 - goto st_sensors_free_memory; 71 + return len; 64 72 } 65 73 66 74 for (i = 0; i < n * byte_for_channel; i++) { ··· 79 87 buf, sdata->multiread_bit); 80 88 break; 81 89 default: 82 - len = -EINVAL; 83 - goto st_sensors_free_memory; 90 + return -EINVAL; 84 91 } 85 - if (len != byte_for_channel * n) { 86 - len = -EIO; 87 - goto st_sensors_free_memory; 88 - } 92 + if (len != byte_for_channel * n) 93 + return -EIO; 89 94 90 - st_sensors_free_memory: 91 - kfree(addr); 92 - st_sensors_get_buffer_element_error: 93 95 return len; 94 96 } 95 97 EXPORT_SYMBOL(st_sensors_get_buffer_element);
+10
drivers/iio/dac/Kconfig
··· 154 154 To compile this driver as module choose M here: the module will be called 155 155 ad7303. 156 156 157 + config LPC18XX_DAC 158 + tristate "NXP LPC18xx DAC driver" 159 + depends on ARCH_LPC18XX || COMPILE_TEST 160 + depends on OF && HAS_IOMEM 161 + help 162 + Say yes here to build support for NXP LPC18XX DAC. 163 + 164 + To compile this driver as a module, choose M here: the module will be 165 + called lpc18xx_dac. 166 + 157 167 config M62332 158 168 tristate "Mitsubishi M62332 DAC driver" 159 169 depends on I2C
+1
drivers/iio/dac/Makefile
··· 17 17 obj-$(CONFIG_AD5791) += ad5791.o 18 18 obj-$(CONFIG_AD5686) += ad5686.o 19 19 obj-$(CONFIG_AD7303) += ad7303.o 20 + obj-$(CONFIG_LPC18XX_DAC) += lpc18xx_dac.o 20 21 obj-$(CONFIG_M62332) += m62332.o 21 22 obj-$(CONFIG_MAX517) += max517.o 22 23 obj-$(CONFIG_MAX5821) += max5821.o
+210
drivers/iio/dac/lpc18xx_dac.c
··· 1 + /* 2 + * IIO DAC driver for NXP LPC18xx DAC 3 + * 4 + * Copyright (C) 2016 Joachim Eastwood <manabian@gmail.com> 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + * 10 + * UNSUPPORTED hardware features: 11 + * - Interrupts 12 + * - DMA 13 + */ 14 + 15 + #include <linux/clk.h> 16 + #include <linux/err.h> 17 + #include <linux/iio/iio.h> 18 + #include <linux/iio/driver.h> 19 + #include <linux/io.h> 20 + #include <linux/iopoll.h> 21 + #include <linux/module.h> 22 + #include <linux/mutex.h> 23 + #include <linux/of.h> 24 + #include <linux/of_device.h> 25 + #include <linux/platform_device.h> 26 + #include <linux/regulator/consumer.h> 27 + 28 + /* LPC18XX DAC registers and bits */ 29 + #define LPC18XX_DAC_CR 0x000 30 + #define LPC18XX_DAC_CR_VALUE_SHIFT 6 31 + #define LPC18XX_DAC_CR_VALUE_MASK 0x3ff 32 + #define LPC18XX_DAC_CR_BIAS BIT(16) 33 + #define LPC18XX_DAC_CTRL 0x004 34 + #define LPC18XX_DAC_CTRL_DMA_ENA BIT(3) 35 + 36 + struct lpc18xx_dac { 37 + struct regulator *vref; 38 + void __iomem *base; 39 + struct mutex lock; 40 + struct clk *clk; 41 + }; 42 + 43 + static const struct iio_chan_spec lpc18xx_dac_iio_channels[] = { 44 + { 45 + .type = IIO_VOLTAGE, 46 + .output = 1, 47 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 48 + BIT(IIO_CHAN_INFO_SCALE), 49 + }, 50 + }; 51 + 52 + static int lpc18xx_dac_read_raw(struct iio_dev *indio_dev, 53 + struct iio_chan_spec const *chan, 54 + int *val, int *val2, long mask) 55 + { 56 + struct lpc18xx_dac *dac = iio_priv(indio_dev); 57 + u32 reg; 58 + 59 + switch (mask) { 60 + case IIO_CHAN_INFO_RAW: 61 + reg = readl(dac->base + LPC18XX_DAC_CR); 62 + *val = reg >> LPC18XX_DAC_CR_VALUE_SHIFT; 63 + *val &= LPC18XX_DAC_CR_VALUE_MASK; 64 + 65 + return IIO_VAL_INT; 66 + 67 + case IIO_CHAN_INFO_SCALE: 68 + *val = regulator_get_voltage(dac->vref) / 1000; 69 + *val2 = 10; 70 + 71 + return IIO_VAL_FRACTIONAL_LOG2; 72 + } 73 + 74 + return -EINVAL; 75 + } 76 + 77 + static int lpc18xx_dac_write_raw(struct iio_dev *indio_dev, 78 + struct iio_chan_spec const *chan, 79 + int val, int val2, long mask) 80 + { 81 + struct lpc18xx_dac *dac = iio_priv(indio_dev); 82 + u32 reg; 83 + 84 + switch (mask) { 85 + case IIO_CHAN_INFO_RAW: 86 + if (val < 0 || val > LPC18XX_DAC_CR_VALUE_MASK) 87 + return -EINVAL; 88 + 89 + reg = LPC18XX_DAC_CR_BIAS; 90 + reg |= val << LPC18XX_DAC_CR_VALUE_SHIFT; 91 + 92 + mutex_lock(&dac->lock); 93 + writel(reg, dac->base + LPC18XX_DAC_CR); 94 + writel(LPC18XX_DAC_CTRL_DMA_ENA, dac->base + LPC18XX_DAC_CTRL); 95 + mutex_unlock(&dac->lock); 96 + 97 + return 0; 98 + } 99 + 100 + return -EINVAL; 101 + } 102 + 103 + static const struct iio_info lpc18xx_dac_info = { 104 + .read_raw = lpc18xx_dac_read_raw, 105 + .write_raw = lpc18xx_dac_write_raw, 106 + .driver_module = THIS_MODULE, 107 + }; 108 + 109 + static int lpc18xx_dac_probe(struct platform_device *pdev) 110 + { 111 + struct iio_dev *indio_dev; 112 + struct lpc18xx_dac *dac; 113 + struct resource *res; 114 + int ret; 115 + 116 + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac)); 117 + if (!indio_dev) 118 + return -ENOMEM; 119 + 120 + platform_set_drvdata(pdev, indio_dev); 121 + dac = iio_priv(indio_dev); 122 + mutex_init(&dac->lock); 123 + 124 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 125 + dac->base = devm_ioremap_resource(&pdev->dev, res); 126 + if (IS_ERR(dac->base)) 127 + return PTR_ERR(dac->base); 128 + 129 + dac->clk = devm_clk_get(&pdev->dev, NULL); 130 + if (IS_ERR(dac->clk)) { 131 + dev_err(&pdev->dev, "error getting clock\n"); 132 + return PTR_ERR(dac->clk); 133 + } 134 + 135 + dac->vref = devm_regulator_get(&pdev->dev, "vref"); 136 + if (IS_ERR(dac->vref)) { 137 + dev_err(&pdev->dev, "error getting regulator\n"); 138 + return PTR_ERR(dac->vref); 139 + } 140 + 141 + indio_dev->name = dev_name(&pdev->dev); 142 + indio_dev->dev.parent = &pdev->dev; 143 + indio_dev->info = &lpc18xx_dac_info; 144 + indio_dev->modes = INDIO_DIRECT_MODE; 145 + indio_dev->channels = lpc18xx_dac_iio_channels; 146 + indio_dev->num_channels = ARRAY_SIZE(lpc18xx_dac_iio_channels); 147 + 148 + ret = regulator_enable(dac->vref); 149 + if (ret) { 150 + dev_err(&pdev->dev, "unable to enable regulator\n"); 151 + return ret; 152 + } 153 + 154 + ret = clk_prepare_enable(dac->clk); 155 + if (ret) { 156 + dev_err(&pdev->dev, "unable to enable clock\n"); 157 + goto dis_reg; 158 + } 159 + 160 + writel(0, dac->base + LPC18XX_DAC_CTRL); 161 + writel(0, dac->base + LPC18XX_DAC_CR); 162 + 163 + ret = iio_device_register(indio_dev); 164 + if (ret) { 165 + dev_err(&pdev->dev, "unable to register device\n"); 166 + goto dis_clk; 167 + } 168 + 169 + return 0; 170 + 171 + dis_clk: 172 + clk_disable_unprepare(dac->clk); 173 + dis_reg: 174 + regulator_disable(dac->vref); 175 + return ret; 176 + } 177 + 178 + static int lpc18xx_dac_remove(struct platform_device *pdev) 179 + { 180 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 181 + struct lpc18xx_dac *dac = iio_priv(indio_dev); 182 + 183 + iio_device_unregister(indio_dev); 184 + 185 + writel(0, dac->base + LPC18XX_DAC_CTRL); 186 + clk_disable_unprepare(dac->clk); 187 + regulator_disable(dac->vref); 188 + 189 + return 0; 190 + } 191 + 192 + static const struct of_device_id lpc18xx_dac_match[] = { 193 + { .compatible = "nxp,lpc1850-dac" }, 194 + { /* sentinel */ } 195 + }; 196 + MODULE_DEVICE_TABLE(of, lpc18xx_dac_match); 197 + 198 + static struct platform_driver lpc18xx_dac_driver = { 199 + .probe = lpc18xx_dac_probe, 200 + .remove = lpc18xx_dac_remove, 201 + .driver = { 202 + .name = "lpc18xx-dac", 203 + .of_match_table = lpc18xx_dac_match, 204 + }, 205 + }; 206 + module_platform_driver(lpc18xx_dac_driver); 207 + 208 + MODULE_DESCRIPTION("LPC18xx DAC driver"); 209 + MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>"); 210 + MODULE_LICENSE("GPL v2");
+12 -40
drivers/iio/gyro/bmg160_core.c
··· 17 17 #include <linux/delay.h> 18 18 #include <linux/slab.h> 19 19 #include <linux/acpi.h> 20 - #include <linux/gpio/consumer.h> 21 20 #include <linux/pm.h> 22 21 #include <linux/pm_runtime.h> 23 22 #include <linux/iio/iio.h> ··· 30 31 #include "bmg160.h" 31 32 32 33 #define BMG160_IRQ_NAME "bmg160_event" 33 - #define BMG160_GPIO_NAME "gpio_int" 34 34 35 35 #define BMG160_REG_CHIP_ID 0x00 36 36 #define BMG160_CHIP_ID_VAL 0x0F ··· 114 116 AXIS_X, 115 117 AXIS_Y, 116 118 AXIS_Z, 119 + AXIS_MAX, 117 120 }; 118 121 119 122 static const struct { ··· 732 733 .sign = 's', \ 733 734 .realbits = 16, \ 734 735 .storagebits = 16, \ 736 + .endianness = IIO_LE, \ 735 737 }, \ 736 738 .event_spec = &bmg160_event, \ 737 739 .num_event_specs = 1 \ ··· 763 763 .driver_module = THIS_MODULE, 764 764 }; 765 765 766 + static const unsigned long bmg160_accel_scan_masks[] = { 767 + BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z), 768 + 0}; 769 + 766 770 static irqreturn_t bmg160_trigger_handler(int irq, void *p) 767 771 { 768 772 struct iio_poll_func *pf = p; 769 773 struct iio_dev *indio_dev = pf->indio_dev; 770 774 struct bmg160_data *data = iio_priv(indio_dev); 771 - int bit, ret, i = 0; 772 - unsigned int val; 775 + int ret; 773 776 774 777 mutex_lock(&data->mutex); 775 - for_each_set_bit(bit, indio_dev->active_scan_mask, 776 - indio_dev->masklength) { 777 - ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(bit), 778 - &val, 2); 779 - if (ret < 0) { 780 - mutex_unlock(&data->mutex); 781 - goto err; 782 - } 783 - data->buffer[i++] = ret; 784 - } 778 + ret = regmap_bulk_read(data->regmap, BMG160_REG_XOUT_L, 779 + data->buffer, AXIS_MAX * 2); 785 780 mutex_unlock(&data->mutex); 781 + if (ret < 0) 782 + goto err; 786 783 787 784 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 788 785 pf->timestamp); ··· 952 955 .postdisable = bmg160_buffer_postdisable, 953 956 }; 954 957 955 - static int bmg160_gpio_probe(struct bmg160_data *data) 956 - 957 - { 958 - struct device *dev; 959 - struct gpio_desc *gpio; 960 - 961 - dev = data->dev; 962 - 963 - /* data ready gpio interrupt pin */ 964 - gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0, GPIOD_IN); 965 - if (IS_ERR(gpio)) { 966 - dev_err(dev, "acpi gpio get index failed\n"); 967 - return PTR_ERR(gpio); 968 - } 969 - 970 - data->irq = gpiod_to_irq(gpio); 971 - 972 - dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), 973 - data->irq); 974 - 975 - return 0; 976 - } 977 - 978 958 static const char *bmg160_match_acpi_device(struct device *dev) 979 959 { 980 960 const struct acpi_device_id *id; ··· 993 1019 indio_dev->channels = bmg160_channels; 994 1020 indio_dev->num_channels = ARRAY_SIZE(bmg160_channels); 995 1021 indio_dev->name = name; 1022 + indio_dev->available_scan_masks = bmg160_accel_scan_masks; 996 1023 indio_dev->modes = INDIO_DIRECT_MODE; 997 1024 indio_dev->info = &bmg160_info; 998 - 999 - if (data->irq <= 0) 1000 - bmg160_gpio_probe(data); 1001 1025 1002 1026 if (data->irq > 0) { 1003 1027 ret = devm_request_threaded_irq(dev,
+27 -3
drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
··· 104 104 return 0; 105 105 } 106 106 107 + static const char *inv_mpu_match_acpi_device(struct device *dev, int *chip_id) 108 + { 109 + const struct acpi_device_id *id; 110 + 111 + id = acpi_match_device(dev->driver->acpi_match_table, dev); 112 + if (!id) 113 + return NULL; 114 + 115 + *chip_id = (int)id->driver_data; 116 + 117 + return dev_name(dev); 118 + } 119 + 107 120 /** 108 121 * inv_mpu_probe() - probe function. 109 122 * @client: i2c client. ··· 128 115 const struct i2c_device_id *id) 129 116 { 130 117 struct inv_mpu6050_state *st; 131 - int result; 132 - const char *name = id ? id->name : NULL; 118 + int result, chip_type; 133 119 struct regmap *regmap; 120 + const char *name; 134 121 135 122 if (!i2c_check_functionality(client->adapter, 136 123 I2C_FUNC_SMBUS_I2C_BLOCK)) 137 124 return -EOPNOTSUPP; 125 + 126 + if (id) { 127 + chip_type = (int)id->driver_data; 128 + name = id->name; 129 + } else if (ACPI_HANDLE(&client->dev)) { 130 + name = inv_mpu_match_acpi_device(&client->dev, &chip_type); 131 + if (!name) 132 + return -ENODEV; 133 + } else { 134 + return -ENOSYS; 135 + } 138 136 139 137 regmap = devm_regmap_init_i2c(client, &inv_mpu_regmap_config); 140 138 if (IS_ERR(regmap)) { ··· 155 131 } 156 132 157 133 result = inv_mpu_core_probe(regmap, client->irq, name, 158 - NULL, id->driver_data); 134 + NULL, chip_type); 159 135 if (result < 0) 160 136 return result; 161 137
+2 -1
drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c
··· 46 46 struct regmap *regmap; 47 47 const struct spi_device_id *id = spi_get_device_id(spi); 48 48 const char *name = id ? id->name : NULL; 49 + const int chip_type = id ? id->driver_data : 0; 49 50 50 51 regmap = devm_regmap_init_spi(spi, &inv_mpu_regmap_config); 51 52 if (IS_ERR(regmap)) { ··· 56 55 } 57 56 58 57 return inv_mpu_core_probe(regmap, spi->irq, name, 59 - inv_mpu_i2c_disable, id->driver_data); 58 + inv_mpu_i2c_disable, chip_type); 60 59 } 61 60 62 61 static int inv_mpu_remove(struct spi_device *spi)
-1
drivers/iio/imu/kmx61.c
··· 14 14 #include <linux/module.h> 15 15 #include <linux/i2c.h> 16 16 #include <linux/acpi.h> 17 - #include <linux/gpio/consumer.h> 18 17 #include <linux/interrupt.h> 19 18 #include <linux/pm.h> 20 19 #include <linux/pm_runtime.h>
+41
drivers/iio/industrialio-core.c
··· 25 25 #include <linux/slab.h> 26 26 #include <linux/anon_inodes.h> 27 27 #include <linux/debugfs.h> 28 + #include <linux/mutex.h> 28 29 #include <linux/iio/iio.h> 29 30 #include "iio_core.h" 30 31 #include "iio_core_trigger.h" ··· 79 78 [IIO_CONCENTRATION] = "concentration", 80 79 [IIO_RESISTANCE] = "resistance", 81 80 [IIO_PH] = "ph", 81 + [IIO_UVINDEX] = "uvindex", 82 82 }; 83 83 84 84 static const char * const iio_modifier_names[] = { ··· 102 100 [IIO_MOD_LIGHT_RED] = "red", 103 101 [IIO_MOD_LIGHT_GREEN] = "green", 104 102 [IIO_MOD_LIGHT_BLUE] = "blue", 103 + [IIO_MOD_LIGHT_UV] = "uv", 105 104 [IIO_MOD_QUATERNION] = "quaternion", 106 105 [IIO_MOD_TEMP_AMBIENT] = "ambient", 107 106 [IIO_MOD_TEMP_OBJECT] = "object", ··· 1377 1374 WARN_ON(rc); 1378 1375 } 1379 1376 EXPORT_SYMBOL_GPL(devm_iio_device_unregister); 1377 + 1378 + /** 1379 + * iio_device_claim_direct_mode - Keep device in direct mode 1380 + * @indio_dev: the iio_dev associated with the device 1381 + * 1382 + * If the device is in direct mode it is guaranteed to stay 1383 + * that way until iio_device_release_direct_mode() is called. 1384 + * 1385 + * Use with iio_device_release_direct_mode() 1386 + * 1387 + * Returns: 0 on success, -EBUSY on failure 1388 + */ 1389 + int iio_device_claim_direct_mode(struct iio_dev *indio_dev) 1390 + { 1391 + mutex_lock(&indio_dev->mlock); 1392 + 1393 + if (iio_buffer_enabled(indio_dev)) { 1394 + mutex_unlock(&indio_dev->mlock); 1395 + return -EBUSY; 1396 + } 1397 + return 0; 1398 + } 1399 + EXPORT_SYMBOL_GPL(iio_device_claim_direct_mode); 1400 + 1401 + /** 1402 + * iio_device_release_direct_mode - releases claim on direct mode 1403 + * @indio_dev: the iio_dev associated with the device 1404 + * 1405 + * Release the claim. Device is no longer guaranteed to stay 1406 + * in direct mode. 1407 + * 1408 + * Use with iio_device_claim_direct_mode() 1409 + */ 1410 + void iio_device_release_direct_mode(struct iio_dev *indio_dev) 1411 + { 1412 + mutex_unlock(&indio_dev->mlock); 1413 + } 1414 + EXPORT_SYMBOL_GPL(iio_device_release_direct_mode); 1380 1415 1381 1416 subsys_initcall(iio_init); 1382 1417 module_exit(iio_exit);
-1
drivers/iio/light/stk3310.c
··· 16 16 #include <linux/kernel.h> 17 17 #include <linux/module.h> 18 18 #include <linux/regmap.h> 19 - #include <linux/gpio/consumer.h> 20 19 #include <linux/iio/events.h> 21 20 #include <linux/iio/iio.h> 22 21 #include <linux/iio/sysfs.h>
+1 -2
drivers/iio/light/tsl2563.c
··· 806 806 return 0; 807 807 808 808 fail: 809 - cancel_delayed_work(&chip->poweroff_work); 810 - flush_scheduled_work(); 809 + cancel_delayed_work_sync(&chip->poweroff_work); 811 810 return err; 812 811 } 813 812
+65 -5
drivers/iio/magnetometer/ak8975.c
··· 32 32 #include <linux/gpio.h> 33 33 #include <linux/of_gpio.h> 34 34 #include <linux/acpi.h> 35 + #include <linux/regulator/consumer.h> 35 36 36 37 #include <linux/iio/iio.h> 37 38 #include <linux/iio/sysfs.h> ··· 362 361 struct ak8975_data { 363 362 struct i2c_client *client; 364 363 const struct ak_def *def; 365 - struct attribute_group attrs; 366 364 struct mutex lock; 367 365 u8 asa[3]; 368 366 long raw_to_gauss[3]; ··· 370 370 wait_queue_head_t data_ready_queue; 371 371 unsigned long flags; 372 372 u8 cntl_cache; 373 + struct regulator *vdd; 373 374 }; 375 + 376 + /* Enable attached power regulator if any. */ 377 + static int ak8975_power_on(struct i2c_client *client) 378 + { 379 + const struct iio_dev *indio_dev = i2c_get_clientdata(client); 380 + struct ak8975_data *data = iio_priv(indio_dev); 381 + int ret; 382 + 383 + data->vdd = devm_regulator_get(&client->dev, "vdd"); 384 + if (IS_ERR_OR_NULL(data->vdd)) { 385 + ret = PTR_ERR(data->vdd); 386 + if (ret == -ENODEV) 387 + ret = 0; 388 + } else { 389 + ret = regulator_enable(data->vdd); 390 + } 391 + 392 + if (ret) 393 + dev_err(&client->dev, "failed to enable Vdd supply: %d\n", ret); 394 + return ret; 395 + } 396 + 397 + /* Disable attached power regulator if any. */ 398 + static void ak8975_power_off(const struct i2c_client *client) 399 + { 400 + const struct iio_dev *indio_dev = i2c_get_clientdata(client); 401 + const struct ak8975_data *data = iio_priv(indio_dev); 402 + 403 + if (!IS_ERR_OR_NULL(data->vdd)) 404 + regulator_disable(data->vdd); 405 + } 374 406 375 407 /* 376 408 * Return 0 if the i2c device is the one we expect. ··· 806 774 if (id) { 807 775 chipset = (enum asahi_compass_chipset)(id->driver_data); 808 776 name = id->name; 809 - } else if (ACPI_HANDLE(&client->dev)) 777 + } else if (ACPI_HANDLE(&client->dev)) { 810 778 name = ak8975_match_acpi_device(&client->dev, &chipset); 779 + if (!name) 780 + return -ENODEV; 781 + } 811 782 else 812 783 return -ENOSYS; 813 784 ··· 821 786 } 822 787 823 788 data->def = &ak_def_array[chipset]; 789 + 790 + err = ak8975_power_on(client); 791 + if (err) 792 + return err; 793 + 824 794 err = ak8975_who_i_am(client, data->def->type); 825 795 if (err < 0) { 826 796 dev_err(&client->dev, "Unexpected device\n"); 827 - return err; 797 + goto power_off; 828 798 } 829 799 dev_dbg(&client->dev, "Asahi compass chip %s\n", name); 830 800 ··· 837 797 err = ak8975_setup(client); 838 798 if (err < 0) { 839 799 dev_err(&client->dev, "%s initialization fails\n", name); 840 - return err; 800 + goto power_off; 841 801 } 842 802 843 803 mutex_init(&data->lock); ··· 847 807 indio_dev->info = &ak8975_info; 848 808 indio_dev->modes = INDIO_DIRECT_MODE; 849 809 indio_dev->name = name; 850 - return devm_iio_device_register(&client->dev, indio_dev); 810 + 811 + err = iio_device_register(indio_dev); 812 + if (err) 813 + goto power_off; 814 + 815 + return 0; 816 + 817 + power_off: 818 + ak8975_power_off(client); 819 + return err; 820 + } 821 + 822 + static int ak8975_remove(struct i2c_client *client) 823 + { 824 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 825 + 826 + iio_device_unregister(indio_dev); 827 + ak8975_power_off(client); 828 + 829 + return 0; 851 830 } 852 831 853 832 static const struct i2c_device_id ak8975_id[] = { ··· 900 841 .acpi_match_table = ACPI_PTR(ak_acpi_match), 901 842 }, 902 843 .probe = ak8975_probe, 844 + .remove = ak8975_remove, 903 845 .id_table = ak8975_id, 904 846 }; 905 847 module_i2c_driver(ak8975_driver);
-1
drivers/iio/magnetometer/bmc150_magn.c
··· 23 23 #include <linux/delay.h> 24 24 #include <linux/slab.h> 25 25 #include <linux/acpi.h> 26 - #include <linux/gpio/consumer.h> 27 26 #include <linux/pm.h> 28 27 #include <linux/pm_runtime.h> 29 28 #include <linux/iio/iio.h>
+18
drivers/iio/potentiometer/Kconfig
··· 5 5 6 6 menu "Digital potentiometers" 7 7 8 + config MCP4131 9 + tristate "Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X Digital Potentiometer driver" 10 + depends on SPI 11 + help 12 + Say yes here to build support for the Microchip 13 + MCP4131, MCP4132, 14 + MCP4141, MCP4142, 15 + MCP4151, MCP4152, 16 + MCP4161, MCP4162, 17 + MCP4231, MCP4232, 18 + MCP4241, MCP4242, 19 + MCP4251, MCP4252, 20 + MCP4261, MCP4262, 21 + digital potentiomenter chips. 22 + 23 + To compile this driver as a module, choose M here: the 24 + module will be called mcp4131. 25 + 8 26 config MCP4531 9 27 tristate "Microchip MCP45xx/MCP46xx Digital Potentiometer driver" 10 28 depends on I2C
+1
drivers/iio/potentiometer/Makefile
··· 3 3 # 4 4 5 5 # When adding new entries keep the list in alphabetical order 6 + obj-$(CONFIG_MCP4131) += mcp4131.o 6 7 obj-$(CONFIG_MCP4531) += mcp4531.o 7 8 obj-$(CONFIG_TPL0102) += tpl0102.o
+494
drivers/iio/potentiometer/mcp4131.c
··· 1 + /* 2 + * Industrial I/O driver for Microchip digital potentiometers 3 + * 4 + * Copyright (c) 2016 Slawomir Stepien 5 + * Based on: Peter Rosin's code from mcp4531.c 6 + * 7 + * Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/22060b.pdf 8 + * 9 + * DEVID #Wipers #Positions Resistor Opts (kOhm) 10 + * mcp4131 1 129 5, 10, 50, 100 11 + * mcp4132 1 129 5, 10, 50, 100 12 + * mcp4141 1 129 5, 10, 50, 100 13 + * mcp4142 1 129 5, 10, 50, 100 14 + * mcp4151 1 257 5, 10, 50, 100 15 + * mcp4152 1 257 5, 10, 50, 100 16 + * mcp4161 1 257 5, 10, 50, 100 17 + * mcp4162 1 257 5, 10, 50, 100 18 + * mcp4231 2 129 5, 10, 50, 100 19 + * mcp4232 2 129 5, 10, 50, 100 20 + * mcp4241 2 129 5, 10, 50, 100 21 + * mcp4242 2 129 5, 10, 50, 100 22 + * mcp4251 2 257 5, 10, 50, 100 23 + * mcp4252 2 257 5, 10, 50, 100 24 + * mcp4261 2 257 5, 10, 50, 100 25 + * mcp4262 2 257 5, 10, 50, 100 26 + * 27 + * This program is free software; you can redistribute it and/or modify it 28 + * under the terms of the GNU General Public License version 2 as published by 29 + * the Free Software Foundation. 30 + */ 31 + 32 + /* 33 + * TODO: 34 + * 1. Write wiper setting to EEPROM for EEPROM capable models. 35 + */ 36 + 37 + #include <linux/cache.h> 38 + #include <linux/err.h> 39 + #include <linux/export.h> 40 + #include <linux/iio/iio.h> 41 + #include <linux/iio/types.h> 42 + #include <linux/module.h> 43 + #include <linux/mutex.h> 44 + #include <linux/of.h> 45 + #include <linux/spi/spi.h> 46 + 47 + #define MCP4131_WRITE (0x00 << 2) 48 + #define MCP4131_READ (0x03 << 2) 49 + 50 + #define MCP4131_WIPER_SHIFT 4 51 + #define MCP4131_CMDERR(r) ((r[0]) & 0x02) 52 + #define MCP4131_RAW(r) ((r[0]) == 0xff ? 0x100 : (r[1])) 53 + 54 + struct mcp4131_cfg { 55 + int wipers; 56 + int max_pos; 57 + int kohms; 58 + }; 59 + 60 + enum mcp4131_type { 61 + MCP413x_502 = 0, 62 + MCP413x_103, 63 + MCP413x_503, 64 + MCP413x_104, 65 + MCP414x_502, 66 + MCP414x_103, 67 + MCP414x_503, 68 + MCP414x_104, 69 + MCP415x_502, 70 + MCP415x_103, 71 + MCP415x_503, 72 + MCP415x_104, 73 + MCP416x_502, 74 + MCP416x_103, 75 + MCP416x_503, 76 + MCP416x_104, 77 + MCP423x_502, 78 + MCP423x_103, 79 + MCP423x_503, 80 + MCP423x_104, 81 + MCP424x_502, 82 + MCP424x_103, 83 + MCP424x_503, 84 + MCP424x_104, 85 + MCP425x_502, 86 + MCP425x_103, 87 + MCP425x_503, 88 + MCP425x_104, 89 + MCP426x_502, 90 + MCP426x_103, 91 + MCP426x_503, 92 + MCP426x_104, 93 + }; 94 + 95 + static const struct mcp4131_cfg mcp4131_cfg[] = { 96 + [MCP413x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, }, 97 + [MCP413x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, }, 98 + [MCP413x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, }, 99 + [MCP413x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, }, 100 + [MCP414x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, }, 101 + [MCP414x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, }, 102 + [MCP414x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, }, 103 + [MCP414x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, }, 104 + [MCP415x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, }, 105 + [MCP415x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, }, 106 + [MCP415x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, }, 107 + [MCP415x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, }, 108 + [MCP416x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, }, 109 + [MCP416x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, }, 110 + [MCP416x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, }, 111 + [MCP416x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, }, 112 + [MCP423x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, }, 113 + [MCP423x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, }, 114 + [MCP423x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, }, 115 + [MCP423x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, }, 116 + [MCP424x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, }, 117 + [MCP424x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, }, 118 + [MCP424x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, }, 119 + [MCP424x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, }, 120 + [MCP425x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, }, 121 + [MCP425x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, }, 122 + [MCP425x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, }, 123 + [MCP425x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, }, 124 + [MCP426x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, }, 125 + [MCP426x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, }, 126 + [MCP426x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, }, 127 + [MCP426x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, }, 128 + }; 129 + 130 + struct mcp4131_data { 131 + struct spi_device *spi; 132 + const struct mcp4131_cfg *cfg; 133 + struct mutex lock; 134 + u8 buf[2] ____cacheline_aligned; 135 + }; 136 + 137 + #define MCP4131_CHANNEL(ch) { \ 138 + .type = IIO_RESISTANCE, \ 139 + .indexed = 1, \ 140 + .output = 1, \ 141 + .channel = (ch), \ 142 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 143 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 144 + } 145 + 146 + static const struct iio_chan_spec mcp4131_channels[] = { 147 + MCP4131_CHANNEL(0), 148 + MCP4131_CHANNEL(1), 149 + }; 150 + 151 + static int mcp4131_read(struct spi_device *spi, void *buf, size_t len) 152 + { 153 + struct spi_transfer t = { 154 + .tx_buf = buf, /* We need to send addr, cmd and 12 bits */ 155 + .rx_buf = buf, 156 + .len = len, 157 + }; 158 + struct spi_message m; 159 + 160 + spi_message_init(&m); 161 + spi_message_add_tail(&t, &m); 162 + 163 + return spi_sync(spi, &m); 164 + } 165 + 166 + static int mcp4131_read_raw(struct iio_dev *indio_dev, 167 + struct iio_chan_spec const *chan, 168 + int *val, int *val2, long mask) 169 + { 170 + int err; 171 + struct mcp4131_data *data = iio_priv(indio_dev); 172 + int address = chan->channel; 173 + 174 + switch (mask) { 175 + case IIO_CHAN_INFO_RAW: 176 + mutex_lock(&data->lock); 177 + 178 + data->buf[0] = (address << MCP4131_WIPER_SHIFT) | MCP4131_READ; 179 + data->buf[1] = 0; 180 + 181 + err = mcp4131_read(data->spi, data->buf, 2); 182 + if (err) { 183 + mutex_unlock(&data->lock); 184 + return err; 185 + } 186 + 187 + /* Error, bad address/command combination */ 188 + if (!MCP4131_CMDERR(data->buf)) { 189 + mutex_unlock(&data->lock); 190 + return -EIO; 191 + } 192 + 193 + *val = MCP4131_RAW(data->buf); 194 + mutex_unlock(&data->lock); 195 + 196 + return IIO_VAL_INT; 197 + 198 + case IIO_CHAN_INFO_SCALE: 199 + *val = 1000 * data->cfg->kohms; 200 + *val2 = data->cfg->max_pos; 201 + return IIO_VAL_FRACTIONAL; 202 + } 203 + 204 + return -EINVAL; 205 + } 206 + 207 + static int mcp4131_write_raw(struct iio_dev *indio_dev, 208 + struct iio_chan_spec const *chan, 209 + int val, int val2, long mask) 210 + { 211 + int err; 212 + struct mcp4131_data *data = iio_priv(indio_dev); 213 + int address = chan->channel << MCP4131_WIPER_SHIFT; 214 + 215 + switch (mask) { 216 + case IIO_CHAN_INFO_RAW: 217 + if (val > data->cfg->max_pos || val < 0) 218 + return -EINVAL; 219 + break; 220 + 221 + default: 222 + return -EINVAL; 223 + } 224 + 225 + mutex_lock(&data->lock); 226 + 227 + data->buf[0] = address << MCP4131_WIPER_SHIFT; 228 + data->buf[0] |= MCP4131_WRITE | (val >> 8); 229 + data->buf[1] = val & 0xFF; /* 8 bits here */ 230 + 231 + err = spi_write(data->spi, data->buf, 2); 232 + mutex_unlock(&data->lock); 233 + 234 + return err; 235 + } 236 + 237 + static const struct iio_info mcp4131_info = { 238 + .read_raw = mcp4131_read_raw, 239 + .write_raw = mcp4131_write_raw, 240 + .driver_module = THIS_MODULE, 241 + }; 242 + 243 + static int mcp4131_probe(struct spi_device *spi) 244 + { 245 + int err; 246 + struct device *dev = &spi->dev; 247 + unsigned long devid = spi_get_device_id(spi)->driver_data; 248 + struct mcp4131_data *data; 249 + struct iio_dev *indio_dev; 250 + 251 + indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 252 + if (!indio_dev) 253 + return -ENOMEM; 254 + 255 + data = iio_priv(indio_dev); 256 + spi_set_drvdata(spi, indio_dev); 257 + data->spi = spi; 258 + data->cfg = &mcp4131_cfg[devid]; 259 + 260 + mutex_init(&data->lock); 261 + 262 + indio_dev->dev.parent = dev; 263 + indio_dev->info = &mcp4131_info; 264 + indio_dev->channels = mcp4131_channels; 265 + indio_dev->num_channels = data->cfg->wipers; 266 + indio_dev->name = spi_get_device_id(spi)->name; 267 + 268 + err = devm_iio_device_register(dev, indio_dev); 269 + if (err) { 270 + dev_info(&spi->dev, "Unable to register %s\n", indio_dev->name); 271 + return err; 272 + } 273 + 274 + return 0; 275 + } 276 + 277 + #if defined(CONFIG_OF) 278 + static const struct of_device_id mcp4131_dt_ids[] = { 279 + { .compatible = "microchip,mcp4131-502", 280 + .data = &mcp4131_cfg[MCP413x_502] }, 281 + { .compatible = "microchip,mcp4131-103", 282 + .data = &mcp4131_cfg[MCP413x_103] }, 283 + { .compatible = "microchip,mcp4131-503", 284 + .data = &mcp4131_cfg[MCP413x_503] }, 285 + { .compatible = "microchip,mcp4131-104", 286 + .data = &mcp4131_cfg[MCP413x_104] }, 287 + { .compatible = "microchip,mcp4132-502", 288 + .data = &mcp4131_cfg[MCP413x_502] }, 289 + { .compatible = "microchip,mcp4132-103", 290 + .data = &mcp4131_cfg[MCP413x_103] }, 291 + { .compatible = "microchip,mcp4132-503", 292 + .data = &mcp4131_cfg[MCP413x_503] }, 293 + { .compatible = "microchip,mcp4132-104", 294 + .data = &mcp4131_cfg[MCP413x_104] }, 295 + { .compatible = "microchip,mcp4141-502", 296 + .data = &mcp4131_cfg[MCP414x_502] }, 297 + { .compatible = "microchip,mcp4141-103", 298 + .data = &mcp4131_cfg[MCP414x_103] }, 299 + { .compatible = "microchip,mcp4141-503", 300 + .data = &mcp4131_cfg[MCP414x_503] }, 301 + { .compatible = "microchip,mcp4141-104", 302 + .data = &mcp4131_cfg[MCP414x_104] }, 303 + { .compatible = "microchip,mcp4142-502", 304 + .data = &mcp4131_cfg[MCP414x_502] }, 305 + { .compatible = "microchip,mcp4142-103", 306 + .data = &mcp4131_cfg[MCP414x_103] }, 307 + { .compatible = "microchip,mcp4142-503", 308 + .data = &mcp4131_cfg[MCP414x_503] }, 309 + { .compatible = "microchip,mcp4142-104", 310 + .data = &mcp4131_cfg[MCP414x_104] }, 311 + { .compatible = "microchip,mcp4151-502", 312 + .data = &mcp4131_cfg[MCP415x_502] }, 313 + { .compatible = "microchip,mcp4151-103", 314 + .data = &mcp4131_cfg[MCP415x_103] }, 315 + { .compatible = "microchip,mcp4151-503", 316 + .data = &mcp4131_cfg[MCP415x_503] }, 317 + { .compatible = "microchip,mcp4151-104", 318 + .data = &mcp4131_cfg[MCP415x_104] }, 319 + { .compatible = "microchip,mcp4152-502", 320 + .data = &mcp4131_cfg[MCP415x_502] }, 321 + { .compatible = "microchip,mcp4152-103", 322 + .data = &mcp4131_cfg[MCP415x_103] }, 323 + { .compatible = "microchip,mcp4152-503", 324 + .data = &mcp4131_cfg[MCP415x_503] }, 325 + { .compatible = "microchip,mcp4152-104", 326 + .data = &mcp4131_cfg[MCP415x_104] }, 327 + { .compatible = "microchip,mcp4161-502", 328 + .data = &mcp4131_cfg[MCP416x_502] }, 329 + { .compatible = "microchip,mcp4161-103", 330 + .data = &mcp4131_cfg[MCP416x_103] }, 331 + { .compatible = "microchip,mcp4161-503", 332 + .data = &mcp4131_cfg[MCP416x_503] }, 333 + { .compatible = "microchip,mcp4161-104", 334 + .data = &mcp4131_cfg[MCP416x_104] }, 335 + { .compatible = "microchip,mcp4162-502", 336 + .data = &mcp4131_cfg[MCP416x_502] }, 337 + { .compatible = "microchip,mcp4162-103", 338 + .data = &mcp4131_cfg[MCP416x_103] }, 339 + { .compatible = "microchip,mcp4162-503", 340 + .data = &mcp4131_cfg[MCP416x_503] }, 341 + { .compatible = "microchip,mcp4162-104", 342 + .data = &mcp4131_cfg[MCP416x_104] }, 343 + { .compatible = "microchip,mcp4231-502", 344 + .data = &mcp4131_cfg[MCP423x_502] }, 345 + { .compatible = "microchip,mcp4231-103", 346 + .data = &mcp4131_cfg[MCP423x_103] }, 347 + { .compatible = "microchip,mcp4231-503", 348 + .data = &mcp4131_cfg[MCP423x_503] }, 349 + { .compatible = "microchip,mcp4231-104", 350 + .data = &mcp4131_cfg[MCP423x_104] }, 351 + { .compatible = "microchip,mcp4232-502", 352 + .data = &mcp4131_cfg[MCP423x_502] }, 353 + { .compatible = "microchip,mcp4232-103", 354 + .data = &mcp4131_cfg[MCP423x_103] }, 355 + { .compatible = "microchip,mcp4232-503", 356 + .data = &mcp4131_cfg[MCP423x_503] }, 357 + { .compatible = "microchip,mcp4232-104", 358 + .data = &mcp4131_cfg[MCP423x_104] }, 359 + { .compatible = "microchip,mcp4241-502", 360 + .data = &mcp4131_cfg[MCP424x_502] }, 361 + { .compatible = "microchip,mcp4241-103", 362 + .data = &mcp4131_cfg[MCP424x_103] }, 363 + { .compatible = "microchip,mcp4241-503", 364 + .data = &mcp4131_cfg[MCP424x_503] }, 365 + { .compatible = "microchip,mcp4241-104", 366 + .data = &mcp4131_cfg[MCP424x_104] }, 367 + { .compatible = "microchip,mcp4242-502", 368 + .data = &mcp4131_cfg[MCP424x_502] }, 369 + { .compatible = "microchip,mcp4242-103", 370 + .data = &mcp4131_cfg[MCP424x_103] }, 371 + { .compatible = "microchip,mcp4242-503", 372 + .data = &mcp4131_cfg[MCP424x_503] }, 373 + { .compatible = "microchip,mcp4242-104", 374 + .data = &mcp4131_cfg[MCP424x_104] }, 375 + { .compatible = "microchip,mcp4251-502", 376 + .data = &mcp4131_cfg[MCP425x_502] }, 377 + { .compatible = "microchip,mcp4251-103", 378 + .data = &mcp4131_cfg[MCP425x_103] }, 379 + { .compatible = "microchip,mcp4251-503", 380 + .data = &mcp4131_cfg[MCP425x_503] }, 381 + { .compatible = "microchip,mcp4251-104", 382 + .data = &mcp4131_cfg[MCP425x_104] }, 383 + { .compatible = "microchip,mcp4252-502", 384 + .data = &mcp4131_cfg[MCP425x_502] }, 385 + { .compatible = "microchip,mcp4252-103", 386 + .data = &mcp4131_cfg[MCP425x_103] }, 387 + { .compatible = "microchip,mcp4252-503", 388 + .data = &mcp4131_cfg[MCP425x_503] }, 389 + { .compatible = "microchip,mcp4252-104", 390 + .data = &mcp4131_cfg[MCP425x_104] }, 391 + { .compatible = "microchip,mcp4261-502", 392 + .data = &mcp4131_cfg[MCP426x_502] }, 393 + { .compatible = "microchip,mcp4261-103", 394 + .data = &mcp4131_cfg[MCP426x_103] }, 395 + { .compatible = "microchip,mcp4261-503", 396 + .data = &mcp4131_cfg[MCP426x_503] }, 397 + { .compatible = "microchip,mcp4261-104", 398 + .data = &mcp4131_cfg[MCP426x_104] }, 399 + { .compatible = "microchip,mcp4262-502", 400 + .data = &mcp4131_cfg[MCP426x_502] }, 401 + { .compatible = "microchip,mcp4262-103", 402 + .data = &mcp4131_cfg[MCP426x_103] }, 403 + { .compatible = "microchip,mcp4262-503", 404 + .data = &mcp4131_cfg[MCP426x_503] }, 405 + { .compatible = "microchip,mcp4262-104", 406 + .data = &mcp4131_cfg[MCP426x_104] }, 407 + {} 408 + }; 409 + MODULE_DEVICE_TABLE(of, mcp4131_dt_ids); 410 + #endif /* CONFIG_OF */ 411 + 412 + static const struct spi_device_id mcp4131_id[] = { 413 + { "mcp4131-502", MCP413x_502 }, 414 + { "mcp4131-103", MCP413x_103 }, 415 + { "mcp4131-503", MCP413x_503 }, 416 + { "mcp4131-104", MCP413x_104 }, 417 + { "mcp4132-502", MCP413x_502 }, 418 + { "mcp4132-103", MCP413x_103 }, 419 + { "mcp4132-503", MCP413x_503 }, 420 + { "mcp4132-104", MCP413x_104 }, 421 + { "mcp4141-502", MCP414x_502 }, 422 + { "mcp4141-103", MCP414x_103 }, 423 + { "mcp4141-503", MCP414x_503 }, 424 + { "mcp4141-104", MCP414x_104 }, 425 + { "mcp4142-502", MCP414x_502 }, 426 + { "mcp4142-103", MCP414x_103 }, 427 + { "mcp4142-503", MCP414x_503 }, 428 + { "mcp4142-104", MCP414x_104 }, 429 + { "mcp4151-502", MCP415x_502 }, 430 + { "mcp4151-103", MCP415x_103 }, 431 + { "mcp4151-503", MCP415x_503 }, 432 + { "mcp4151-104", MCP415x_104 }, 433 + { "mcp4152-502", MCP415x_502 }, 434 + { "mcp4152-103", MCP415x_103 }, 435 + { "mcp4152-503", MCP415x_503 }, 436 + { "mcp4152-104", MCP415x_104 }, 437 + { "mcp4161-502", MCP416x_502 }, 438 + { "mcp4161-103", MCP416x_103 }, 439 + { "mcp4161-503", MCP416x_503 }, 440 + { "mcp4161-104", MCP416x_104 }, 441 + { "mcp4162-502", MCP416x_502 }, 442 + { "mcp4162-103", MCP416x_103 }, 443 + { "mcp4162-503", MCP416x_503 }, 444 + { "mcp4162-104", MCP416x_104 }, 445 + { "mcp4231-502", MCP423x_502 }, 446 + { "mcp4231-103", MCP423x_103 }, 447 + { "mcp4231-503", MCP423x_503 }, 448 + { "mcp4231-104", MCP423x_104 }, 449 + { "mcp4232-502", MCP423x_502 }, 450 + { "mcp4232-103", MCP423x_103 }, 451 + { "mcp4232-503", MCP423x_503 }, 452 + { "mcp4232-104", MCP423x_104 }, 453 + { "mcp4241-502", MCP424x_502 }, 454 + { "mcp4241-103", MCP424x_103 }, 455 + { "mcp4241-503", MCP424x_503 }, 456 + { "mcp4241-104", MCP424x_104 }, 457 + { "mcp4242-502", MCP424x_502 }, 458 + { "mcp4242-103", MCP424x_103 }, 459 + { "mcp4242-503", MCP424x_503 }, 460 + { "mcp4242-104", MCP424x_104 }, 461 + { "mcp4251-502", MCP425x_502 }, 462 + { "mcp4251-103", MCP425x_103 }, 463 + { "mcp4251-503", MCP425x_503 }, 464 + { "mcp4251-104", MCP425x_104 }, 465 + { "mcp4252-502", MCP425x_502 }, 466 + { "mcp4252-103", MCP425x_103 }, 467 + { "mcp4252-503", MCP425x_503 }, 468 + { "mcp4252-104", MCP425x_104 }, 469 + { "mcp4261-502", MCP426x_502 }, 470 + { "mcp4261-103", MCP426x_103 }, 471 + { "mcp4261-503", MCP426x_503 }, 472 + { "mcp4261-104", MCP426x_104 }, 473 + { "mcp4262-502", MCP426x_502 }, 474 + { "mcp4262-103", MCP426x_103 }, 475 + { "mcp4262-503", MCP426x_503 }, 476 + { "mcp4262-104", MCP426x_104 }, 477 + {} 478 + }; 479 + MODULE_DEVICE_TABLE(spi, mcp4131_id); 480 + 481 + static struct spi_driver mcp4131_driver = { 482 + .driver = { 483 + .name = "mcp4131", 484 + .of_match_table = of_match_ptr(mcp4131_dt_ids), 485 + }, 486 + .probe = mcp4131_probe, 487 + .id_table = mcp4131_id, 488 + }; 489 + 490 + module_spi_driver(mcp4131_driver); 491 + 492 + MODULE_AUTHOR("Slawomir Stepien <sst@poczta.fm>"); 493 + MODULE_DESCRIPTION("MCP4131 digital potentiometer"); 494 + MODULE_LICENSE("GPL v2");
+6 -7
drivers/iio/potentiometer/mcp4531.c
··· 79 79 80 80 struct mcp4531_data { 81 81 struct i2c_client *client; 82 - unsigned long devid; 82 + const struct mcp4531_cfg *cfg; 83 83 }; 84 84 85 85 #define MCP4531_CHANNEL(ch) { \ ··· 113 113 *val = ret; 114 114 return IIO_VAL_INT; 115 115 case IIO_CHAN_INFO_SCALE: 116 - *val = 1000 * mcp4531_cfg[data->devid].kohms; 117 - *val2 = mcp4531_cfg[data->devid].max_pos; 116 + *val = 1000 * data->cfg->kohms; 117 + *val2 = data->cfg->max_pos; 118 118 return IIO_VAL_FRACTIONAL; 119 119 } 120 120 ··· 130 130 131 131 switch (mask) { 132 132 case IIO_CHAN_INFO_RAW: 133 - if (val > mcp4531_cfg[data->devid].max_pos || val < 0) 133 + if (val > data->cfg->max_pos || val < 0) 134 134 return -EINVAL; 135 135 break; 136 136 default: ··· 152 152 const struct i2c_device_id *id) 153 153 { 154 154 struct device *dev = &client->dev; 155 - unsigned long devid = id->driver_data; 156 155 struct mcp4531_data *data; 157 156 struct iio_dev *indio_dev; 158 157 ··· 167 168 data = iio_priv(indio_dev); 168 169 i2c_set_clientdata(client, indio_dev); 169 170 data->client = client; 170 - data->devid = devid; 171 + data->cfg = &mcp4531_cfg[id->driver_data]; 171 172 172 173 indio_dev->dev.parent = dev; 173 174 indio_dev->info = &mcp4531_info; 174 175 indio_dev->channels = mcp4531_channels; 175 - indio_dev->num_channels = mcp4531_cfg[devid].wipers; 176 + indio_dev->num_channels = data->cfg->wipers; 176 177 indio_dev->name = client->name; 177 178 178 179 return devm_iio_device_register(dev, indio_dev);
+1 -1
drivers/iio/potentiometer/tpl0102.c
··· 118 118 119 119 if (!i2c_check_functionality(client->adapter, 120 120 I2C_FUNC_SMBUS_WORD_DATA)) 121 - return -ENOTSUPP; 121 + return -EOPNOTSUPP; 122 122 123 123 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 124 124 if (!indio_dev)
+10
drivers/iio/pressure/Kconfig
··· 148 148 To compile this driver as a module, choose M here: the module 149 149 will be called t5403. 150 150 151 + config HP206C 152 + tristate "HOPERF HP206C precision barometer and altimeter sensor" 153 + depends on I2C 154 + help 155 + Say yes here to build support for the HOPREF HP206C precision 156 + barometer and altimeter sensor. 157 + 158 + This driver can also be built as a module. If so, the module will 159 + be called hp206c. 160 + 151 161 endmenu
+1
drivers/iio/pressure/Makefile
··· 17 17 st_pressure-y := st_pressure_core.o 18 18 st_pressure-$(CONFIG_IIO_BUFFER) += st_pressure_buffer.o 19 19 obj-$(CONFIG_T5403) += t5403.o 20 + obj-$(CONFIG_HP206C) += hp206c.o 20 21 21 22 obj-$(CONFIG_IIO_ST_PRESS_I2C) += st_pressure_i2c.o 22 23 obj-$(CONFIG_IIO_ST_PRESS_SPI) += st_pressure_spi.o
+426
drivers/iio/pressure/hp206c.c
··· 1 + /* 2 + * hp206c.c - HOPERF HP206C precision barometer and altimeter sensor 3 + * 4 + * Copyright (c) 2016, Intel Corporation. 5 + * 6 + * This file is subject to the terms and conditions of version 2 of 7 + * the GNU General Public License. See the file COPYING in the main 8 + * directory of this archive for more details. 9 + * 10 + * (7-bit I2C slave address 0x76) 11 + * 12 + * Datasheet: 13 + * http://www.hoperf.com/upload/sensor/HP206C_DataSheet_EN_V2.0.pdf 14 + */ 15 + 16 + #include <linux/module.h> 17 + #include <linux/i2c.h> 18 + #include <linux/iio/iio.h> 19 + #include <linux/iio/sysfs.h> 20 + #include <linux/delay.h> 21 + #include <linux/util_macros.h> 22 + #include <linux/acpi.h> 23 + 24 + /* I2C commands: */ 25 + #define HP206C_CMD_SOFT_RST 0x06 26 + 27 + #define HP206C_CMD_ADC_CVT 0x40 28 + 29 + #define HP206C_CMD_ADC_CVT_OSR_4096 0x00 30 + #define HP206C_CMD_ADC_CVT_OSR_2048 0x04 31 + #define HP206C_CMD_ADC_CVT_OSR_1024 0x08 32 + #define HP206C_CMD_ADC_CVT_OSR_512 0x0c 33 + #define HP206C_CMD_ADC_CVT_OSR_256 0x10 34 + #define HP206C_CMD_ADC_CVT_OSR_128 0x14 35 + 36 + #define HP206C_CMD_ADC_CVT_CHNL_PT 0x00 37 + #define HP206C_CMD_ADC_CVT_CHNL_T 0x02 38 + 39 + #define HP206C_CMD_READ_P 0x30 40 + #define HP206C_CMD_READ_T 0x32 41 + 42 + #define HP206C_CMD_READ_REG 0x80 43 + #define HP206C_CMD_WRITE_REG 0xc0 44 + 45 + #define HP206C_REG_INT_EN 0x0b 46 + #define HP206C_REG_INT_CFG 0x0c 47 + 48 + #define HP206C_REG_INT_SRC 0x0d 49 + #define HP206C_FLAG_DEV_RDY 0x40 50 + 51 + #define HP206C_REG_PARA 0x0f 52 + #define HP206C_FLAG_CMPS_EN 0x80 53 + 54 + /* Maximum spin for DEV_RDY */ 55 + #define HP206C_MAX_DEV_RDY_WAIT_COUNT 20 56 + #define HP206C_DEV_RDY_WAIT_US 20000 57 + 58 + struct hp206c_data { 59 + struct mutex mutex; 60 + struct i2c_client *client; 61 + int temp_osr_index; 62 + int pres_osr_index; 63 + }; 64 + 65 + struct hp206c_osr_setting { 66 + u8 osr_mask; 67 + unsigned int temp_conv_time_us; 68 + unsigned int pres_conv_time_us; 69 + }; 70 + 71 + /* Data from Table 5 in datasheet. */ 72 + static const struct hp206c_osr_setting hp206c_osr_settings[] = { 73 + { HP206C_CMD_ADC_CVT_OSR_4096, 65600, 131100 }, 74 + { HP206C_CMD_ADC_CVT_OSR_2048, 32800, 65600 }, 75 + { HP206C_CMD_ADC_CVT_OSR_1024, 16400, 32800 }, 76 + { HP206C_CMD_ADC_CVT_OSR_512, 8200, 16400 }, 77 + { HP206C_CMD_ADC_CVT_OSR_256, 4100, 8200 }, 78 + { HP206C_CMD_ADC_CVT_OSR_128, 2100, 4100 }, 79 + }; 80 + static const int hp206c_osr_rates[] = { 4096, 2048, 1024, 512, 256, 128 }; 81 + static const char hp206c_osr_rates_str[] = "4096 2048 1024 512 256 128"; 82 + 83 + static inline int hp206c_read_reg(struct i2c_client *client, u8 reg) 84 + { 85 + return i2c_smbus_read_byte_data(client, HP206C_CMD_READ_REG | reg); 86 + } 87 + 88 + static inline int hp206c_write_reg(struct i2c_client *client, u8 reg, u8 val) 89 + { 90 + return i2c_smbus_write_byte_data(client, 91 + HP206C_CMD_WRITE_REG | reg, val); 92 + } 93 + 94 + static int hp206c_read_20bit(struct i2c_client *client, u8 cmd) 95 + { 96 + int ret; 97 + u8 values[3]; 98 + 99 + ret = i2c_smbus_read_i2c_block_data(client, cmd, 3, values); 100 + if (ret < 0) 101 + return ret; 102 + if (ret != 3) 103 + return -EIO; 104 + return ((values[0] & 0xF) << 16) | (values[1] << 8) | (values[2]); 105 + } 106 + 107 + /* Spin for max 160ms until DEV_RDY is 1, or return error. */ 108 + static int hp206c_wait_dev_rdy(struct iio_dev *indio_dev) 109 + { 110 + int ret; 111 + int count = 0; 112 + struct hp206c_data *data = iio_priv(indio_dev); 113 + struct i2c_client *client = data->client; 114 + 115 + while (++count <= HP206C_MAX_DEV_RDY_WAIT_COUNT) { 116 + ret = hp206c_read_reg(client, HP206C_REG_INT_SRC); 117 + if (ret < 0) { 118 + dev_err(&indio_dev->dev, "Failed READ_REG INT_SRC: %d\n", ret); 119 + return ret; 120 + } 121 + if (ret & HP206C_FLAG_DEV_RDY) 122 + return 0; 123 + usleep_range(HP206C_DEV_RDY_WAIT_US, HP206C_DEV_RDY_WAIT_US * 3 / 2); 124 + } 125 + return -ETIMEDOUT; 126 + } 127 + 128 + static int hp206c_set_compensation(struct i2c_client *client, bool enabled) 129 + { 130 + int val; 131 + 132 + val = hp206c_read_reg(client, HP206C_REG_PARA); 133 + if (val < 0) 134 + return val; 135 + if (enabled) 136 + val |= HP206C_FLAG_CMPS_EN; 137 + else 138 + val &= ~HP206C_FLAG_CMPS_EN; 139 + 140 + return hp206c_write_reg(client, HP206C_REG_PARA, val); 141 + } 142 + 143 + /* Do a soft reset */ 144 + static int hp206c_soft_reset(struct iio_dev *indio_dev) 145 + { 146 + int ret; 147 + struct hp206c_data *data = iio_priv(indio_dev); 148 + struct i2c_client *client = data->client; 149 + 150 + ret = i2c_smbus_write_byte(client, HP206C_CMD_SOFT_RST); 151 + if (ret) { 152 + dev_err(&client->dev, "Failed to reset device: %d\n", ret); 153 + return ret; 154 + } 155 + 156 + usleep_range(400, 600); 157 + 158 + ret = hp206c_wait_dev_rdy(indio_dev); 159 + if (ret) { 160 + dev_err(&client->dev, "Device not ready after soft reset: %d\n", ret); 161 + return ret; 162 + } 163 + 164 + ret = hp206c_set_compensation(client, true); 165 + if (ret) 166 + dev_err(&client->dev, "Failed to enable compensation: %d\n", ret); 167 + return ret; 168 + } 169 + 170 + static int hp206c_conv_and_read(struct iio_dev *indio_dev, 171 + u8 conv_cmd, u8 read_cmd, 172 + unsigned int sleep_us) 173 + { 174 + int ret; 175 + struct hp206c_data *data = iio_priv(indio_dev); 176 + struct i2c_client *client = data->client; 177 + 178 + ret = hp206c_wait_dev_rdy(indio_dev); 179 + if (ret < 0) { 180 + dev_err(&indio_dev->dev, "Device not ready: %d\n", ret); 181 + return ret; 182 + } 183 + 184 + ret = i2c_smbus_write_byte(client, conv_cmd); 185 + if (ret < 0) { 186 + dev_err(&indio_dev->dev, "Failed convert: %d\n", ret); 187 + return ret; 188 + } 189 + 190 + usleep_range(sleep_us, sleep_us * 3 / 2); 191 + 192 + ret = hp206c_wait_dev_rdy(indio_dev); 193 + if (ret < 0) { 194 + dev_err(&indio_dev->dev, "Device not ready: %d\n", ret); 195 + return ret; 196 + } 197 + 198 + ret = hp206c_read_20bit(client, read_cmd); 199 + if (ret < 0) 200 + dev_err(&indio_dev->dev, "Failed read: %d\n", ret); 201 + 202 + return ret; 203 + } 204 + 205 + static int hp206c_read_raw(struct iio_dev *indio_dev, 206 + struct iio_chan_spec const *chan, int *val, 207 + int *val2, long mask) 208 + { 209 + int ret; 210 + struct hp206c_data *data = iio_priv(indio_dev); 211 + const struct hp206c_osr_setting *osr_setting; 212 + u8 conv_cmd; 213 + 214 + mutex_lock(&data->mutex); 215 + 216 + switch (mask) { 217 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 218 + switch (chan->type) { 219 + case IIO_TEMP: 220 + *val = hp206c_osr_rates[data->temp_osr_index]; 221 + ret = IIO_VAL_INT; 222 + break; 223 + 224 + case IIO_PRESSURE: 225 + *val = hp206c_osr_rates[data->pres_osr_index]; 226 + ret = IIO_VAL_INT; 227 + break; 228 + default: 229 + ret = -EINVAL; 230 + } 231 + break; 232 + 233 + case IIO_CHAN_INFO_RAW: 234 + switch (chan->type) { 235 + case IIO_TEMP: 236 + osr_setting = &hp206c_osr_settings[data->temp_osr_index]; 237 + conv_cmd = HP206C_CMD_ADC_CVT | 238 + osr_setting->osr_mask | 239 + HP206C_CMD_ADC_CVT_CHNL_T; 240 + ret = hp206c_conv_and_read(indio_dev, 241 + conv_cmd, 242 + HP206C_CMD_READ_T, 243 + osr_setting->temp_conv_time_us); 244 + if (ret >= 0) { 245 + /* 20 significant bits are provided. 246 + * Extend sign over the rest. 247 + */ 248 + *val = sign_extend32(ret, 19); 249 + ret = IIO_VAL_INT; 250 + } 251 + break; 252 + 253 + case IIO_PRESSURE: 254 + osr_setting = &hp206c_osr_settings[data->pres_osr_index]; 255 + conv_cmd = HP206C_CMD_ADC_CVT | 256 + osr_setting->osr_mask | 257 + HP206C_CMD_ADC_CVT_CHNL_PT; 258 + ret = hp206c_conv_and_read(indio_dev, 259 + conv_cmd, 260 + HP206C_CMD_READ_P, 261 + osr_setting->pres_conv_time_us); 262 + if (ret >= 0) { 263 + *val = ret; 264 + ret = IIO_VAL_INT; 265 + } 266 + break; 267 + default: 268 + ret = -EINVAL; 269 + } 270 + break; 271 + 272 + case IIO_CHAN_INFO_SCALE: 273 + switch (chan->type) { 274 + case IIO_TEMP: 275 + *val = 0; 276 + *val2 = 10000; 277 + ret = IIO_VAL_INT_PLUS_MICRO; 278 + break; 279 + 280 + case IIO_PRESSURE: 281 + *val = 0; 282 + *val2 = 1000; 283 + ret = IIO_VAL_INT_PLUS_MICRO; 284 + break; 285 + default: 286 + ret = -EINVAL; 287 + } 288 + break; 289 + 290 + default: 291 + ret = -EINVAL; 292 + } 293 + 294 + mutex_unlock(&data->mutex); 295 + return ret; 296 + } 297 + 298 + static int hp206c_write_raw(struct iio_dev *indio_dev, 299 + struct iio_chan_spec const *chan, 300 + int val, int val2, long mask) 301 + { 302 + int ret = 0; 303 + struct hp206c_data *data = iio_priv(indio_dev); 304 + 305 + if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO) 306 + return -EINVAL; 307 + mutex_lock(&data->mutex); 308 + switch (chan->type) { 309 + case IIO_TEMP: 310 + data->temp_osr_index = find_closest_descending(val, 311 + hp206c_osr_rates, ARRAY_SIZE(hp206c_osr_rates)); 312 + break; 313 + case IIO_PRESSURE: 314 + data->pres_osr_index = find_closest_descending(val, 315 + hp206c_osr_rates, ARRAY_SIZE(hp206c_osr_rates)); 316 + break; 317 + default: 318 + ret = -EINVAL; 319 + } 320 + mutex_unlock(&data->mutex); 321 + return ret; 322 + } 323 + 324 + static const struct iio_chan_spec hp206c_channels[] = { 325 + { 326 + .type = IIO_TEMP, 327 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 328 + BIT(IIO_CHAN_INFO_SCALE) | 329 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 330 + }, 331 + { 332 + .type = IIO_PRESSURE, 333 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 334 + BIT(IIO_CHAN_INFO_SCALE) | 335 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 336 + } 337 + }; 338 + 339 + static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(hp206c_osr_rates_str); 340 + 341 + static struct attribute *hp206c_attributes[] = { 342 + &iio_const_attr_sampling_frequency_available.dev_attr.attr, 343 + NULL, 344 + }; 345 + 346 + static const struct attribute_group hp206c_attribute_group = { 347 + .attrs = hp206c_attributes, 348 + }; 349 + 350 + static const struct iio_info hp206c_info = { 351 + .attrs = &hp206c_attribute_group, 352 + .read_raw = hp206c_read_raw, 353 + .write_raw = hp206c_write_raw, 354 + .driver_module = THIS_MODULE, 355 + }; 356 + 357 + static int hp206c_probe(struct i2c_client *client, 358 + const struct i2c_device_id *id) 359 + { 360 + struct iio_dev *indio_dev; 361 + struct hp206c_data *data; 362 + int ret; 363 + 364 + if (!i2c_check_functionality(client->adapter, 365 + I2C_FUNC_SMBUS_BYTE | 366 + I2C_FUNC_SMBUS_BYTE_DATA | 367 + I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { 368 + dev_err(&client->dev, "Adapter does not support " 369 + "all required i2c functionality\n"); 370 + return -ENODEV; 371 + } 372 + 373 + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 374 + if (!indio_dev) 375 + return -ENOMEM; 376 + 377 + data = iio_priv(indio_dev); 378 + data->client = client; 379 + mutex_init(&data->mutex); 380 + 381 + indio_dev->info = &hp206c_info; 382 + indio_dev->name = id->name; 383 + indio_dev->dev.parent = &client->dev; 384 + indio_dev->modes = INDIO_DIRECT_MODE; 385 + indio_dev->channels = hp206c_channels; 386 + indio_dev->num_channels = ARRAY_SIZE(hp206c_channels); 387 + 388 + i2c_set_clientdata(client, indio_dev); 389 + 390 + /* Do a soft reset on probe */ 391 + ret = hp206c_soft_reset(indio_dev); 392 + if (ret) { 393 + dev_err(&client->dev, "Failed to reset on startup: %d\n", ret); 394 + return -ENODEV; 395 + } 396 + 397 + return devm_iio_device_register(&client->dev, indio_dev); 398 + } 399 + 400 + static const struct i2c_device_id hp206c_id[] = { 401 + {"hp206c"}, 402 + {} 403 + }; 404 + 405 + #ifdef CONFIG_ACPI 406 + static const struct acpi_device_id hp206c_acpi_match[] = { 407 + {"HOP206C", 0}, 408 + { }, 409 + }; 410 + MODULE_DEVICE_TABLE(acpi, hp206c_acpi_match); 411 + #endif 412 + 413 + static struct i2c_driver hp206c_driver = { 414 + .probe = hp206c_probe, 415 + .id_table = hp206c_id, 416 + .driver = { 417 + .name = "hp206c", 418 + .acpi_match_table = ACPI_PTR(hp206c_acpi_match), 419 + }, 420 + }; 421 + 422 + module_i2c_driver(hp206c_driver); 423 + 424 + MODULE_DESCRIPTION("HOPERF HP206C precision barometer and altimeter sensor"); 425 + MODULE_AUTHOR("Leonard Crestez <leonard.crestez@intel.com>"); 426 + MODULE_LICENSE("GPL v2");
+17 -6
drivers/iio/pressure/ms5611.h
··· 16 16 #include <linux/iio/iio.h> 17 17 #include <linux/mutex.h> 18 18 19 + struct regulator; 20 + 19 21 #define MS5611_RESET 0x1e 20 22 #define MS5611_READ_ADC 0x00 21 23 #define MS5611_READ_PROM_WORD 0xA0 22 - #define MS5611_START_TEMP_CONV 0x58 23 - #define MS5611_START_PRESSURE_CONV 0x48 24 - 25 - #define MS5611_CONV_TIME_MIN 9040 26 - #define MS5611_CONV_TIME_MAX 10000 27 - 28 24 #define MS5611_PROM_WORDS_NB 8 29 25 30 26 enum { ··· 35 39 s32 *temp, s32 *pressure); 36 40 }; 37 41 42 + /* 43 + * OverSampling Rate descriptor. 44 + * Warning: cmd MUST be kept aligned on a word boundary (see 45 + * m5611_spi_read_adc_temp_and_pressure in ms5611_spi.c). 46 + */ 47 + struct ms5611_osr { 48 + unsigned long conv_usec; 49 + u8 cmd; 50 + unsigned short rate; 51 + }; 52 + 38 53 struct ms5611_state { 39 54 void *client; 40 55 struct mutex lock; 56 + 57 + const struct ms5611_osr *pressure_osr; 58 + const struct ms5611_osr *temp_osr; 41 59 42 60 int (*reset)(struct device *dev); 43 61 int (*read_prom_word)(struct device *dev, int index, u16 *word); ··· 59 49 s32 *temp, s32 *pressure); 60 50 61 51 struct ms5611_chip_info *chip_info; 52 + struct regulator *vdd; 62 53 }; 63 54 64 55 int ms5611_probe(struct iio_dev *indio_dev, struct device *dev,
+135 -11
drivers/iio/pressure/ms5611_core.c
··· 18 18 #include <linux/delay.h> 19 19 #include <linux/regulator/consumer.h> 20 20 21 + #include <linux/iio/sysfs.h> 21 22 #include <linux/iio/buffer.h> 22 23 #include <linux/iio/triggered_buffer.h> 23 24 #include <linux/iio/trigger_consumer.h> 24 25 #include "ms5611.h" 26 + 27 + #define MS5611_INIT_OSR(_cmd, _conv_usec, _rate) \ 28 + { .cmd = _cmd, .conv_usec = _conv_usec, .rate = _rate } 29 + 30 + static const struct ms5611_osr ms5611_avail_pressure_osr[] = { 31 + MS5611_INIT_OSR(0x40, 600, 256), 32 + MS5611_INIT_OSR(0x42, 1170, 512), 33 + MS5611_INIT_OSR(0x44, 2280, 1024), 34 + MS5611_INIT_OSR(0x46, 4540, 2048), 35 + MS5611_INIT_OSR(0x48, 9040, 4096) 36 + }; 37 + 38 + static const struct ms5611_osr ms5611_avail_temp_osr[] = { 39 + MS5611_INIT_OSR(0x50, 600, 256), 40 + MS5611_INIT_OSR(0x52, 1170, 512), 41 + MS5611_INIT_OSR(0x54, 2280, 1024), 42 + MS5611_INIT_OSR(0x56, 4540, 2048), 43 + MS5611_INIT_OSR(0x58, 9040, 4096) 44 + }; 45 + 46 + static const char ms5611_show_osr[] = "256 512 1024 2048 4096"; 47 + 48 + static IIO_CONST_ATTR(oversampling_ratio_available, ms5611_show_osr); 49 + 50 + static struct attribute *ms5611_attributes[] = { 51 + &iio_const_attr_oversampling_ratio_available.dev_attr.attr, 52 + NULL, 53 + }; 54 + 55 + static const struct attribute_group ms5611_attribute_group = { 56 + .attrs = ms5611_attributes, 57 + }; 25 58 26 59 static bool ms5611_prom_is_valid(u16 *prom, size_t len) 27 60 { ··· 272 239 default: 273 240 return -EINVAL; 274 241 } 242 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 243 + if (chan->type != IIO_TEMP && chan->type != IIO_PRESSURE) 244 + break; 245 + mutex_lock(&st->lock); 246 + if (chan->type == IIO_TEMP) 247 + *val = (int)st->temp_osr->rate; 248 + else 249 + *val = (int)st->pressure_osr->rate; 250 + mutex_unlock(&st->lock); 251 + return IIO_VAL_INT; 275 252 } 276 253 277 254 return -EINVAL; 255 + } 256 + 257 + static const struct ms5611_osr *ms5611_find_osr(int rate, 258 + const struct ms5611_osr *osr, 259 + size_t count) 260 + { 261 + unsigned int r; 262 + 263 + for (r = 0; r < count; r++) 264 + if ((unsigned short)rate == osr[r].rate) 265 + break; 266 + if (r >= count) 267 + return NULL; 268 + return &osr[r]; 269 + } 270 + 271 + static int ms5611_write_raw(struct iio_dev *indio_dev, 272 + struct iio_chan_spec const *chan, 273 + int val, int val2, long mask) 274 + { 275 + struct ms5611_state *st = iio_priv(indio_dev); 276 + const struct ms5611_osr *osr = NULL; 277 + 278 + if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO) 279 + return -EINVAL; 280 + 281 + if (chan->type == IIO_TEMP) 282 + osr = ms5611_find_osr(val, ms5611_avail_temp_osr, 283 + ARRAY_SIZE(ms5611_avail_temp_osr)); 284 + else if (chan->type == IIO_PRESSURE) 285 + osr = ms5611_find_osr(val, ms5611_avail_pressure_osr, 286 + ARRAY_SIZE(ms5611_avail_pressure_osr)); 287 + if (!osr) 288 + return -EINVAL; 289 + 290 + mutex_lock(&st->lock); 291 + 292 + if (iio_buffer_enabled(indio_dev)) { 293 + mutex_unlock(&st->lock); 294 + return -EBUSY; 295 + } 296 + 297 + if (chan->type == IIO_TEMP) 298 + st->temp_osr = osr; 299 + else 300 + st->pressure_osr = osr; 301 + 302 + mutex_unlock(&st->lock); 303 + return 0; 278 304 } 279 305 280 306 static const unsigned long ms5611_scan_masks[] = {0x3, 0}; ··· 351 259 { 352 260 .type = IIO_PRESSURE, 353 261 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 354 - BIT(IIO_CHAN_INFO_SCALE), 262 + BIT(IIO_CHAN_INFO_SCALE) | 263 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 355 264 .scan_index = 0, 356 265 .scan_type = { 357 266 .sign = 's', ··· 364 271 { 365 272 .type = IIO_TEMP, 366 273 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 367 - BIT(IIO_CHAN_INFO_SCALE), 274 + BIT(IIO_CHAN_INFO_SCALE) | 275 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 368 276 .scan_index = 1, 369 277 .scan_type = { 370 278 .sign = 's', ··· 379 285 380 286 static const struct iio_info ms5611_info = { 381 287 .read_raw = &ms5611_read_raw, 288 + .write_raw = &ms5611_write_raw, 289 + .attrs = &ms5611_attribute_group, 382 290 .driver_module = THIS_MODULE, 383 291 }; 384 292 385 293 static int ms5611_init(struct iio_dev *indio_dev) 386 294 { 387 295 int ret; 388 - struct regulator *vdd = devm_regulator_get(indio_dev->dev.parent, 389 - "vdd"); 296 + struct ms5611_state *st = iio_priv(indio_dev); 390 297 391 298 /* Enable attached regulator if any. */ 392 - if (!IS_ERR(vdd)) { 393 - ret = regulator_enable(vdd); 299 + st->vdd = devm_regulator_get(indio_dev->dev.parent, "vdd"); 300 + if (!IS_ERR(st->vdd)) { 301 + ret = regulator_enable(st->vdd); 394 302 if (ret) { 395 303 dev_err(indio_dev->dev.parent, 396 - "failed to enable Vdd supply: %d\n", ret); 304 + "failed to enable Vdd supply: %d\n", ret); 397 305 return ret; 398 306 } 307 + } else { 308 + ret = PTR_ERR(st->vdd); 309 + if (ret != -ENODEV) 310 + return ret; 399 311 } 400 312 401 313 ret = ms5611_reset(indio_dev); 402 314 if (ret < 0) 403 - return ret; 315 + goto err_regulator_disable; 404 316 405 - return ms5611_read_prom(indio_dev); 317 + ret = ms5611_read_prom(indio_dev); 318 + if (ret < 0) 319 + goto err_regulator_disable; 320 + 321 + return 0; 322 + 323 + err_regulator_disable: 324 + if (!IS_ERR_OR_NULL(st->vdd)) 325 + regulator_disable(st->vdd); 326 + return ret; 327 + } 328 + 329 + static void ms5611_fini(const struct iio_dev *indio_dev) 330 + { 331 + const struct ms5611_state *st = iio_priv(indio_dev); 332 + 333 + if (!IS_ERR_OR_NULL(st->vdd)) 334 + regulator_disable(st->vdd); 406 335 } 407 336 408 337 int ms5611_probe(struct iio_dev *indio_dev, struct device *dev, ··· 436 319 437 320 mutex_init(&st->lock); 438 321 st->chip_info = &chip_info_tbl[type]; 322 + st->temp_osr = 323 + &ms5611_avail_temp_osr[ARRAY_SIZE(ms5611_avail_temp_osr) - 1]; 324 + st->pressure_osr = 325 + &ms5611_avail_pressure_osr[ARRAY_SIZE(ms5611_avail_pressure_osr) 326 + - 1]; 439 327 indio_dev->dev.parent = dev; 440 328 indio_dev->name = name; 441 329 indio_dev->info = &ms5611_info; ··· 457 335 ms5611_trigger_handler, NULL); 458 336 if (ret < 0) { 459 337 dev_err(dev, "iio triggered buffer setup failed\n"); 460 - return ret; 338 + goto err_fini; 461 339 } 462 340 463 341 ret = iio_device_register(indio_dev); ··· 470 348 471 349 err_buffer_cleanup: 472 350 iio_triggered_buffer_cleanup(indio_dev); 473 - 351 + err_fini: 352 + ms5611_fini(indio_dev); 474 353 return ret; 475 354 } 476 355 EXPORT_SYMBOL(ms5611_probe); ··· 480 357 { 481 358 iio_device_unregister(indio_dev); 482 359 iio_triggered_buffer_cleanup(indio_dev); 360 + ms5611_fini(indio_dev); 483 361 484 362 return 0; 485 363 }
+19 -6
drivers/iio/pressure/ms5611_i2c.c
··· 17 17 #include <linux/delay.h> 18 18 #include <linux/i2c.h> 19 19 #include <linux/module.h> 20 + #include <linux/of_device.h> 20 21 21 22 #include "ms5611.h" 22 23 ··· 63 62 { 64 63 int ret; 65 64 struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev)); 65 + const struct ms5611_osr *osr = st->temp_osr; 66 66 67 - ret = i2c_smbus_write_byte(st->client, MS5611_START_TEMP_CONV); 67 + ret = i2c_smbus_write_byte(st->client, osr->cmd); 68 68 if (ret < 0) 69 69 return ret; 70 70 71 - usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX); 72 - 71 + usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL)); 73 72 ret = ms5611_i2c_read_adc(st, temp); 74 73 if (ret < 0) 75 74 return ret; 76 75 77 - ret = i2c_smbus_write_byte(st->client, MS5611_START_PRESSURE_CONV); 76 + osr = st->pressure_osr; 77 + ret = i2c_smbus_write_byte(st->client, osr->cmd); 78 78 if (ret < 0) 79 79 return ret; 80 80 81 - usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX); 82 - 81 + usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL)); 83 82 return ms5611_i2c_read_adc(st, pressure); 84 83 } 85 84 ··· 114 113 return ms5611_remove(i2c_get_clientdata(client)); 115 114 } 116 115 116 + #if defined(CONFIG_OF) 117 + static const struct of_device_id ms5611_i2c_matches[] = { 118 + { .compatible = "meas,ms5611" }, 119 + { .compatible = "ms5611" }, 120 + { .compatible = "meas,ms5607" }, 121 + { .compatible = "ms5607" }, 122 + { } 123 + }; 124 + MODULE_DEVICE_TABLE(of, ms5611_i2c_matches); 125 + #endif 126 + 117 127 static const struct i2c_device_id ms5611_id[] = { 118 128 { "ms5611", MS5611 }, 119 129 { "ms5607", MS5607 }, ··· 135 123 static struct i2c_driver ms5611_driver = { 136 124 .driver = { 137 125 .name = "ms5611", 126 + .of_match_table = of_match_ptr(ms5611_i2c_matches) 138 127 }, 139 128 .id_table = ms5611_id, 140 129 .probe = ms5611_i2c_probe,
+23 -9
drivers/iio/pressure/ms5611_spi.c
··· 12 12 #include <linux/delay.h> 13 13 #include <linux/module.h> 14 14 #include <linux/spi/spi.h> 15 + #include <linux/of_device.h> 15 16 16 17 #include "ms5611.h" 17 18 ··· 56 55 static int ms5611_spi_read_adc_temp_and_pressure(struct device *dev, 57 56 s32 *temp, s32 *pressure) 58 57 { 59 - u8 cmd; 60 58 int ret; 61 59 struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev)); 60 + const struct ms5611_osr *osr = st->temp_osr; 62 61 63 - cmd = MS5611_START_TEMP_CONV; 64 - ret = spi_write_then_read(st->client, &cmd, 1, NULL, 0); 62 + /* 63 + * Warning: &osr->cmd MUST be aligned on a word boundary since used as 64 + * 2nd argument (void*) of spi_write_then_read. 65 + */ 66 + ret = spi_write_then_read(st->client, &osr->cmd, 1, NULL, 0); 65 67 if (ret < 0) 66 68 return ret; 67 69 68 - usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX); 69 - 70 + usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL)); 70 71 ret = ms5611_spi_read_adc(dev, temp); 71 72 if (ret < 0) 72 73 return ret; 73 74 74 - cmd = MS5611_START_PRESSURE_CONV; 75 - ret = spi_write_then_read(st->client, &cmd, 1, NULL, 0); 75 + osr = st->pressure_osr; 76 + ret = spi_write_then_read(st->client, &osr->cmd, 1, NULL, 0); 76 77 if (ret < 0) 77 78 return ret; 78 79 79 - usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX); 80 - 80 + usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL)); 81 81 return ms5611_spi_read_adc(dev, pressure); 82 82 } 83 83 ··· 116 114 return ms5611_remove(spi_get_drvdata(spi)); 117 115 } 118 116 117 + #if defined(CONFIG_OF) 118 + static const struct of_device_id ms5611_spi_matches[] = { 119 + { .compatible = "meas,ms5611" }, 120 + { .compatible = "ms5611" }, 121 + { .compatible = "meas,ms5607" }, 122 + { .compatible = "ms5607" }, 123 + { } 124 + }; 125 + MODULE_DEVICE_TABLE(of, ms5611_spi_matches); 126 + #endif 127 + 119 128 static const struct spi_device_id ms5611_id[] = { 120 129 { "ms5611", MS5611 }, 121 130 { "ms5607", MS5607 }, ··· 137 124 static struct spi_driver ms5611_driver = { 138 125 .driver = { 139 126 .name = "ms5611", 127 + .of_match_table = of_match_ptr(ms5611_spi_matches) 140 128 }, 141 129 .id_table = ms5611_id, 142 130 .probe = ms5611_spi_probe,
-23
drivers/staging/iio/accel/Kconfig
··· 27 27 To compile this driver as a module, say M here: the module will be 28 28 called adis16203. 29 29 30 - config ADIS16204 31 - tristate "Analog Devices ADIS16204 Programmable High-g Digital Impact Sensor and Recorder" 32 - depends on SPI 33 - select IIO_ADIS_LIB 34 - select IIO_ADIS_LIB_BUFFER if IIO_BUFFER 35 - help 36 - Say Y here to build support for Analog Devices adis16204 Programmable 37 - High-g Digital Impact Sensor and Recorder. 38 - 39 - To compile this driver as a module, say M here: the module will be 40 - called adis16204. 41 - 42 30 config ADIS16209 43 31 tristate "Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer" 44 32 depends on SPI ··· 38 50 39 51 To compile this driver as a module, say M here: the module will be 40 52 called adis16209. 41 - 42 - config ADIS16220 43 - tristate "Analog Devices ADIS16220 Programmable Digital Vibration Sensor" 44 - depends on SPI 45 - select IIO_ADIS_LIB 46 - help 47 - Say Y here to build support for Analog Devices adis16220 programmable 48 - digital vibration sensor. 49 - 50 - To compile this driver as a module, say M here: the module will be 51 - called adis16220. 52 53 53 54 config ADIS16240 54 55 tristate "Analog Devices ADIS16240 Programmable Impact Sensor and Recorder"
-6
drivers/staging/iio/accel/Makefile
··· 8 8 adis16203-y := adis16203_core.o 9 9 obj-$(CONFIG_ADIS16203) += adis16203.o 10 10 11 - adis16204-y := adis16204_core.o 12 - obj-$(CONFIG_ADIS16204) += adis16204.o 13 - 14 11 adis16209-y := adis16209_core.o 15 12 obj-$(CONFIG_ADIS16209) += adis16209.o 16 - 17 - adis16220-y := adis16220_core.o 18 - obj-$(CONFIG_ADIS16220) += adis16220.o 19 13 20 14 adis16240-y := adis16240_core.o 21 15 obj-$(CONFIG_ADIS16240) += adis16240.o
-145
drivers/staging/iio/accel/adis16204.h
··· 1 - #ifndef SPI_ADIS16204_H_ 2 - #define SPI_ADIS16204_H_ 3 - 4 - #define ADIS16204_STARTUP_DELAY 220 /* ms */ 5 - 6 - /* Flash memory write count */ 7 - #define ADIS16204_FLASH_CNT 0x00 8 - 9 - /* Output, power supply */ 10 - #define ADIS16204_SUPPLY_OUT 0x02 11 - 12 - /* Output, x-axis accelerometer */ 13 - #define ADIS16204_XACCL_OUT 0x04 14 - 15 - /* Output, y-axis accelerometer */ 16 - #define ADIS16204_YACCL_OUT 0x06 17 - 18 - /* Output, auxiliary ADC input */ 19 - #define ADIS16204_AUX_ADC 0x08 20 - 21 - /* Output, temperature */ 22 - #define ADIS16204_TEMP_OUT 0x0A 23 - 24 - /* Twos complement */ 25 - #define ADIS16204_X_PEAK_OUT 0x0C 26 - #define ADIS16204_Y_PEAK_OUT 0x0E 27 - 28 - /* Calibration, x-axis acceleration offset null */ 29 - #define ADIS16204_XACCL_NULL 0x10 30 - 31 - /* Calibration, y-axis acceleration offset null */ 32 - #define ADIS16204_YACCL_NULL 0x12 33 - 34 - /* X-axis scale factor calibration register */ 35 - #define ADIS16204_XACCL_SCALE 0x14 36 - 37 - /* Y-axis scale factor calibration register */ 38 - #define ADIS16204_YACCL_SCALE 0x16 39 - 40 - /* XY combined acceleration (RSS) */ 41 - #define ADIS16204_XY_RSS_OUT 0x18 42 - 43 - /* Peak, XY combined output (RSS) */ 44 - #define ADIS16204_XY_PEAK_OUT 0x1A 45 - 46 - /* Capture buffer output register 1 */ 47 - #define ADIS16204_CAP_BUF_1 0x1C 48 - 49 - /* Capture buffer output register 2 */ 50 - #define ADIS16204_CAP_BUF_2 0x1E 51 - 52 - /* Alarm 1 amplitude threshold */ 53 - #define ADIS16204_ALM_MAG1 0x20 54 - 55 - /* Alarm 2 amplitude threshold */ 56 - #define ADIS16204_ALM_MAG2 0x22 57 - 58 - /* Alarm control */ 59 - #define ADIS16204_ALM_CTRL 0x28 60 - 61 - /* Capture register address pointer */ 62 - #define ADIS16204_CAPT_PNTR 0x2A 63 - 64 - /* Auxiliary DAC data */ 65 - #define ADIS16204_AUX_DAC 0x30 66 - 67 - /* General-purpose digital input/output control */ 68 - #define ADIS16204_GPIO_CTRL 0x32 69 - 70 - /* Miscellaneous control */ 71 - #define ADIS16204_MSC_CTRL 0x34 72 - 73 - /* Internal sample period (rate) control */ 74 - #define ADIS16204_SMPL_PRD 0x36 75 - 76 - /* Operation, filter configuration */ 77 - #define ADIS16204_AVG_CNT 0x38 78 - 79 - /* Operation, sleep mode control */ 80 - #define ADIS16204_SLP_CNT 0x3A 81 - 82 - /* Diagnostics, system status register */ 83 - #define ADIS16204_DIAG_STAT 0x3C 84 - 85 - /* Operation, system command register */ 86 - #define ADIS16204_GLOB_CMD 0x3E 87 - 88 - /* MSC_CTRL */ 89 - 90 - /* Self-test at power-on: 1 = disabled, 0 = enabled */ 91 - #define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST BIT(10) 92 - 93 - /* Self-test enable */ 94 - #define ADIS16204_MSC_CTRL_SELF_TEST_EN BIT(8) 95 - 96 - /* Data-ready enable: 1 = enabled, 0 = disabled */ 97 - #define ADIS16204_MSC_CTRL_DATA_RDY_EN BIT(2) 98 - 99 - /* Data-ready polarity: 1 = active high, 0 = active low */ 100 - #define ADIS16204_MSC_CTRL_ACTIVE_HIGH BIT(1) 101 - 102 - /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */ 103 - #define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 BIT(0) 104 - 105 - /* DIAG_STAT */ 106 - 107 - /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */ 108 - #define ADIS16204_DIAG_STAT_ALARM2 BIT(9) 109 - 110 - /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */ 111 - #define ADIS16204_DIAG_STAT_ALARM1 BIT(8) 112 - 113 - /* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */ 114 - #define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5 115 - 116 - /* SPI communications failure */ 117 - #define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3 118 - 119 - /* Flash update failure */ 120 - #define ADIS16204_DIAG_STAT_FLASH_UPT_BIT 2 121 - 122 - /* Power supply above 3.625 V */ 123 - #define ADIS16204_DIAG_STAT_POWER_HIGH_BIT 1 124 - 125 - /* Power supply below 2.975 V */ 126 - #define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0 127 - 128 - /* GLOB_CMD */ 129 - 130 - #define ADIS16204_GLOB_CMD_SW_RESET BIT(7) 131 - #define ADIS16204_GLOB_CMD_CLEAR_STAT BIT(4) 132 - #define ADIS16204_GLOB_CMD_FACTORY_CAL BIT(1) 133 - 134 - #define ADIS16204_ERROR_ACTIVE BIT(14) 135 - 136 - enum adis16204_scan { 137 - ADIS16204_SCAN_ACC_X, 138 - ADIS16204_SCAN_ACC_Y, 139 - ADIS16204_SCAN_ACC_XY, 140 - ADIS16204_SCAN_SUPPLY, 141 - ADIS16204_SCAN_AUX_ADC, 142 - ADIS16204_SCAN_TEMP, 143 - }; 144 - 145 - #endif /* SPI_ADIS16204_H_ */
-253
drivers/staging/iio/accel/adis16204_core.c
··· 1 - /* 2 - * ADIS16204 Programmable High-g Digital Impact Sensor and Recorder 3 - * 4 - * Copyright 2010 Analog Devices Inc. 5 - * 6 - * Licensed under the GPL-2 or later. 7 - */ 8 - 9 - #include <linux/interrupt.h> 10 - #include <linux/irq.h> 11 - #include <linux/delay.h> 12 - #include <linux/mutex.h> 13 - #include <linux/device.h> 14 - #include <linux/kernel.h> 15 - #include <linux/spi/spi.h> 16 - #include <linux/slab.h> 17 - #include <linux/sysfs.h> 18 - #include <linux/list.h> 19 - #include <linux/module.h> 20 - 21 - #include <linux/iio/iio.h> 22 - #include <linux/iio/sysfs.h> 23 - #include <linux/iio/buffer.h> 24 - #include <linux/iio/imu/adis.h> 25 - 26 - #include "adis16204.h" 27 - 28 - /* Unique to this driver currently */ 29 - 30 - static const u8 adis16204_addresses[][2] = { 31 - [ADIS16204_SCAN_ACC_X] = { ADIS16204_XACCL_NULL, ADIS16204_X_PEAK_OUT }, 32 - [ADIS16204_SCAN_ACC_Y] = { ADIS16204_YACCL_NULL, ADIS16204_Y_PEAK_OUT }, 33 - [ADIS16204_SCAN_ACC_XY] = { 0, ADIS16204_XY_PEAK_OUT }, 34 - }; 35 - 36 - static int adis16204_read_raw(struct iio_dev *indio_dev, 37 - struct iio_chan_spec const *chan, 38 - int *val, int *val2, 39 - long mask) 40 - { 41 - struct adis *st = iio_priv(indio_dev); 42 - int ret; 43 - int bits; 44 - u8 addr; 45 - s16 val16; 46 - int addrind; 47 - 48 - switch (mask) { 49 - case IIO_CHAN_INFO_RAW: 50 - return adis_single_conversion(indio_dev, chan, 51 - ADIS16204_ERROR_ACTIVE, val); 52 - case IIO_CHAN_INFO_SCALE: 53 - switch (chan->type) { 54 - case IIO_VOLTAGE: 55 - if (chan->channel == 0) { 56 - *val = 1; 57 - *val2 = 220000; /* 1.22 mV */ 58 - } else { 59 - *val = 0; 60 - *val2 = 610000; /* 0.61 mV */ 61 - } 62 - return IIO_VAL_INT_PLUS_MICRO; 63 - case IIO_TEMP: 64 - *val = -470; /* 0.47 C */ 65 - *val2 = 0; 66 - return IIO_VAL_INT_PLUS_MICRO; 67 - case IIO_ACCEL: 68 - *val = 0; 69 - switch (chan->channel2) { 70 - case IIO_MOD_X: 71 - case IIO_MOD_ROOT_SUM_SQUARED_X_Y: 72 - *val2 = IIO_G_TO_M_S_2(17125); /* 17.125 mg */ 73 - break; 74 - case IIO_MOD_Y: 75 - case IIO_MOD_Z: 76 - *val2 = IIO_G_TO_M_S_2(8407); /* 8.407 mg */ 77 - break; 78 - } 79 - return IIO_VAL_INT_PLUS_MICRO; 80 - default: 81 - return -EINVAL; 82 - } 83 - break; 84 - case IIO_CHAN_INFO_OFFSET: 85 - *val = 25000 / -470 - 1278; /* 25 C = 1278 */ 86 - return IIO_VAL_INT; 87 - case IIO_CHAN_INFO_CALIBBIAS: 88 - case IIO_CHAN_INFO_PEAK: 89 - if (mask == IIO_CHAN_INFO_CALIBBIAS) { 90 - bits = 12; 91 - addrind = 0; 92 - } else { /* PEAK_SEPARATE */ 93 - bits = 14; 94 - addrind = 1; 95 - } 96 - mutex_lock(&indio_dev->mlock); 97 - addr = adis16204_addresses[chan->scan_index][addrind]; 98 - ret = adis_read_reg_16(st, addr, &val16); 99 - if (ret) { 100 - mutex_unlock(&indio_dev->mlock); 101 - return ret; 102 - } 103 - val16 &= (1 << bits) - 1; 104 - val16 = (s16)(val16 << (16 - bits)) >> (16 - bits); 105 - *val = val16; 106 - mutex_unlock(&indio_dev->mlock); 107 - return IIO_VAL_INT; 108 - } 109 - return -EINVAL; 110 - } 111 - 112 - static int adis16204_write_raw(struct iio_dev *indio_dev, 113 - struct iio_chan_spec const *chan, 114 - int val, 115 - int val2, 116 - long mask) 117 - { 118 - struct adis *st = iio_priv(indio_dev); 119 - int bits; 120 - s16 val16; 121 - u8 addr; 122 - 123 - switch (mask) { 124 - case IIO_CHAN_INFO_CALIBBIAS: 125 - switch (chan->type) { 126 - case IIO_ACCEL: 127 - bits = 12; 128 - break; 129 - default: 130 - return -EINVAL; 131 - } 132 - val16 = val & ((1 << bits) - 1); 133 - addr = adis16204_addresses[chan->scan_index][1]; 134 - return adis_write_reg_16(st, addr, val16); 135 - } 136 - return -EINVAL; 137 - } 138 - 139 - static const struct iio_chan_spec adis16204_channels[] = { 140 - ADIS_SUPPLY_CHAN(ADIS16204_SUPPLY_OUT, ADIS16204_SCAN_SUPPLY, 0, 12), 141 - ADIS_AUX_ADC_CHAN(ADIS16204_AUX_ADC, ADIS16204_SCAN_AUX_ADC, 0, 12), 142 - ADIS_TEMP_CHAN(ADIS16204_TEMP_OUT, ADIS16204_SCAN_TEMP, 0, 12), 143 - ADIS_ACCEL_CHAN(X, ADIS16204_XACCL_OUT, ADIS16204_SCAN_ACC_X, 144 - BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 145 - 0, 14), 146 - ADIS_ACCEL_CHAN(Y, ADIS16204_YACCL_OUT, ADIS16204_SCAN_ACC_Y, 147 - BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 148 - 0, 14), 149 - ADIS_ACCEL_CHAN(ROOT_SUM_SQUARED_X_Y, ADIS16204_XY_RSS_OUT, 150 - ADIS16204_SCAN_ACC_XY, BIT(IIO_CHAN_INFO_PEAK), 0, 14), 151 - IIO_CHAN_SOFT_TIMESTAMP(5), 152 - }; 153 - 154 - static const struct iio_info adis16204_info = { 155 - .read_raw = &adis16204_read_raw, 156 - .write_raw = &adis16204_write_raw, 157 - .update_scan_mode = adis_update_scan_mode, 158 - .driver_module = THIS_MODULE, 159 - }; 160 - 161 - static const char * const adis16204_status_error_msgs[] = { 162 - [ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT] = "Self test failure", 163 - [ADIS16204_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure", 164 - [ADIS16204_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed", 165 - [ADIS16204_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V", 166 - [ADIS16204_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", 167 - }; 168 - 169 - static const struct adis_data adis16204_data = { 170 - .read_delay = 20, 171 - .msc_ctrl_reg = ADIS16204_MSC_CTRL, 172 - .glob_cmd_reg = ADIS16204_GLOB_CMD, 173 - .diag_stat_reg = ADIS16204_DIAG_STAT, 174 - 175 - .self_test_mask = ADIS16204_MSC_CTRL_SELF_TEST_EN, 176 - .startup_delay = ADIS16204_STARTUP_DELAY, 177 - 178 - .status_error_msgs = adis16204_status_error_msgs, 179 - .status_error_mask = BIT(ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT) | 180 - BIT(ADIS16204_DIAG_STAT_SPI_FAIL_BIT) | 181 - BIT(ADIS16204_DIAG_STAT_FLASH_UPT_BIT) | 182 - BIT(ADIS16204_DIAG_STAT_POWER_HIGH_BIT) | 183 - BIT(ADIS16204_DIAG_STAT_POWER_LOW_BIT), 184 - }; 185 - 186 - static int adis16204_probe(struct spi_device *spi) 187 - { 188 - int ret; 189 - struct adis *st; 190 - struct iio_dev *indio_dev; 191 - 192 - /* setup the industrialio driver allocated elements */ 193 - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 194 - if (!indio_dev) 195 - return -ENOMEM; 196 - st = iio_priv(indio_dev); 197 - /* this is only used for removal purposes */ 198 - spi_set_drvdata(spi, indio_dev); 199 - 200 - indio_dev->name = spi->dev.driver->name; 201 - indio_dev->dev.parent = &spi->dev; 202 - indio_dev->info = &adis16204_info; 203 - indio_dev->channels = adis16204_channels; 204 - indio_dev->num_channels = ARRAY_SIZE(adis16204_channels); 205 - indio_dev->modes = INDIO_DIRECT_MODE; 206 - 207 - ret = adis_init(st, indio_dev, spi, &adis16204_data); 208 - if (ret) 209 - return ret; 210 - 211 - ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL); 212 - if (ret) 213 - return ret; 214 - 215 - /* Get the device into a sane initial state */ 216 - ret = adis_initial_startup(st); 217 - if (ret) 218 - goto error_cleanup_buffer_trigger; 219 - ret = iio_device_register(indio_dev); 220 - if (ret) 221 - goto error_cleanup_buffer_trigger; 222 - 223 - return 0; 224 - 225 - error_cleanup_buffer_trigger: 226 - adis_cleanup_buffer_and_trigger(st, indio_dev); 227 - return ret; 228 - } 229 - 230 - static int adis16204_remove(struct spi_device *spi) 231 - { 232 - struct iio_dev *indio_dev = spi_get_drvdata(spi); 233 - struct adis *st = iio_priv(indio_dev); 234 - 235 - iio_device_unregister(indio_dev); 236 - adis_cleanup_buffer_and_trigger(st, indio_dev); 237 - 238 - return 0; 239 - } 240 - 241 - static struct spi_driver adis16204_driver = { 242 - .driver = { 243 - .name = "adis16204", 244 - }, 245 - .probe = adis16204_probe, 246 - .remove = adis16204_remove, 247 - }; 248 - module_spi_driver(adis16204_driver); 249 - 250 - MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 251 - MODULE_DESCRIPTION("ADIS16204 High-g Digital Impact Sensor and Recorder"); 252 - MODULE_LICENSE("GPL v2"); 253 - MODULE_ALIAS("spi:adis16204");
-188
drivers/staging/iio/accel/adis16220.h
··· 1 - #ifndef SPI_ADIS16220_H_ 2 - #define SPI_ADIS16220_H_ 3 - 4 - #include <linux/iio/imu/adis.h> 5 - 6 - #define ADIS16220_STARTUP_DELAY 220 /* ms */ 7 - 8 - /* Flash memory write count */ 9 - #define ADIS16220_FLASH_CNT 0x00 10 - 11 - /* Control, acceleration offset adjustment control */ 12 - #define ADIS16220_ACCL_NULL 0x02 13 - 14 - /* Control, AIN1 offset adjustment control */ 15 - #define ADIS16220_AIN1_NULL 0x04 16 - 17 - /* Control, AIN2 offset adjustment control */ 18 - #define ADIS16220_AIN2_NULL 0x06 19 - 20 - /* Output, power supply during capture */ 21 - #define ADIS16220_CAPT_SUPPLY 0x0A 22 - 23 - /* Output, temperature during capture */ 24 - #define ADIS16220_CAPT_TEMP 0x0C 25 - 26 - /* Output, peak acceleration during capture */ 27 - #define ADIS16220_CAPT_PEAKA 0x0E 28 - 29 - /* Output, peak AIN1 level during capture */ 30 - #define ADIS16220_CAPT_PEAK1 0x10 31 - 32 - /* Output, peak AIN2 level during capture */ 33 - #define ADIS16220_CAPT_PEAK2 0x12 34 - 35 - /* Output, capture buffer for acceleration */ 36 - #define ADIS16220_CAPT_BUFA 0x14 37 - 38 - /* Output, capture buffer for AIN1 */ 39 - #define ADIS16220_CAPT_BUF1 0x16 40 - 41 - /* Output, capture buffer for AIN2 */ 42 - #define ADIS16220_CAPT_BUF2 0x18 43 - 44 - /* Control, capture buffer address pointer */ 45 - #define ADIS16220_CAPT_PNTR 0x1A 46 - 47 - /* Control, capture control register */ 48 - #define ADIS16220_CAPT_CTRL 0x1C 49 - 50 - /* Control, capture period (automatic mode) */ 51 - #define ADIS16220_CAPT_PRD 0x1E 52 - 53 - /* Control, Alarm A, acceleration peak threshold */ 54 - #define ADIS16220_ALM_MAGA 0x20 55 - 56 - /* Control, Alarm 1, AIN1 peak threshold */ 57 - #define ADIS16220_ALM_MAG1 0x22 58 - 59 - /* Control, Alarm 2, AIN2 peak threshold */ 60 - #define ADIS16220_ALM_MAG2 0x24 61 - 62 - /* Control, Alarm S, peak threshold */ 63 - #define ADIS16220_ALM_MAGS 0x26 64 - 65 - /* Control, alarm configuration register */ 66 - #define ADIS16220_ALM_CTRL 0x28 67 - 68 - /* Control, general I/O configuration */ 69 - #define ADIS16220_GPIO_CTRL 0x32 70 - 71 - /* Control, self-test control, AIN configuration */ 72 - #define ADIS16220_MSC_CTRL 0x34 73 - 74 - /* Control, digital I/O configuration */ 75 - #define ADIS16220_DIO_CTRL 0x36 76 - 77 - /* Control, filter configuration */ 78 - #define ADIS16220_AVG_CNT 0x38 79 - 80 - /* Status, system status */ 81 - #define ADIS16220_DIAG_STAT 0x3C 82 - 83 - /* Control, system commands */ 84 - #define ADIS16220_GLOB_CMD 0x3E 85 - 86 - /* Status, self-test response */ 87 - #define ADIS16220_ST_DELTA 0x40 88 - 89 - /* Lot Identification Code 1 */ 90 - #define ADIS16220_LOT_ID1 0x52 91 - 92 - /* Lot Identification Code 2 */ 93 - #define ADIS16220_LOT_ID2 0x54 94 - 95 - /* Product identifier; convert to decimal = 16220 */ 96 - #define ADIS16220_PROD_ID 0x56 97 - 98 - /* Serial number */ 99 - #define ADIS16220_SERIAL_NUM 0x58 100 - 101 - #define ADIS16220_CAPTURE_SIZE 2048 102 - 103 - /* MSC_CTRL */ 104 - 105 - #define ADIS16220_MSC_CTRL_SELF_TEST_EN BIT(8) 106 - #define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN1 BIT(1) 107 - #define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN2 BIT(0) 108 - 109 - /* DIO_CTRL */ 110 - 111 - #define ADIS16220_MSC_CTRL_DIO2_BUSY_IND (BIT(5) | BIT(4)) 112 - #define ADIS16220_MSC_CTRL_DIO1_BUSY_IND (BIT(3) | BIT(2)) 113 - #define ADIS16220_MSC_CTRL_DIO2_ACT_HIGH BIT(1) 114 - #define ADIS16220_MSC_CTRL_DIO1_ACT_HIGH BIT(0) 115 - 116 - /* DIAG_STAT */ 117 - 118 - /* AIN2 sample > ALM_MAG2 */ 119 - #define ADIS16220_DIAG_STAT_ALM_MAG2 BIT(14) 120 - 121 - /* AIN1 sample > ALM_MAG1 */ 122 - #define ADIS16220_DIAG_STAT_ALM_MAG1 BIT(13) 123 - 124 - /* Acceleration sample > ALM_MAGA */ 125 - #define ADIS16220_DIAG_STAT_ALM_MAGA BIT(12) 126 - 127 - /* Error condition programmed into ALM_MAGS[11:0] and ALM_CTRL[5:4] is true */ 128 - #define ADIS16220_DIAG_STAT_ALM_MAGS BIT(11) 129 - 130 - /* |Peak value in AIN2 data capture| > ALM_MAG2 */ 131 - #define ADIS16220_DIAG_STAT_PEAK_AIN2 BIT(10) 132 - 133 - /* |Peak value in AIN1 data capture| > ALM_MAG1 */ 134 - #define ADIS16220_DIAG_STAT_PEAK_AIN1 BIT(9) 135 - 136 - /* |Peak value in acceleration data capture| > ALM_MAGA */ 137 - #define ADIS16220_DIAG_STAT_PEAK_ACCEL BIT(8) 138 - 139 - /* Data ready, capture complete */ 140 - #define ADIS16220_DIAG_STAT_DATA_RDY BIT(7) 141 - 142 - #define ADIS16220_DIAG_STAT_FLASH_CHK BIT(6) 143 - 144 - #define ADIS16220_DIAG_STAT_SELF_TEST BIT(5) 145 - 146 - /* Capture period violation/interruption */ 147 - #define ADIS16220_DIAG_STAT_VIOLATION_BIT 4 148 - 149 - /* SPI communications failure */ 150 - #define ADIS16220_DIAG_STAT_SPI_FAIL_BIT 3 151 - 152 - /* Flash update failure */ 153 - #define ADIS16220_DIAG_STAT_FLASH_UPT_BIT 2 154 - 155 - /* Power supply above 3.625 V */ 156 - #define ADIS16220_DIAG_STAT_POWER_HIGH_BIT 1 157 - 158 - /* Power supply below 3.15 V */ 159 - #define ADIS16220_DIAG_STAT_POWER_LOW_BIT 0 160 - 161 - /* GLOB_CMD */ 162 - 163 - #define ADIS16220_GLOB_CMD_SW_RESET BIT(7) 164 - #define ADIS16220_GLOB_CMD_SELF_TEST BIT(2) 165 - #define ADIS16220_GLOB_CMD_PWR_DOWN BIT(1) 166 - 167 - #define ADIS16220_MAX_TX 2048 168 - #define ADIS16220_MAX_RX 2048 169 - 170 - #define ADIS16220_SPI_BURST (u32)(1000 * 1000) 171 - #define ADIS16220_SPI_FAST (u32)(2000 * 1000) 172 - 173 - /** 174 - * struct adis16220_state - device instance specific data 175 - * @adis: adis device 176 - * @tx: transmit buffer 177 - * @rx: receive buffer 178 - * @buf_lock: mutex to protect tx and rx 179 - **/ 180 - struct adis16220_state { 181 - struct adis adis; 182 - 183 - struct mutex buf_lock; 184 - u8 tx[ADIS16220_MAX_TX] ____cacheline_aligned; 185 - u8 rx[ADIS16220_MAX_RX]; 186 - }; 187 - 188 - #endif /* SPI_ADIS16220_H_ */
-494
drivers/staging/iio/accel/adis16220_core.c
··· 1 - /* 2 - * ADIS16220 Programmable Digital Vibration Sensor driver 3 - * 4 - * Copyright 2010 Analog Devices Inc. 5 - * 6 - * Licensed under the GPL-2 or later. 7 - */ 8 - 9 - #include <linux/delay.h> 10 - #include <linux/mutex.h> 11 - #include <linux/device.h> 12 - #include <linux/kernel.h> 13 - #include <linux/spi/spi.h> 14 - #include <linux/slab.h> 15 - #include <linux/sysfs.h> 16 - #include <linux/module.h> 17 - 18 - #include <linux/iio/iio.h> 19 - #include <linux/iio/sysfs.h> 20 - 21 - #include "adis16220.h" 22 - 23 - static ssize_t adis16220_read_16bit(struct device *dev, 24 - struct device_attribute *attr, 25 - char *buf) 26 - { 27 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 28 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 29 - struct adis16220_state *st = iio_priv(indio_dev); 30 - ssize_t ret; 31 - u16 val; 32 - 33 - /* Take the iio_dev status lock */ 34 - mutex_lock(&indio_dev->mlock); 35 - ret = adis_read_reg_16(&st->adis, this_attr->address, &val); 36 - mutex_unlock(&indio_dev->mlock); 37 - if (ret) 38 - return ret; 39 - return sprintf(buf, "%u\n", val); 40 - } 41 - 42 - static ssize_t adis16220_write_16bit(struct device *dev, 43 - struct device_attribute *attr, 44 - const char *buf, 45 - size_t len) 46 - { 47 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 48 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 49 - struct adis16220_state *st = iio_priv(indio_dev); 50 - int ret; 51 - u16 val; 52 - 53 - ret = kstrtou16(buf, 10, &val); 54 - if (ret) 55 - goto error_ret; 56 - ret = adis_write_reg_16(&st->adis, this_attr->address, val); 57 - 58 - error_ret: 59 - return ret ? ret : len; 60 - } 61 - 62 - static int adis16220_capture(struct iio_dev *indio_dev) 63 - { 64 - struct adis16220_state *st = iio_priv(indio_dev); 65 - int ret; 66 - 67 - /* initiates a manual data capture */ 68 - ret = adis_write_reg_16(&st->adis, ADIS16220_GLOB_CMD, 0xBF08); 69 - if (ret) 70 - dev_err(&indio_dev->dev, "problem beginning capture"); 71 - 72 - usleep_range(10000, 11000); /* delay for capture to finish */ 73 - 74 - return ret; 75 - } 76 - 77 - static ssize_t adis16220_write_capture(struct device *dev, 78 - struct device_attribute *attr, 79 - const char *buf, size_t len) 80 - { 81 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 82 - bool val; 83 - int ret; 84 - 85 - ret = strtobool(buf, &val); 86 - if (ret) 87 - return ret; 88 - if (!val) 89 - return -EINVAL; 90 - ret = adis16220_capture(indio_dev); 91 - if (ret) 92 - return ret; 93 - 94 - return len; 95 - } 96 - 97 - static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev, 98 - char *buf, 99 - loff_t off, 100 - size_t count, 101 - int addr) 102 - { 103 - struct adis16220_state *st = iio_priv(indio_dev); 104 - struct spi_transfer xfers[] = { 105 - { 106 - .tx_buf = st->tx, 107 - .bits_per_word = 8, 108 - .len = 2, 109 - .cs_change = 1, 110 - .delay_usecs = 25, 111 - }, { 112 - .tx_buf = st->tx, 113 - .rx_buf = st->rx, 114 - .bits_per_word = 8, 115 - .cs_change = 1, 116 - .delay_usecs = 25, 117 - }, 118 - }; 119 - int ret; 120 - int i; 121 - 122 - if (unlikely(!count)) 123 - return count; 124 - 125 - if ((off >= ADIS16220_CAPTURE_SIZE) || (count & 1) || (off & 1)) 126 - return -EINVAL; 127 - 128 - if (off + count > ADIS16220_CAPTURE_SIZE) 129 - count = ADIS16220_CAPTURE_SIZE - off; 130 - 131 - /* write the begin position of capture buffer */ 132 - ret = adis_write_reg_16(&st->adis, 133 - ADIS16220_CAPT_PNTR, 134 - off > 1); 135 - if (ret) 136 - return -EIO; 137 - 138 - /* read count/2 values from capture buffer */ 139 - mutex_lock(&st->buf_lock); 140 - 141 - for (i = 0; i < count; i += 2) { 142 - st->tx[i] = ADIS_READ_REG(addr); 143 - st->tx[i + 1] = 0; 144 - } 145 - xfers[1].len = count; 146 - 147 - ret = spi_sync_transfer(st->adis.spi, xfers, ARRAY_SIZE(xfers)); 148 - if (ret) { 149 - mutex_unlock(&st->buf_lock); 150 - return -EIO; 151 - } 152 - 153 - memcpy(buf, st->rx, count); 154 - 155 - mutex_unlock(&st->buf_lock); 156 - return count; 157 - } 158 - 159 - static ssize_t adis16220_accel_bin_read(struct file *filp, struct kobject *kobj, 160 - struct bin_attribute *attr, 161 - char *buf, 162 - loff_t off, 163 - size_t count) 164 - { 165 - struct iio_dev *indio_dev = dev_to_iio_dev(kobj_to_dev(kobj)); 166 - 167 - return adis16220_capture_buffer_read(indio_dev, buf, 168 - off, count, 169 - ADIS16220_CAPT_BUFA); 170 - } 171 - 172 - static struct bin_attribute accel_bin = { 173 - .attr = { 174 - .name = "accel_bin", 175 - .mode = S_IRUGO, 176 - }, 177 - .read = adis16220_accel_bin_read, 178 - .size = ADIS16220_CAPTURE_SIZE, 179 - }; 180 - 181 - static ssize_t adis16220_adc1_bin_read(struct file *filp, struct kobject *kobj, 182 - struct bin_attribute *attr, 183 - char *buf, loff_t off, 184 - size_t count) 185 - { 186 - struct iio_dev *indio_dev = dev_to_iio_dev(kobj_to_dev(kobj)); 187 - 188 - return adis16220_capture_buffer_read(indio_dev, buf, 189 - off, count, 190 - ADIS16220_CAPT_BUF1); 191 - } 192 - 193 - static struct bin_attribute adc1_bin = { 194 - .attr = { 195 - .name = "in0_bin", 196 - .mode = S_IRUGO, 197 - }, 198 - .read = adis16220_adc1_bin_read, 199 - .size = ADIS16220_CAPTURE_SIZE, 200 - }; 201 - 202 - static ssize_t adis16220_adc2_bin_read(struct file *filp, struct kobject *kobj, 203 - struct bin_attribute *attr, 204 - char *buf, loff_t off, 205 - size_t count) 206 - { 207 - struct iio_dev *indio_dev = dev_to_iio_dev(kobj_to_dev(kobj)); 208 - 209 - return adis16220_capture_buffer_read(indio_dev, buf, 210 - off, count, 211 - ADIS16220_CAPT_BUF2); 212 - } 213 - 214 - static struct bin_attribute adc2_bin = { 215 - .attr = { 216 - .name = "in1_bin", 217 - .mode = S_IRUGO, 218 - }, 219 - .read = adis16220_adc2_bin_read, 220 - .size = ADIS16220_CAPTURE_SIZE, 221 - }; 222 - 223 - #define IIO_DEV_ATTR_CAPTURE(_store) \ 224 - IIO_DEVICE_ATTR(capture, S_IWUSR, NULL, _store, 0) 225 - 226 - static IIO_DEV_ATTR_CAPTURE(adis16220_write_capture); 227 - 228 - #define IIO_DEV_ATTR_CAPTURE_COUNT(_mode, _show, _store, _addr) \ 229 - IIO_DEVICE_ATTR(capture_count, _mode, _show, _store, _addr) 230 - 231 - static IIO_DEV_ATTR_CAPTURE_COUNT(S_IWUSR | S_IRUGO, 232 - adis16220_read_16bit, 233 - adis16220_write_16bit, 234 - ADIS16220_CAPT_PNTR); 235 - 236 - enum adis16220_channel { 237 - in_supply, in_1, in_2, accel, temp 238 - }; 239 - 240 - struct adis16220_address_spec { 241 - u8 addr; 242 - u8 bits; 243 - bool sign; 244 - }; 245 - 246 - /* Address / bits / signed */ 247 - static const struct adis16220_address_spec adis16220_addresses[][3] = { 248 - [in_supply] = { { ADIS16220_CAPT_SUPPLY, 12, 0 }, }, 249 - [in_1] = { { ADIS16220_CAPT_BUF1, 16, 1 }, 250 - { ADIS16220_AIN1_NULL, 16, 1 }, 251 - { ADIS16220_CAPT_PEAK1, 16, 1 }, }, 252 - [in_2] = { { ADIS16220_CAPT_BUF2, 16, 1 }, 253 - { ADIS16220_AIN2_NULL, 16, 1 }, 254 - { ADIS16220_CAPT_PEAK2, 16, 1 }, }, 255 - [accel] = { { ADIS16220_CAPT_BUFA, 16, 1 }, 256 - { ADIS16220_ACCL_NULL, 16, 1 }, 257 - { ADIS16220_CAPT_PEAKA, 16, 1 }, }, 258 - [temp] = { { ADIS16220_CAPT_TEMP, 12, 0 }, } 259 - }; 260 - 261 - static int adis16220_read_raw(struct iio_dev *indio_dev, 262 - struct iio_chan_spec const *chan, 263 - int *val, int *val2, 264 - long mask) 265 - { 266 - struct adis16220_state *st = iio_priv(indio_dev); 267 - const struct adis16220_address_spec *addr; 268 - int ret = -EINVAL; 269 - int addrind = 0; 270 - u16 uval; 271 - s16 sval; 272 - u8 bits; 273 - 274 - switch (mask) { 275 - case IIO_CHAN_INFO_RAW: 276 - addrind = 0; 277 - break; 278 - case IIO_CHAN_INFO_OFFSET: 279 - if (chan->type == IIO_TEMP) { 280 - *val = 25000 / -470 - 1278; /* 25 C = 1278 */ 281 - return IIO_VAL_INT; 282 - } 283 - addrind = 1; 284 - break; 285 - case IIO_CHAN_INFO_PEAK: 286 - addrind = 2; 287 - break; 288 - case IIO_CHAN_INFO_SCALE: 289 - switch (chan->type) { 290 - case IIO_TEMP: 291 - *val = -470; /* -0.47 C */ 292 - *val2 = 0; 293 - return IIO_VAL_INT_PLUS_MICRO; 294 - case IIO_ACCEL: 295 - *val2 = IIO_G_TO_M_S_2(19073); /* 19.073 g */ 296 - return IIO_VAL_INT_PLUS_MICRO; 297 - case IIO_VOLTAGE: 298 - if (chan->channel == 0) { 299 - *val = 1; 300 - *val2 = 220700; /* 1.2207 mV */ 301 - } else { 302 - /* Should really be dependent on VDD */ 303 - *val2 = 305180; /* 305.18 uV */ 304 - } 305 - return IIO_VAL_INT_PLUS_MICRO; 306 - default: 307 - return -EINVAL; 308 - } 309 - default: 310 - return -EINVAL; 311 - } 312 - addr = &adis16220_addresses[chan->address][addrind]; 313 - if (addr->sign) { 314 - ret = adis_read_reg_16(&st->adis, addr->addr, &sval); 315 - if (ret) 316 - return ret; 317 - bits = addr->bits; 318 - sval &= (1 << bits) - 1; 319 - sval = (s16)(sval << (16 - bits)) >> (16 - bits); 320 - *val = sval; 321 - return IIO_VAL_INT; 322 - } 323 - ret = adis_read_reg_16(&st->adis, addr->addr, &uval); 324 - if (ret) 325 - return ret; 326 - bits = addr->bits; 327 - uval &= (1 << bits) - 1; 328 - *val = uval; 329 - return IIO_VAL_INT; 330 - } 331 - 332 - static const struct iio_chan_spec adis16220_channels[] = { 333 - { 334 - .type = IIO_VOLTAGE, 335 - .indexed = 1, 336 - .channel = 0, 337 - .extend_name = "supply", 338 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 339 - BIT(IIO_CHAN_INFO_SCALE), 340 - .address = in_supply, 341 - }, { 342 - .type = IIO_ACCEL, 343 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 344 - BIT(IIO_CHAN_INFO_OFFSET) | 345 - BIT(IIO_CHAN_INFO_SCALE) | 346 - BIT(IIO_CHAN_INFO_PEAK), 347 - .address = accel, 348 - }, { 349 - .type = IIO_TEMP, 350 - .indexed = 1, 351 - .channel = 0, 352 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 353 - BIT(IIO_CHAN_INFO_OFFSET) | 354 - BIT(IIO_CHAN_INFO_SCALE), 355 - .address = temp, 356 - }, { 357 - .type = IIO_VOLTAGE, 358 - .indexed = 1, 359 - .channel = 1, 360 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 361 - BIT(IIO_CHAN_INFO_OFFSET) | 362 - BIT(IIO_CHAN_INFO_SCALE), 363 - .address = in_1, 364 - }, { 365 - .type = IIO_VOLTAGE, 366 - .indexed = 1, 367 - .channel = 2, 368 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 369 - .address = in_2, 370 - } 371 - }; 372 - 373 - static struct attribute *adis16220_attributes[] = { 374 - &iio_dev_attr_capture.dev_attr.attr, 375 - &iio_dev_attr_capture_count.dev_attr.attr, 376 - NULL 377 - }; 378 - 379 - static const struct attribute_group adis16220_attribute_group = { 380 - .attrs = adis16220_attributes, 381 - }; 382 - 383 - static const struct iio_info adis16220_info = { 384 - .attrs = &adis16220_attribute_group, 385 - .driver_module = THIS_MODULE, 386 - .read_raw = &adis16220_read_raw, 387 - }; 388 - 389 - static const char * const adis16220_status_error_msgs[] = { 390 - [ADIS16220_DIAG_STAT_VIOLATION_BIT] = "Capture period violation/interruption", 391 - [ADIS16220_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure", 392 - [ADIS16220_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed", 393 - [ADIS16220_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V", 394 - [ADIS16220_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 3.15V", 395 - }; 396 - 397 - static const struct adis_data adis16220_data = { 398 - .read_delay = 35, 399 - .write_delay = 35, 400 - .msc_ctrl_reg = ADIS16220_MSC_CTRL, 401 - .glob_cmd_reg = ADIS16220_GLOB_CMD, 402 - .diag_stat_reg = ADIS16220_DIAG_STAT, 403 - 404 - .self_test_mask = ADIS16220_MSC_CTRL_SELF_TEST_EN, 405 - .startup_delay = ADIS16220_STARTUP_DELAY, 406 - 407 - .status_error_msgs = adis16220_status_error_msgs, 408 - .status_error_mask = BIT(ADIS16220_DIAG_STAT_VIOLATION_BIT) | 409 - BIT(ADIS16220_DIAG_STAT_SPI_FAIL_BIT) | 410 - BIT(ADIS16220_DIAG_STAT_FLASH_UPT_BIT) | 411 - BIT(ADIS16220_DIAG_STAT_POWER_HIGH_BIT) | 412 - BIT(ADIS16220_DIAG_STAT_POWER_LOW_BIT), 413 - }; 414 - 415 - static int adis16220_probe(struct spi_device *spi) 416 - { 417 - int ret; 418 - struct adis16220_state *st; 419 - struct iio_dev *indio_dev; 420 - 421 - /* setup the industrialio driver allocated elements */ 422 - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 423 - if (!indio_dev) 424 - return -ENOMEM; 425 - 426 - st = iio_priv(indio_dev); 427 - /* this is only used for removal purposes */ 428 - spi_set_drvdata(spi, indio_dev); 429 - 430 - indio_dev->name = spi->dev.driver->name; 431 - indio_dev->dev.parent = &spi->dev; 432 - indio_dev->info = &adis16220_info; 433 - indio_dev->modes = INDIO_DIRECT_MODE; 434 - indio_dev->channels = adis16220_channels; 435 - indio_dev->num_channels = ARRAY_SIZE(adis16220_channels); 436 - 437 - ret = devm_iio_device_register(&spi->dev, indio_dev); 438 - if (ret) 439 - return ret; 440 - 441 - ret = sysfs_create_bin_file(&indio_dev->dev.kobj, &accel_bin); 442 - if (ret) 443 - return ret; 444 - 445 - ret = sysfs_create_bin_file(&indio_dev->dev.kobj, &adc1_bin); 446 - if (ret) 447 - goto error_rm_accel_bin; 448 - 449 - ret = sysfs_create_bin_file(&indio_dev->dev.kobj, &adc2_bin); 450 - if (ret) 451 - goto error_rm_adc1_bin; 452 - 453 - ret = adis_init(&st->adis, indio_dev, spi, &adis16220_data); 454 - if (ret) 455 - goto error_rm_adc2_bin; 456 - /* Get the device into a sane initial state */ 457 - ret = adis_initial_startup(&st->adis); 458 - if (ret) 459 - goto error_rm_adc2_bin; 460 - return 0; 461 - 462 - error_rm_adc2_bin: 463 - sysfs_remove_bin_file(&indio_dev->dev.kobj, &adc2_bin); 464 - error_rm_adc1_bin: 465 - sysfs_remove_bin_file(&indio_dev->dev.kobj, &adc1_bin); 466 - error_rm_accel_bin: 467 - sysfs_remove_bin_file(&indio_dev->dev.kobj, &accel_bin); 468 - return ret; 469 - } 470 - 471 - static int adis16220_remove(struct spi_device *spi) 472 - { 473 - struct iio_dev *indio_dev = spi_get_drvdata(spi); 474 - 475 - sysfs_remove_bin_file(&indio_dev->dev.kobj, &adc2_bin); 476 - sysfs_remove_bin_file(&indio_dev->dev.kobj, &adc1_bin); 477 - sysfs_remove_bin_file(&indio_dev->dev.kobj, &accel_bin); 478 - 479 - return 0; 480 - } 481 - 482 - static struct spi_driver adis16220_driver = { 483 - .driver = { 484 - .name = "adis16220", 485 - }, 486 - .probe = adis16220_probe, 487 - .remove = adis16220_remove, 488 - }; 489 - module_spi_driver(adis16220_driver); 490 - 491 - MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 492 - MODULE_DESCRIPTION("Analog Devices ADIS16220 Digital Vibration Sensor"); 493 - MODULE_LICENSE("GPL v2"); 494 - MODULE_ALIAS("spi:adis16220");
+12 -18
drivers/staging/iio/adc/ad7192.c
··· 349 349 if (lval == 0) 350 350 return -EINVAL; 351 351 352 - mutex_lock(&indio_dev->mlock); 353 - if (iio_buffer_enabled(indio_dev)) { 354 - mutex_unlock(&indio_dev->mlock); 355 - return -EBUSY; 356 - } 352 + ret = iio_device_claim_direct_mode(indio_dev); 353 + if (ret) 354 + return ret; 357 355 358 356 div = st->mclk / (lval * st->f_order * 1024); 359 357 if (div < 1 || div > 1023) { ··· 364 366 ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); 365 367 366 368 out: 367 - mutex_unlock(&indio_dev->mlock); 369 + iio_device_release_direct_mode(indio_dev); 368 370 369 371 return ret ? ret : len; 370 372 } ··· 432 434 if (ret < 0) 433 435 return ret; 434 436 435 - mutex_lock(&indio_dev->mlock); 436 - if (iio_buffer_enabled(indio_dev)) { 437 - mutex_unlock(&indio_dev->mlock); 438 - return -EBUSY; 439 - } 437 + ret = iio_device_claim_direct_mode(indio_dev); 438 + if (ret) 439 + return ret; 440 440 441 441 switch ((u32)this_attr->address) { 442 442 case AD7192_REG_GPOCON: ··· 457 461 ret = -EINVAL; 458 462 } 459 463 460 - mutex_unlock(&indio_dev->mlock); 464 + iio_device_release_direct_mode(indio_dev); 461 465 462 466 return ret ? ret : len; 463 467 } ··· 551 555 int ret, i; 552 556 unsigned int tmp; 553 557 554 - mutex_lock(&indio_dev->mlock); 555 - if (iio_buffer_enabled(indio_dev)) { 556 - mutex_unlock(&indio_dev->mlock); 557 - return -EBUSY; 558 - } 558 + ret = iio_device_claim_direct_mode(indio_dev); 559 + if (ret) 560 + return ret; 559 561 560 562 switch (mask) { 561 563 case IIO_CHAN_INFO_SCALE: ··· 576 582 ret = -EINVAL; 577 583 } 578 584 579 - mutex_unlock(&indio_dev->mlock); 585 + iio_device_release_direct_mode(indio_dev); 580 586 581 587 return ret; 582 588 }
+20 -20
drivers/staging/iio/adc/ad7280a.c
··· 155 155 } 156 156 } 157 157 158 - static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned val) 158 + static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) 159 159 { 160 160 unsigned char crc; 161 161 ··· 165 165 return crc ^ (val & 0xFF); 166 166 } 167 167 168 - static int ad7280_check_crc(struct ad7280_state *st, unsigned val) 168 + static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) 169 169 { 170 170 unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); 171 171 ··· 191 191 usleep_range(250, 500); 192 192 } 193 193 194 - static int __ad7280_read32(struct ad7280_state *st, unsigned *val) 194 + static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) 195 195 { 196 196 int ret; 197 197 struct spi_transfer t = { ··· 211 211 return 0; 212 212 } 213 213 214 - static int ad7280_write(struct ad7280_state *st, unsigned devaddr, 215 - unsigned addr, bool all, unsigned val) 214 + static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, 215 + unsigned int addr, bool all, unsigned int val) 216 216 { 217 - unsigned reg = devaddr << 27 | addr << 21 | 217 + unsigned int reg = devaddr << 27 | addr << 21 | 218 218 (val & 0xFF) << 13 | all << 12; 219 219 220 220 reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2; ··· 223 223 return spi_write(st->spi, &st->buf[0], 4); 224 224 } 225 225 226 - static int ad7280_read(struct ad7280_state *st, unsigned devaddr, 227 - unsigned addr) 226 + static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, 227 + unsigned int addr) 228 228 { 229 229 int ret; 230 - unsigned tmp; 230 + unsigned int tmp; 231 231 232 232 /* turns off the read operation on all parts */ 233 233 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, ··· 261 261 return (tmp >> 13) & 0xFF; 262 262 } 263 263 264 - static int ad7280_read_channel(struct ad7280_state *st, unsigned devaddr, 265 - unsigned addr) 264 + static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, 265 + unsigned int addr) 266 266 { 267 267 int ret; 268 - unsigned tmp; 268 + unsigned int tmp; 269 269 270 270 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); 271 271 if (ret) ··· 299 299 return (tmp >> 11) & 0xFFF; 300 300 } 301 301 302 - static int ad7280_read_all_channels(struct ad7280_state *st, unsigned cnt, 303 - unsigned *array) 302 + static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, 303 + unsigned int *array) 304 304 { 305 305 int i, ret; 306 - unsigned tmp, sum = 0; 306 + unsigned int tmp, sum = 0; 307 307 308 308 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, 309 309 AD7280A_CELL_VOLTAGE_1 << 2); ··· 338 338 339 339 static int ad7280_chain_setup(struct ad7280_state *st) 340 340 { 341 - unsigned val, n; 341 + unsigned int val, n; 342 342 int ret; 343 343 344 344 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, ··· 401 401 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 402 402 bool readin; 403 403 int ret; 404 - unsigned devaddr, ch; 404 + unsigned int devaddr, ch; 405 405 406 406 ret = strtobool(buf, &readin); 407 407 if (ret) ··· 431 431 struct ad7280_state *st = iio_priv(indio_dev); 432 432 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 433 433 int ret; 434 - unsigned msecs; 434 + unsigned int msecs; 435 435 436 436 mutex_lock(&indio_dev->mlock); 437 437 ret = ad7280_read(st, this_attr->address >> 8, ··· 602 602 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 603 603 struct ad7280_state *st = iio_priv(indio_dev); 604 604 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 605 - unsigned val; 605 + unsigned int val; 606 606 607 607 switch ((u32)this_attr->address) { 608 608 case AD7280A_CELL_OVERVOLTAGE: ··· 683 683 { 684 684 struct iio_dev *indio_dev = private; 685 685 struct ad7280_state *st = iio_priv(indio_dev); 686 - unsigned *channels; 686 + unsigned int *channels; 687 687 int i, ret; 688 688 689 689 channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
+4 -4
drivers/staging/iio/adc/ad7280a.h
··· 29 29 #define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) 30 30 31 31 struct ad7280_platform_data { 32 - unsigned acquisition_time; 33 - unsigned conversion_averaging; 34 - unsigned chain_last_alert_ignore; 35 - bool thermistor_term_en; 32 + unsigned int acquisition_time; 33 + unsigned int conversion_averaging; 34 + unsigned int chain_last_alert_ignore; 35 + bool thermistor_term_en; 36 36 }; 37 37 38 38 #endif /* IIO_ADC_AD7280_H_ */
+14 -14
drivers/staging/iio/adc/ad7606.h
··· 28 28 */ 29 29 30 30 struct ad7606_platform_data { 31 - unsigned default_os; 32 - unsigned default_range; 33 - unsigned gpio_convst; 34 - unsigned gpio_reset; 35 - unsigned gpio_range; 36 - unsigned gpio_os0; 37 - unsigned gpio_os1; 38 - unsigned gpio_os2; 39 - unsigned gpio_frstdata; 40 - unsigned gpio_stby; 31 + unsigned int default_os; 32 + unsigned int default_range; 33 + unsigned int gpio_convst; 34 + unsigned int gpio_reset; 35 + unsigned int gpio_range; 36 + unsigned int gpio_os0; 37 + unsigned int gpio_os1; 38 + unsigned int gpio_os2; 39 + unsigned int gpio_frstdata; 40 + unsigned int gpio_stby; 41 41 }; 42 42 43 43 /** ··· 52 52 const char *name; 53 53 u16 int_vref_mv; 54 54 const struct iio_chan_spec *channels; 55 - unsigned num_channels; 55 + unsigned int num_channels; 56 56 }; 57 57 58 58 /** ··· 67 67 struct work_struct poll_work; 68 68 wait_queue_head_t wq_data_avail; 69 69 const struct ad7606_bus_ops *bops; 70 - unsigned range; 71 - unsigned oversampling; 70 + unsigned int range; 71 + unsigned int oversampling; 72 72 bool done; 73 73 void __iomem *base_address; 74 74 ··· 86 86 }; 87 87 88 88 struct iio_dev *ad7606_probe(struct device *dev, int irq, 89 - void __iomem *base_address, unsigned id, 89 + void __iomem *base_address, unsigned int id, 90 90 const struct ad7606_bus_ops *bops); 91 91 int ad7606_remove(struct iio_dev *indio_dev, int irq); 92 92 int ad7606_reset(struct ad7606_state *st);
+3 -3
drivers/staging/iio/adc/ad7606_core.c
··· 36 36 return -ENODEV; 37 37 } 38 38 39 - static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned ch) 39 + static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) 40 40 { 41 41 struct ad7606_state *st = iio_priv(indio_dev); 42 42 int ret; ··· 155 155 return sprintf(buf, "%u\n", st->oversampling); 156 156 } 157 157 158 - static int ad7606_oversampling_get_index(unsigned val) 158 + static int ad7606_oversampling_get_index(unsigned int val) 159 159 { 160 160 unsigned char supported[] = {0, 2, 4, 8, 16, 32, 64}; 161 161 int i; ··· 446 446 447 447 struct iio_dev *ad7606_probe(struct device *dev, int irq, 448 448 void __iomem *base_address, 449 - unsigned id, 449 + unsigned int id, 450 450 const struct ad7606_bus_ops *bops) 451 451 { 452 452 struct ad7606_platform_data *pdata = dev->platform_data;
+1 -1
drivers/staging/iio/adc/ad7780.c
··· 63 63 enum ad_sigma_delta_mode mode) 64 64 { 65 65 struct ad7780_state *st = ad_sigma_delta_to_ad7780(sigma_delta); 66 - unsigned val; 66 + unsigned int val; 67 67 68 68 switch (mode) { 69 69 case AD_SD_MODE_SINGLE:
+7 -7
drivers/staging/iio/impedance-analyzer/ad5933.c
··· 101 101 unsigned long mclk_hz; 102 102 unsigned char ctrl_hb; 103 103 unsigned char ctrl_lb; 104 - unsigned range_avail[4]; 104 + unsigned int range_avail[4]; 105 105 unsigned short vref_mv; 106 106 unsigned short settling_cycles; 107 107 unsigned short freq_points; 108 - unsigned freq_start; 109 - unsigned freq_inc; 110 - unsigned state; 111 - unsigned poll_time_jiffies; 108 + unsigned int freq_start; 109 + unsigned int freq_inc; 110 + unsigned int state; 111 + unsigned int poll_time_jiffies; 112 112 }; 113 113 114 114 static struct ad5933_platform_data ad5933_default_pdata = { ··· 222 222 } 223 223 224 224 static int ad5933_set_freq(struct ad5933_state *st, 225 - unsigned reg, unsigned long freq) 225 + unsigned int reg, unsigned long freq) 226 226 { 227 227 unsigned long long freqreg; 228 228 union { ··· 282 282 static void ad5933_calc_out_ranges(struct ad5933_state *st) 283 283 { 284 284 int i; 285 - unsigned normalized_3v3[4] = {1980, 198, 383, 970}; 285 + unsigned int normalized_3v3[4] = {1980, 198, 383, 970}; 286 286 287 287 for (i = 0; i < 4; i++) 288 288 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
+30 -25
drivers/staging/iio/light/isl29028.c
··· 69 69 }; 70 70 71 71 struct isl29028_chip { 72 - struct device *dev; 73 72 struct mutex lock; 74 73 struct regmap *regmap; 75 74 ··· 165 166 166 167 static int isl29028_read_als_ir(struct isl29028_chip *chip, int *als_ir) 167 168 { 169 + struct device *dev = regmap_get_device(chip->regmap); 168 170 unsigned int lsb; 169 171 unsigned int msb; 170 172 int ret; 171 173 172 174 ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_L, &lsb); 173 175 if (ret < 0) { 174 - dev_err(chip->dev, 176 + dev_err(dev, 175 177 "Error in reading register ALSIR_L err %d\n", ret); 176 178 return ret; 177 179 } 178 180 179 181 ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_U, &msb); 180 182 if (ret < 0) { 181 - dev_err(chip->dev, 183 + dev_err(dev, 182 184 "Error in reading register ALSIR_U err %d\n", ret); 183 185 return ret; 184 186 } ··· 190 190 191 191 static int isl29028_read_proxim(struct isl29028_chip *chip, int *prox) 192 192 { 193 + struct device *dev = regmap_get_device(chip->regmap); 193 194 unsigned int data; 194 195 int ret; 195 196 196 197 ret = regmap_read(chip->regmap, ISL29028_REG_PROX_DATA, &data); 197 198 if (ret < 0) { 198 - dev_err(chip->dev, "Error in reading register %d, error %d\n", 199 + dev_err(dev, "Error in reading register %d, error %d\n", 199 200 ISL29028_REG_PROX_DATA, ret); 200 201 return ret; 201 202 } ··· 219 218 220 219 static int isl29028_als_get(struct isl29028_chip *chip, int *als_data) 221 220 { 221 + struct device *dev = regmap_get_device(chip->regmap); 222 222 int ret; 223 223 int als_ir_data; 224 224 225 225 if (chip->als_ir_mode != MODE_ALS) { 226 226 ret = isl29028_set_als_ir_mode(chip, MODE_ALS); 227 227 if (ret < 0) { 228 - dev_err(chip->dev, 228 + dev_err(dev, 229 229 "Error in enabling ALS mode err %d\n", ret); 230 230 return ret; 231 231 } ··· 253 251 254 252 static int isl29028_ir_get(struct isl29028_chip *chip, int *ir_data) 255 253 { 254 + struct device *dev = regmap_get_device(chip->regmap); 256 255 int ret; 257 256 258 257 if (chip->als_ir_mode != MODE_IR) { 259 258 ret = isl29028_set_als_ir_mode(chip, MODE_IR); 260 259 if (ret < 0) { 261 - dev_err(chip->dev, 260 + dev_err(dev, 262 261 "Error in enabling IR mode err %d\n", ret); 263 262 return ret; 264 263 } ··· 274 271 int val, int val2, long mask) 275 272 { 276 273 struct isl29028_chip *chip = iio_priv(indio_dev); 274 + struct device *dev = regmap_get_device(chip->regmap); 277 275 int ret = -EINVAL; 278 276 279 277 mutex_lock(&chip->lock); 280 278 switch (chan->type) { 281 279 case IIO_PROXIMITY: 282 280 if (mask != IIO_CHAN_INFO_SAMP_FREQ) { 283 - dev_err(chip->dev, 281 + dev_err(dev, 284 282 "proximity: mask value 0x%08lx not supported\n", 285 283 mask); 286 284 break; 287 285 } 288 286 if (val < 1 || val > 100) { 289 - dev_err(chip->dev, 287 + dev_err(dev, 290 288 "Samp_freq %d is not in range[1:100]\n", val); 291 289 break; 292 290 } 293 291 ret = isl29028_set_proxim_sampling(chip, val); 294 292 if (ret < 0) { 295 - dev_err(chip->dev, 293 + dev_err(dev, 296 294 "Setting proximity samp_freq fail, err %d\n", 297 295 ret); 298 296 break; ··· 303 299 304 300 case IIO_LIGHT: 305 301 if (mask != IIO_CHAN_INFO_SCALE) { 306 - dev_err(chip->dev, 302 + dev_err(dev, 307 303 "light: mask value 0x%08lx not supported\n", 308 304 mask); 309 305 break; 310 306 } 311 307 if ((val != 125) && (val != 2000)) { 312 - dev_err(chip->dev, 308 + dev_err(dev, 313 309 "lux scale %d is invalid [125, 2000]\n", val); 314 310 break; 315 311 } 316 312 ret = isl29028_set_als_scale(chip, val); 317 313 if (ret < 0) { 318 - dev_err(chip->dev, 314 + dev_err(dev, 319 315 "Setting lux scale fail with error %d\n", ret); 320 316 break; 321 317 } ··· 323 319 break; 324 320 325 321 default: 326 - dev_err(chip->dev, "Unsupported channel type\n"); 322 + dev_err(dev, "Unsupported channel type\n"); 327 323 break; 328 324 } 329 325 mutex_unlock(&chip->lock); ··· 335 331 int *val, int *val2, long mask) 336 332 { 337 333 struct isl29028_chip *chip = iio_priv(indio_dev); 334 + struct device *dev = regmap_get_device(chip->regmap); 338 335 int ret = -EINVAL; 339 336 340 337 mutex_lock(&chip->lock); ··· 375 370 break; 376 371 377 372 default: 378 - dev_err(chip->dev, "mask value 0x%08lx not supported\n", mask); 373 + dev_err(dev, "mask value 0x%08lx not supported\n", mask); 379 374 break; 380 375 } 381 376 mutex_unlock(&chip->lock); ··· 422 417 423 418 static int isl29028_chip_init(struct isl29028_chip *chip) 424 419 { 420 + struct device *dev = regmap_get_device(chip->regmap); 425 421 int ret; 426 422 427 423 chip->enable_prox = false; ··· 432 426 433 427 ret = regmap_write(chip->regmap, ISL29028_REG_TEST1_MODE, 0x0); 434 428 if (ret < 0) { 435 - dev_err(chip->dev, "%s(): write to reg %d failed, err = %d\n", 429 + dev_err(dev, "%s(): write to reg %d failed, err = %d\n", 436 430 __func__, ISL29028_REG_TEST1_MODE, ret); 437 431 return ret; 438 432 } 439 433 ret = regmap_write(chip->regmap, ISL29028_REG_TEST2_MODE, 0x0); 440 434 if (ret < 0) { 441 - dev_err(chip->dev, "%s(): write to reg %d failed, err = %d\n", 435 + dev_err(dev, "%s(): write to reg %d failed, err = %d\n", 442 436 __func__, ISL29028_REG_TEST2_MODE, ret); 443 437 return ret; 444 438 } 445 439 446 440 ret = regmap_write(chip->regmap, ISL29028_REG_CONFIGURE, 0x0); 447 441 if (ret < 0) { 448 - dev_err(chip->dev, "%s(): write to reg %d failed, err = %d\n", 442 + dev_err(dev, "%s(): write to reg %d failed, err = %d\n", 449 443 __func__, ISL29028_REG_CONFIGURE, ret); 450 444 return ret; 451 445 } 452 446 453 447 ret = isl29028_set_proxim_sampling(chip, chip->prox_sampling); 454 448 if (ret < 0) { 455 - dev_err(chip->dev, "setting the proximity, err = %d\n", 456 - ret); 449 + dev_err(dev, "setting the proximity, err = %d\n", ret); 457 450 return ret; 458 451 } 459 452 460 453 ret = isl29028_set_als_scale(chip, chip->lux_scale); 461 454 if (ret < 0) 462 - dev_err(chip->dev, 463 - "setting als scale failed, err = %d\n", ret); 455 + dev_err(dev, "setting als scale failed, err = %d\n", ret); 464 456 return ret; 465 457 } 466 458 ··· 500 496 chip = iio_priv(indio_dev); 501 497 502 498 i2c_set_clientdata(client, indio_dev); 503 - chip->dev = &client->dev; 504 499 mutex_init(&chip->lock); 505 500 506 501 chip->regmap = devm_regmap_init_i2c(client, &isl29028_regmap_config); 507 502 if (IS_ERR(chip->regmap)) { 508 503 ret = PTR_ERR(chip->regmap); 509 - dev_err(chip->dev, "regmap initialization failed: %d\n", ret); 504 + dev_err(&client->dev, "regmap initialization failed: %d\n", 505 + ret); 510 506 return ret; 511 507 } 512 508 513 509 ret = isl29028_chip_init(chip); 514 510 if (ret < 0) { 515 - dev_err(chip->dev, "chip initialization failed: %d\n", ret); 511 + dev_err(&client->dev, "chip initialization failed: %d\n", ret); 516 512 return ret; 517 513 } 518 514 ··· 524 520 indio_dev->modes = INDIO_DIRECT_MODE; 525 521 ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev); 526 522 if (ret < 0) { 527 - dev_err(chip->dev, "iio registration fails with error %d\n", 523 + dev_err(&client->dev, 524 + "iio registration fails with error %d\n", 528 525 ret); 529 526 return ret; 530 527 }
+2 -2
drivers/staging/iio/meter/ade7758_ring.c
··· 33 33 return ret; 34 34 } 35 35 36 - static int ade7758_write_waveform_type(struct device *dev, unsigned type) 36 + static int ade7758_write_waveform_type(struct device *dev, unsigned int type) 37 37 { 38 38 int ret; 39 39 u8 reg; ··· 85 85 **/ 86 86 static int ade7758_ring_preenable(struct iio_dev *indio_dev) 87 87 { 88 - unsigned channel; 88 + unsigned int channel; 89 89 90 90 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)) 91 91 return -EINVAL;
+4 -4
drivers/staging/iio/resolver/ad2s1210.h
··· 12 12 #define _AD2S1210_H 13 13 14 14 struct ad2s1210_platform_data { 15 - unsigned sample; 16 - unsigned a[2]; 17 - unsigned res[2]; 18 - bool gpioin; 15 + unsigned int sample; 16 + unsigned int a[2]; 17 + unsigned int res[2]; 18 + bool gpioin; 19 19 }; 20 20 #endif /* _AD2S1210_H */
+6 -6
drivers/staging/iio/trigger/iio-trig-bfin-timer.c
··· 55 55 }; 56 56 57 57 struct bfin_tmr_state { 58 - struct iio_trigger *trig; 59 - struct bfin_timer *t; 60 - unsigned timer_num; 61 - bool output_enable; 62 - unsigned int duty; 63 - int irq; 58 + struct iio_trigger *trig; 59 + struct bfin_timer *t; 60 + unsigned int timer_num; 61 + bool output_enable; 62 + unsigned int duty; 63 + int irq; 64 64 }; 65 65 66 66 static int iio_bfin_tmr_set_state(struct iio_trigger *trig, bool state)
+2
include/linux/iio/buffer.h
··· 83 83 * @access: [DRIVER] buffer access functions associated with the 84 84 * implementation. 85 85 * @scan_el_dev_attr_list:[INTERN] list of scan element related attributes. 86 + * @buffer_group: [INTERN] attributes of the buffer group 86 87 * @scan_el_group: [DRIVER] attribute group for those attributes not 87 88 * created from the iio_chan_info array. 88 89 * @pollq: [INTERN] wait queue to allow for polling on the buffer. 89 90 * @stufftoread: [INTERN] flag to indicate new data. 91 + * @attrs: [INTERN] standard attributes of the buffer 90 92 * @demux_list: [INTERN] list of operations required to demux the scan. 91 93 * @demux_bounce: [INTERN] buffer for doing gather from incoming scan. 92 94 * @buffer_list: [INTERN] entry in the devices list of current buffers.
+2
include/linux/iio/iio.h
··· 527 527 int devm_iio_device_register(struct device *dev, struct iio_dev *indio_dev); 528 528 void devm_iio_device_unregister(struct device *dev, struct iio_dev *indio_dev); 529 529 int iio_push_event(struct iio_dev *indio_dev, u64 ev_code, s64 timestamp); 530 + int iio_device_claim_direct_mode(struct iio_dev *indio_dev); 531 + void iio_device_release_direct_mode(struct iio_dev *indio_dev); 530 532 531 533 extern struct bus_type iio_bus_type; 532 534
+2
include/uapi/linux/iio/types.h
··· 38 38 IIO_CONCENTRATION, 39 39 IIO_RESISTANCE, 40 40 IIO_PH, 41 + IIO_UVINDEX, 41 42 }; 42 43 43 44 enum iio_modifier { ··· 78 77 IIO_MOD_Q, 79 78 IIO_MOD_CO2, 80 79 IIO_MOD_VOC, 80 + IIO_MOD_LIGHT_UV, 81 81 }; 82 82 83 83 enum iio_event_type {
+13 -1
tools/iio/generic_buffer.c
··· 304 304 } 305 305 } 306 306 307 - /* Verify the trigger exists */ 307 + /* Look for this "-devN" trigger */ 308 + trig_num = find_type_by_name(trigger_name, "trigger"); 309 + if (trig_num < 0) { 310 + /* OK try the simpler "-trigger" suffix instead */ 311 + free(trigger_name); 312 + ret = asprintf(&trigger_name, 313 + "%s-trigger", device_name); 314 + if (ret < 0) { 315 + ret = -ENOMEM; 316 + goto error_free_dev_dir_name; 317 + } 318 + } 319 + 308 320 trig_num = find_type_by_name(trigger_name, "trigger"); 309 321 if (trig_num < 0) { 310 322 fprintf(stderr, "Failed to find the trigger %s\n",
+18
tools/iio/iio_event_monitor.c
··· 53 53 [IIO_ENERGY] = "energy", 54 54 [IIO_DISTANCE] = "distance", 55 55 [IIO_VELOCITY] = "velocity", 56 + [IIO_CONCENTRATION] = "concentration", 57 + [IIO_RESISTANCE] = "resistance", 58 + [IIO_PH] = "ph", 59 + [IIO_UVINDEX] = "uvindex", 56 60 }; 57 61 58 62 static const char * const iio_ev_type_text[] = { ··· 94 90 [IIO_MOD_LIGHT_RED] = "red", 95 91 [IIO_MOD_LIGHT_GREEN] = "green", 96 92 [IIO_MOD_LIGHT_BLUE] = "blue", 93 + [IIO_MOD_LIGHT_UV] = "uv", 97 94 [IIO_MOD_QUATERNION] = "quaternion", 98 95 [IIO_MOD_TEMP_AMBIENT] = "ambient", 99 96 [IIO_MOD_TEMP_OBJECT] = "object", ··· 107 102 [IIO_MOD_WALKING] = "walking", 108 103 [IIO_MOD_STILL] = "still", 109 104 [IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z] = "sqrt(x^2+y^2+z^2)", 105 + [IIO_MOD_I] = "i", 106 + [IIO_MOD_Q] = "q", 107 + [IIO_MOD_CO2] = "co2", 108 + [IIO_MOD_VOC] = "voc", 110 109 }; 111 110 112 111 static bool event_is_known(struct iio_event_data *event) ··· 145 136 case IIO_ENERGY: 146 137 case IIO_DISTANCE: 147 138 case IIO_VELOCITY: 139 + case IIO_CONCENTRATION: 140 + case IIO_RESISTANCE: 141 + case IIO_PH: 142 + case IIO_UVINDEX: 148 143 break; 149 144 default: 150 145 return false; ··· 175 162 case IIO_MOD_LIGHT_RED: 176 163 case IIO_MOD_LIGHT_GREEN: 177 164 case IIO_MOD_LIGHT_BLUE: 165 + case IIO_MOD_LIGHT_UV: 178 166 case IIO_MOD_QUATERNION: 179 167 case IIO_MOD_TEMP_AMBIENT: 180 168 case IIO_MOD_TEMP_OBJECT: ··· 188 174 case IIO_MOD_WALKING: 189 175 case IIO_MOD_STILL: 190 176 case IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z: 177 + case IIO_MOD_I: 178 + case IIO_MOD_Q: 179 + case IIO_MOD_CO2: 180 + case IIO_MOD_VOC: 191 181 break; 192 182 default: 193 183 return false;