Merge branch 'dt/linus' into dt/next · tjh.dev/kernel@eb32d1e

··· 102 102 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 103 103 [2] Documentation/devicetree/bindings/power/power-domain.yaml 104 104 [3] Documentation/devicetree/bindings/thermal/thermal.txt 105 105 - [4] Documentation/devicetree/bindings/sram/sram.txt 105 105 + [4] Documentation/devicetree/bindings/sram/sram.yaml 106 106 [5] Documentation/devicetree/bindings/reset/reset.txt 107 107 108 108 Example:

+1 -1

Documentation/devicetree/bindings/arm/arm,scpi.txt

reviewed

··· 109 109 [0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html 110 110 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 111 111 [2] Documentation/devicetree/bindings/thermal/thermal.txt 112 112 - [3] Documentation/devicetree/bindings/sram/sram.txt 112 112 + [3] Documentation/devicetree/bindings/sram/sram.yaml 113 113 [4] Documentation/devicetree/bindings/power/power-domain.yaml 114 114 115 115 Example:

+1 -1

Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt

reviewed

··· 62 62 63 63 Syscon reboot node: 64 64 65 65 - See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the 65 65 + See Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the 66 66 detailed list of properties, the two values defined below are specific to the 67 67 BCM6328-style timer: 68 68

+1 -1

Documentation/devicetree/bindings/arm/cpus.yaml

reviewed

··· 226 226 $ref: '/schemas/types.yaml#/definitions/phandle-array' 227 227 description: | 228 228 List of phandles to idle state nodes supported 229 229 - by this cpu (see ./idle-states.txt). 229 229 + by this cpu (see ./idle-states.yaml). 230 230 231 231 capacity-dmips-mhz: 232 232 $ref: '/schemas/types.yaml#/definitions/uint32'

+1 -1

Documentation/devicetree/bindings/arm/fsl.yaml

reviewed

··· 160 160 items: 161 161 - enum: 162 162 - armadeus,imx6dl-apf6 # APF6 (Solo) SoM 163 163 - - armadeus,imx6dl-apf6dldev # APF6 (Solo) SoM on APF6Dev board 163 163 + - armadeus,imx6dl-apf6dev # APF6 (Solo) SoM on APF6Dev board 164 164 - eckelmann,imx6dl-ci4x10 165 165 - emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM 166 166 - emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base

+1 -1

Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt

reviewed

··· 1 1 * Hisilicon Hi3519 System Controller Block 2 2 3 3 This bindings use the following binding: 4 4 - Documentation/devicetree/bindings/mfd/syscon.txt 4 4 + Documentation/devicetree/bindings/mfd/syscon.yaml 5 5 6 6 Required properties: 7 7 - compatible: "hisilicon,hi3519-sysctrl".

+1 -1

Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt

reviewed

··· 81 81 }; 82 82 }; 83 83 84 84 - [1]. Documentation/devicetree/bindings/arm/idle-states.txt 84 84 + [1]. Documentation/devicetree/bindings/arm/idle-states.yaml

+1 -1

Documentation/devicetree/bindings/arm/omap/mpu.txt

reviewed

··· 17 17 - pm-sram: Phandles to ocmcram nodes to be used for power management. 18 18 First should be type 'protect-exec' for the driver to use to copy 19 19 and run PM functions, second should be regular pool to be used for 20 20 - data region for code. See Documentation/devicetree/bindings/sram/sram.txt 20 20 + data region for code. See Documentation/devicetree/bindings/sram/sram.yaml 21 21 for more details. 22 22 23 23 Examples:

+17 -19

Documentation/devicetree/bindings/arm/psci.yaml

reviewed

··· 100 100 bindings in [1]) must specify this property. 101 101 102 102 [1] Kernel documentation - ARM idle states bindings 103 103 - Documentation/devicetree/bindings/arm/idle-states.txt 103 103 + Documentation/devicetree/bindings/arm/idle-states.yaml 104 104 105 105 - "#power-domain-cells": 106 106 - description: 107 107 - The number of cells in a PM domain specifier as per binding in [3]. 108 108 - Must be 0 as to represent a single PM domain. 109 109 - 105 105 + patternProperties: 106 106 + "^power-domain-": 107 107 + allOf: 108 108 + - $ref: "../power/power-domain.yaml#" 109 109 + type: object 110 110 + description: | 110 111 ARM systems can have multiple cores, sometimes in an hierarchical 111 112 arrangement. This often, but not always, maps directly to the processor 112 113 power topology of the system. Individual nodes in a topology have their ··· 123 122 helps to implement support for OSI mode and OS implementations may choose 124 123 to mandate it. 125 124 126 126 - [3] Documentation/devicetree/bindings/power/power_domain.txt 127 127 - [4] Documentation/devicetree/bindings/power/domain-idle-state.txt 128 128 - 129 129 - power-domains: 130 130 - $ref: '/schemas/types.yaml#/definitions/phandle-array' 131 131 - description: 132 132 - List of phandles and PM domain specifiers, as defined by bindings of the 133 133 - PM domain provider. 125 125 + [3] Documentation/devicetree/bindings/power/power-domain.yaml 126 126 + [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml 134 127 135 128 required: 136 129 - compatible ··· 194 199 195 200 CPU0: cpu@0 { 196 201 device_type = "cpu"; 197 197 - compatible = "arm,cortex-a53", "arm,armv8"; 202 202 + compatible = "arm,cortex-a53"; 198 203 reg = <0x0>; 199 204 enable-method = "psci"; 200 205 power-domains = <&CPU_PD0>; ··· 203 208 204 209 CPU1: cpu@1 { 205 210 device_type = "cpu"; 206 206 - compatible = "arm,cortex-a57", "arm,armv8"; 211 211 + compatible = "arm,cortex-a53"; 207 212 reg = <0x100>; 208 213 enable-method = "psci"; 209 214 power-domains = <&CPU_PD1>; ··· 219 224 exit-latency-us = <10>; 220 225 min-residency-us = <100>; 221 226 }; 227 227 + }; 228 228 + 229 229 + domain-idle-states { 222 230 223 231 CLUSTER_RET: cluster-retention { 224 232 compatible = "domain-idle-state"; ··· 245 247 compatible = "arm,psci-1.0"; 246 248 method = "smc"; 247 249 248 248 - CPU_PD0: cpu-pd0 { 250 250 + CPU_PD0: power-domain-cpu0 { 249 251 #power-domain-cells = <0>; 250 252 domain-idle-states = <&CPU_PWRDN>; 251 253 power-domains = <&CLUSTER_PD>; 252 254 }; 253 255 254 254 - CPU_PD1: cpu-pd1 { 256 256 + CPU_PD1: power-domain-cpu1 { 255 257 #power-domain-cells = <0>; 256 258 domain-idle-states = <&CPU_PWRDN>; 257 259 power-domains = <&CLUSTER_PD>; 258 260 }; 259 261 260 260 - CLUSTER_PD: cluster-pd { 262 262 + CLUSTER_PD: power-domain-cluster { 261 263 #power-domain-cells = <0>; 262 264 domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; 263 265 };

+1 -1

Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml

reviewed

··· 52 52 53 53 examples: 54 54 - | 55 55 - mlahb: ahb { 55 55 + mlahb: ahb@38000000 { 56 56 compatible = "st,mlahb", "simple-bus"; 57 57 #address-cells = <1>; 58 58 #size-cells = <1>;

-1

Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml

reviewed

··· 70 70 #size-cells = <0>; 71 71 72 72 pmic@3e3 { 73 73 - compatible = "..."; 74 73 reg = <0x3e3>; 75 74 76 75 /* ... */

+1 -1

Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml

reviewed

··· 40 40 41 41 examples: 42 42 - | 43 43 - osc24M: clk@01c20050 { 43 43 + osc24M: clk@1c20050 { 44 44 #clock-cells = <0>; 45 45 compatible = "allwinner,sun4i-a10-osc-clk"; 46 46 reg = <0x01c20050 0x4>;

+1 -1

Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml

reviewed

··· 41 41 42 42 examples: 43 43 - | 44 44 - clk@0600005c { 44 44 + clk@600005c { 45 45 #clock-cells = <0>; 46 46 compatible = "allwinner,sun9i-a80-gt-clk"; 47 47 reg = <0x0600005c 0x4>;

+1 -1

Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml

reviewed

··· 42 42 be part of GCC and hence the TSENS properties can also be part 43 43 of the GCC/clock-controller node. 44 44 For more details on the TSENS properties please refer 45 45 - Documentation/devicetree/bindings/thermal/qcom-tsens.txt 45 45 + Documentation/devicetree/bindings/thermal/qcom-tsens.yaml 46 46 47 47 nvmem-cell-names: 48 48 minItems: 1

+1 -5

Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml

reviewed

··· 49 49 resets = <&tcon_ch0_clk 0>; 50 50 51 51 port { 52 52 - #address-cells = <1>; 53 53 - #size-cells = <0>; 54 54 - 55 55 - tve0_in_tcon0: endpoint@0 { 56 56 - reg = <0>; 52 52 + tve0_in_tcon0: endpoint { 57 53 remote-endpoint = <&tcon0_out_tve0>; 58 54 }; 59 55 };

+2 -8

Documentation/devicetree/bindings/display/bridge/anx6345.yaml

reviewed

··· 79 79 #size-cells = <0>; 80 80 81 81 anx6345_in: port@0 { 82 82 - #address-cells = <1>; 83 83 - #size-cells = <0>; 84 82 reg = <0>; 85 85 - anx6345_in_tcon0: endpoint@0 { 86 86 - reg = <0>; 83 83 + anx6345_in_tcon0: endpoint { 87 84 remote-endpoint = <&tcon0_out_anx6345>; 88 85 }; 89 86 }; 90 87 91 88 anx6345_out: port@1 { 92 92 - #address-cells = <1>; 93 93 - #size-cells = <0>; 94 89 reg = <1>; 95 95 - anx6345_out_panel: endpoint@0 { 96 96 - reg = <0>; 90 90 + anx6345_out_panel: endpoint { 97 91 remote-endpoint = <&panel_in_edp>; 98 92 }; 99 93 };

Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml

reviewed

··· 37 37 dsi@ff450000 { 38 38 #address-cells = <1>; 39 39 #size-cells = <0>; 40 40 + reg = <0xff450000 0x1000>; 41 41 + 40 42 panel@0 { 41 43 compatible = "leadtek,ltk500hd1829"; 42 44 reg = <0>;

Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml

reviewed

··· 37 37 dsi@ff450000 { 38 38 #address-cells = <1>; 39 39 #size-cells = <0>; 40 40 + reg = <0xff450000 0x1000>; 41 41 + 40 42 panel@0 { 41 43 compatible = "xinpeng,xpp055c272"; 42 44 reg = <0>;

+1 -5

Documentation/devicetree/bindings/display/simple-framebuffer.yaml

reviewed

··· 174 174 }; 175 175 }; 176 176 177 177 - soc@1c00000 { 178 178 - lcdc0: lcdc@1c0c000 { 179 179 - compatible = "allwinner,sun4i-a10-lcdc"; 180 180 - }; 181 181 - }; 177 177 + lcdc0: lcdc { }; 182 178 183 179 ...

+1 -1

Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt

reviewed

··· 37 37 supports a single port with a single endpoint. 38 38 39 39 - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and 40 40 - Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting 40 40 + Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt for connecting 41 41 tfp410 DVI encoder or lcd panel to lcdc 42 42 43 43 [1] There is an errata about AM335x color wiring. For 16-bit color mode

+1 -13

Documentation/devicetree/bindings/dma/ti/k3-udma.yaml

reviewed

··· 143 143 #size-cells = <2>; 144 144 dma-coherent; 145 145 dma-ranges; 146 146 - ranges; 146 146 + ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>; 147 147 148 148 ti,sci-dev-id = <118>; 149 149 ··· 168 168 <0x5>; /* RX_CHAN */ 169 169 ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */ 170 170 }; 171 171 - }; 172 172 - 173 173 - mcasp0: mcasp@02B00000 { 174 174 - dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>; 175 175 - dma-names = "tx", "rx"; 176 176 - }; 177 177 - 178 178 - crypto: crypto@4E00000 { 179 179 - compatible = "ti,sa2ul-crypto"; 180 180 - 181 181 - dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, <&main_udmap 0x4001>; 182 182 - dma-names = "tx", "rx1", "rx2"; 183 171 }; 184 172 };

+7 -7

Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml

reviewed

··· 84 84 gpu_opp_table: opp_table0 { 85 85 compatible = "operating-points-v2"; 86 86 87 87 - opp@533000000 { 87 87 + opp-533000000 { 88 88 opp-hz = /bits/ 64 <533000000>; 89 89 opp-microvolt = <1250000>; 90 90 }; 91 91 - opp@450000000 { 91 91 + opp-450000000 { 92 92 opp-hz = /bits/ 64 <450000000>; 93 93 opp-microvolt = <1150000>; 94 94 }; 95 95 - opp@400000000 { 95 95 + opp-400000000 { 96 96 opp-hz = /bits/ 64 <400000000>; 97 97 opp-microvolt = <1125000>; 98 98 }; 99 99 - opp@350000000 { 99 99 + opp-350000000 { 100 100 opp-hz = /bits/ 64 <350000000>; 101 101 opp-microvolt = <1075000>; 102 102 }; 103 103 - opp@266000000 { 103 103 + opp-266000000 { 104 104 opp-hz = /bits/ 64 <266000000>; 105 105 opp-microvolt = <1025000>; 106 106 }; 107 107 - opp@160000000 { 107 107 + opp-160000000 { 108 108 opp-hz = /bits/ 64 <160000000>; 109 109 opp-microvolt = <925000>; 110 110 }; 111 111 - opp@100000000 { 111 111 + opp-100000000 { 112 112 opp-hz = /bits/ 64 <100000000>; 113 113 opp-microvolt = <912500>; 114 114 };

+7 -7

Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml

reviewed

··· 138 138 gpu_opp_table: opp_table0 { 139 139 compatible = "operating-points-v2"; 140 140 141 141 - opp@533000000 { 141 141 + opp-533000000 { 142 142 opp-hz = /bits/ 64 <533000000>; 143 143 opp-microvolt = <1250000>; 144 144 }; 145 145 - opp@450000000 { 145 145 + opp-450000000 { 146 146 opp-hz = /bits/ 64 <450000000>; 147 147 opp-microvolt = <1150000>; 148 148 }; 149 149 - opp@400000000 { 149 149 + opp-400000000 { 150 150 opp-hz = /bits/ 64 <400000000>; 151 151 opp-microvolt = <1125000>; 152 152 }; 153 153 - opp@350000000 { 153 153 + opp-350000000 { 154 154 opp-hz = /bits/ 64 <350000000>; 155 155 opp-microvolt = <1075000>; 156 156 }; 157 157 - opp@266000000 { 157 157 + opp-266000000 { 158 158 opp-hz = /bits/ 64 <266000000>; 159 159 opp-microvolt = <1025000>; 160 160 }; 161 161 - opp@160000000 { 161 161 + opp-160000000 { 162 162 opp-hz = /bits/ 64 <160000000>; 163 163 opp-microvolt = <925000>; 164 164 }; 165 165 - opp@100000000 { 165 165 + opp-100000000 { 166 166 opp-hz = /bits/ 64 <100000000>; 167 167 opp-microvolt = <912500>; 168 168 };

+1 -1

Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml

reviewed

··· 123 123 samsung,syscon-phandle = <&pmu_system_controller>; 124 124 125 125 /* NTC thermistor is a hwmon device */ 126 126 - ncp15wb473@0 { 126 126 + ncp15wb473 { 127 127 compatible = "murata,ncp15wb473"; 128 128 pullup-uv = <1800000>; 129 129 pullup-ohm = <47000>;

+1 -1

Documentation/devicetree/bindings/input/touchscreen/goodix.yaml

reviewed

··· 62 62 63 63 examples: 64 64 - | 65 65 - i2c@00000000 { 65 65 + i2c { 66 66 #address-cells = <1>; 67 67 #size-cells = <0>; 68 68 gt928@5d {

+1 -1

Documentation/devicetree/bindings/input/twl4030-pwrbutton.txt

reviewed

··· 1 1 Texas Instruments TWL family (twl4030) pwrbutton module 2 2 3 3 This module is part of the TWL4030. For more details about the whole 4 4 - chip see Documentation/devicetree/bindings/mfd/twl-familly.txt. 4 4 + chip see Documentation/devicetree/bindings/mfd/twl-family.txt. 5 5 6 6 This module provides a simple power button event via an Interrupt. 7 7

+1 -1

Documentation/devicetree/bindings/leds/common.yaml

reviewed

··· 85 85 # LED will act as a back-light, controlled by the framebuffer system 86 86 - backlight 87 87 # LED will turn on (but for leds-gpio see "default-state" property in 88 88 - # Documentation/devicetree/bindings/leds/leds-gpio.txt) 88 88 + # Documentation/devicetree/bindings/leds/leds-gpio.yaml) 89 89 - default-on 90 90 # LED "double" flashes at a load average based rate 91 91 - heartbeat

+1 -1

Documentation/devicetree/bindings/leds/register-bit-led.txt

reviewed

··· 5 5 single LED. The register bit LEDs appear as children to the 6 6 syscon device, with the proper compatible string. For the 7 7 syscon bindings see: 8 8 - Documentation/devicetree/bindings/mfd/syscon.txt 8 8 + Documentation/devicetree/bindings/mfd/syscon.yaml 9 9 10 10 Each LED is represented as a sub-node of the syscon device. Each 11 11 node's name represents the name of the corresponding LED.

+28 -12

Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml

reviewed

··· 33 33 maxItems: 1 34 34 35 35 clocks: 36 36 - minItems: 2 37 37 - maxItems: 3 38 38 - items: 39 39 - - description: The CSI interface clock 40 40 - - description: The CSI ISP clock 41 41 - - description: The CSI DRAM clock 36 36 + oneOf: 37 37 + - items: 38 38 + - description: The CSI interface clock 39 39 + - description: The CSI DRAM clock 40 40 + 41 41 + - items: 42 42 + - description: The CSI interface clock 43 43 + - description: The CSI ISP clock 44 44 + - description: The CSI DRAM clock 42 45 43 46 clock-names: 44 44 - minItems: 2 45 45 - maxItems: 3 46 46 - items: 47 47 - - const: bus 48 48 - - const: isp 49 49 - - const: ram 47 47 + oneOf: 48 48 + - items: 49 49 + - const: bus 50 50 + - const: ram 51 51 + 52 52 + - items: 53 53 + - const: bus 54 54 + - const: isp 55 55 + - const: ram 50 56 51 57 resets: 52 58 maxItems: 1 59 59 + 60 60 + # FIXME: This should be made required eventually once every SoC will 61 61 + # have the MBUS declared. 62 62 + interconnects: 63 63 + maxItems: 1 64 64 + 65 65 + # FIXME: This should be made required eventually once every SoC will 66 66 + # have the MBUS declared. 67 67 + interconnect-names: 68 68 + const: dma-mem 53 69 54 70 # See ./video-interfaces.txt for details 55 71 port:

+1 -1

Documentation/devicetree/bindings/media/ti,cal.yaml

reviewed

··· 177 177 }; 178 178 }; 179 179 180 180 - i2c5: i2c@4807c000 { 180 180 + i2c { 181 181 clock-frequency = <400000>; 182 182 #address-cells = <1>; 183 183 #size-cells = <0>;

+12 -8

Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml

reviewed

··· 347 347 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 348 348 349 349 #iommu-cells = <1>; 350 350 + #reset-cells = <1>; 350 351 }; 351 352 352 353 external-memory-controller@7001b000 { ··· 364 363 timing-0 { 365 364 clock-frequency = <12750000>; 366 365 367 367 - nvidia,emc-zcal-cnt-long = <0x00000042>; 368 368 - nvidia,emc-auto-cal-interval = <0x001fffff>; 369 369 - nvidia,emc-ctt-term-ctrl = <0x00000802>; 370 370 - nvidia,emc-cfg = <0x73240000>; 371 371 - nvidia,emc-cfg-2 = <0x000008c5>; 372 372 - nvidia,emc-sel-dpd-ctrl = <0x00040128>; 373 373 - nvidia,emc-bgbias-ctl0 = <0x00000008>; 374 366 nvidia,emc-auto-cal-config = <0xa1430000>; 375 367 nvidia,emc-auto-cal-config2 = <0x00000000>; 376 368 nvidia,emc-auto-cal-config3 = <0x00000000>; 377 377 - nvidia,emc-mode-reset = <0x80001221>; 369 369 + nvidia,emc-auto-cal-interval = <0x001fffff>; 370 370 + nvidia,emc-bgbias-ctl0 = <0x00000008>; 371 371 + nvidia,emc-cfg = <0x73240000>; 372 372 + nvidia,emc-cfg-2 = <0x000008c5>; 373 373 + nvidia,emc-ctt-term-ctrl = <0x00000802>; 378 374 nvidia,emc-mode-1 = <0x80100003>; 379 375 nvidia,emc-mode-2 = <0x80200008>; 380 376 nvidia,emc-mode-4 = <0x00000000>; 377 377 + nvidia,emc-mode-reset = <0x80001221>; 378 378 + nvidia,emc-mrs-wait-cnt = <0x000e000e>; 379 379 + nvidia,emc-sel-dpd-ctrl = <0x00040128>; 380 380 + nvidia,emc-xm2dqspadctrl2 = <0x0130b118>; 381 381 + nvidia,emc-zcal-cnt-long = <0x00000042>; 382 382 + nvidia,emc-zcal-interval = <0x00000000>; 381 383 382 384 nvidia,emc-configuration = < 383 385 0x00000000 /* EMC_RC */

+1 -1

Documentation/devicetree/bindings/memory-controllers/ti/emif.txt

reviewed

··· 32 32 - sram : Phandles for generic sram driver nodes, 33 33 first should be type 'protect-exec' for the driver to use to copy 34 34 and run PM functions, second should be regular pool to be used for 35 35 - data region for code. See Documentation/devicetree/bindings/sram/sram.txt 35 35 + data region for code. See Documentation/devicetree/bindings/sram/sram.yaml 36 36 for more details. 37 37 38 38 Optional properties:

+2 -2

Documentation/devicetree/bindings/mfd/max77650.yaml

reviewed

··· 97 97 regulators { 98 98 compatible = "maxim,max77650-regulator"; 99 99 100 100 - max77650_ldo: regulator@0 { 100 100 + max77650_ldo: regulator-ldo { 101 101 regulator-compatible = "ldo"; 102 102 regulator-name = "max77650-ldo"; 103 103 regulator-min-microvolt = <1350000>; 104 104 regulator-max-microvolt = <2937500>; 105 105 }; 106 106 107 107 - max77650_sbb0: regulator@1 { 107 107 + max77650_sbb0: regulator-sbb0 { 108 108 regulator-compatible = "sbb0"; 109 109 regulator-name = "max77650-sbb0"; 110 110 regulator-min-microvolt = <800000>;

+2 -2

Documentation/devicetree/bindings/mfd/tps65910.txt

reviewed

··· 26 26 ldo6, ldo7, ldo8 27 27 28 28 - xxx-supply: Input voltage supply regulator. 29 29 - These entries are require if regulators are enabled for a device. Missing of these 30 30 - properties can cause the regulator registration fails. 29 29 + These entries are required if regulators are enabled for a device. Missing these 30 30 + properties can cause the regulator registration to fail. 31 31 If some of input supply is powered through battery or always-on supply then 32 32 also it is require to have these parameters with proper node handle of always 33 33 on power supply.

Documentation/devicetree/bindings/mfd/twl-familly.txt Documentation/devicetree/bindings/mfd/twl-family.txt

reviewed

+1 -1

Documentation/devicetree/bindings/mfd/zii,rave-sp.txt

reviewed

··· 20 20 Device Description 21 21 ------ ----------- 22 22 rave-sp-wdt : Watchdog 23 23 - rave-sp-nvmem : Interface to onborad EEPROM 23 23 + rave-sp-nvmem : Interface to onboard EEPROM 24 24 rave-sp-backlight : Display backlight 25 25 rave-sp-hwmon : Interface to onboard hardware sensors 26 26 rave-sp-leds : Interface to onboard LEDs

+1 -1

Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt

reviewed

··· 26 26 Documentation/devicetree/bindings/iommu/iommu.txt. 27 27 28 28 For arm-smmu binding, see: 29 29 - Documentation/devicetree/bindings/iommu/arm,smmu.txt. 29 29 + Documentation/devicetree/bindings/iommu/arm,smmu.yaml. 30 30 31 31 Required properties: 32 32

Documentation/devicetree/bindings/mmc/mmc-controller.yaml

reviewed

··· 370 370 mmc3: mmc@1c12000 { 371 371 #address-cells = <1>; 372 372 #size-cells = <0>; 373 373 + reg = <0x1c12000 0x200>; 373 374 pinctrl-names = "default"; 374 375 pinctrl-0 = <&mmc3_pins_a>; 375 376 vmmc-supply = <&reg_vmmc3>;

+1 -1

Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt

reviewed

··· 124 124 pinctrl-1 = <&mmc1_idle>; 125 125 pinctrl-2 = <&mmc1_sleep>; 126 126 ... 127 127 - interrupts-extended = <&intc 64 &gpio2 28 GPIO_ACTIVE_LOW>; 127 127 + interrupts-extended = <&intc 64 &gpio2 28 IRQ_TYPE_LEVEL_LOW>; 128 128 }; 129 129 130 130 mmc1_idle : pinmux_cirq_pin {

+1 -1

Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt

reviewed

··· 27 27 - reg: shall contain the native Chip Select ids from 0 to max supported by 28 28 the cadence nand flash controller 29 29 30 30 - See Documentation/devicetree/bindings/mtd/nand.txt for more details on 30 30 + See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on 31 31 generic bindings. 32 32 33 33 Example:

+1 -1

Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt

reviewed

··· 45 45 switch queue 46 46 47 47 - resets: a single phandle and reset identifier pair. See 48 48 - Documentation/devicetree/binding/reset/reset.txt for details. 48 48 + Documentation/devicetree/bindings/reset/reset.txt for details. 49 49 50 50 - reset-names: If the "reset" property is specified, this property should have 51 51 the value "switch" to denote the switch reset line.

-1

Documentation/devicetree/bindings/net/mdio.yaml

reviewed

··· 56 56 examples: 57 57 - | 58 58 davinci_mdio: mdio@5c030000 { 59 59 - compatible = "ti,davinci_mdio"; 60 59 reg = <0x5c030000 0x1000>; 61 60 #address-cells = <1>; 62 61 #size-cells = <0>;

Documentation/devicetree/bindings/nvmem/nvmem.yaml

reviewed

··· 76 76 qfprom: eeprom@700000 { 77 77 #address-cells = <1>; 78 78 #size-cells = <1>; 79 79 + reg = <0x00700000 0x100000>; 80 80 + 79 81 wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 80 82 81 83 /* ... */

+1 -1

Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml

reviewed

··· 86 86 #include <dt-bindings/clock/sun4i-a10-ccu.h> 87 87 #include <dt-bindings/reset/sun4i-a10-ccu.h> 88 88 89 89 - usbphy: phy@01c13400 { 89 89 + usbphy: phy@1c13400 { 90 90 #phy-cells = <1>; 91 91 compatible = "allwinner,sun4i-a10-usb-phy"; 92 92 reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;

+1 -1

Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml

reviewed

··· 17 17 "aspeed,ast2400-scu", "syscon", "simple-mfd" 18 18 19 19 Refer to the the bindings described in 20 20 - Documentation/devicetree/bindings/mfd/syscon.txt 20 20 + Documentation/devicetree/bindings/mfd/syscon.yaml 21 21 22 22 properties: 23 23 compatible:

+1 -1

Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml

reviewed

··· 18 18 "aspeed,g5-scu", "syscon", "simple-mfd" 19 19 20 20 Refer to the the bindings described in 21 21 - Documentation/devicetree/bindings/mfd/syscon.txt 21 21 + Documentation/devicetree/bindings/mfd/syscon.yaml 22 22 23 23 properties: 24 24 compatible:

+1 -1

Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml

reviewed

··· 17 17 "aspeed,ast2600-scu", "syscon", "simple-mfd" 18 18 19 19 Refer to the the bindings described in 20 20 - Documentation/devicetree/bindings/mfd/syscon.txt 20 20 + Documentation/devicetree/bindings/mfd/syscon.yaml 21 21 22 22 properties: 23 23 compatible:

+1 -1

Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml

reviewed

··· 248 248 }; 249 249 250 250 //Example 3 pin groups 251 251 - pinctrl@60020000 { 251 251 + pinctrl { 252 252 usart1_pins_a: usart1-0 { 253 253 pins1 { 254 254 pinmux = <STM32_PINMUX('A', 9, AF7)>;

+1 -1

Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml

reviewed

··· 18 18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon" 19 19 20 20 Refer to the the bindings described in 21 21 - Documentation/devicetree/bindings/mfd/syscon.txt 21 21 + Documentation/devicetree/bindings/mfd/syscon.yaml 22 22 23 23 properties: 24 24 compatible:

-33

Documentation/devicetree/bindings/power/domain-idle-state.txt

reviewed

··· 1 1 - PM Domain Idle State Node: 2 2 - 3 3 - A domain idle state node represents the state parameters that will be used to 4 4 - select the state when there are no active components in the domain. 5 5 - 6 6 - The state node has the following parameters - 7 7 - 8 8 - - compatible: 9 9 - Usage: Required 10 10 - Value type: <string> 11 11 - Definition: Must be "domain-idle-state". 12 12 - 13 13 - - entry-latency-us 14 14 - Usage: Required 15 15 - Value type: <prop-encoded-array> 16 16 - Definition: u32 value representing worst case latency in 17 17 - microseconds required to enter the idle state. 18 18 - The exit-latency-us duration may be guaranteed 19 19 - only after entry-latency-us has passed. 20 20 - 21 21 - - exit-latency-us 22 22 - Usage: Required 23 23 - Value type: <prop-encoded-array> 24 24 - Definition: u32 value representing worst case latency 25 25 - in microseconds required to exit the idle state. 26 26 - 27 27 - - min-residency-us 28 28 - Usage: Required 29 29 - Value type: <prop-encoded-array> 30 30 - Definition: u32 value representing minimum residency duration 31 31 - in microseconds after which the idle state will yield 32 32 - power benefits after overcoming the overhead in entering 33 33 - i the idle state.

+64

Documentation/devicetree/bindings/power/domain-idle-state.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: GPL-2.0 2 2 + %YAML 1.2 3 3 + --- 4 4 + $id: http://devicetree.org/schemas/power/domain-idle-state.yaml# 5 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 + 7 7 + title: PM Domain Idle States binding description 8 8 + 9 9 + maintainers: 10 10 + - Ulf Hansson <ulf.hansson@linaro.org> 11 11 + 12 12 + description: 13 13 + A domain idle state node represents the state parameters that will be used to 14 14 + select the state when there are no active components in the PM domain. 15 15 + 16 16 + properties: 17 17 + $nodename: 18 18 + const: domain-idle-states 19 19 + 20 20 + patternProperties: 21 21 + "^(cpu|cluster|domain)-": 22 22 + type: object 23 23 + description: 24 24 + Each state node represents a domain idle state description. 25 25 + 26 26 + properties: 27 27 + compatible: 28 28 + const: domain-idle-state 29 29 + 30 30 + entry-latency-us: 31 31 + description: 32 32 + The worst case latency in microseconds required to enter the idle 33 33 + state. Note that, the exit-latency-us duration may be guaranteed only 34 34 + after the entry-latency-us has passed. 35 35 + 36 36 + exit-latency-us: 37 37 + description: 38 38 + The worst case latency in microseconds required to exit the idle 39 39 + state. 40 40 + 41 41 + min-residency-us: 42 42 + description: 43 43 + The minimum residency duration in microseconds after which the idle 44 44 + state will yield power benefits, after overcoming the overhead while 45 45 + entering the idle state. 46 46 + 47 47 + required: 48 48 + - compatible 49 49 + - entry-latency-us 50 50 + - exit-latency-us 51 51 + - min-residency-us 52 52 + 53 53 + examples: 54 54 + - | 55 55 + 56 56 + domain-idle-states { 57 57 + domain_retention: domain-retention { 58 58 + compatible = "domain-idle-state"; 59 59 + entry-latency-us = <20>; 60 60 + exit-latency-us = <40>; 61 61 + min-residency-us = <80>; 62 62 + }; 63 63 + }; 64 64 + ...

+11 -13

Documentation/devicetree/bindings/power/power-domain.yaml

reviewed

··· 25 25 26 26 properties: 27 27 $nodename: 28 28 - pattern: "^(power-controller|power-domain)(@.*)?$" 28 28 + pattern: "^(power-controller|power-domain)([@-].*)?$" 29 29 30 30 domain-idle-states: 31 31 $ref: /schemas/types.yaml#/definitions/phandle-array 32 32 - description: 33 33 - A phandle of an idle-state that shall be soaked into a generic domain 34 34 - power state. The idle state definitions are compatible with 35 35 - domain-idle-state specified in 36 36 - Documentation/devicetree/bindings/power/domain-idle-state.txt 37 37 - phandles that are not compatible with domain-idle-state will be ignored. 38 38 - The domain-idle-state property reflects the idle state of this PM domain 39 39 - and not the idle states of the devices or sub-domains in the PM domain. 40 40 - Devices and sub-domains have their own idle-states independent 41 41 - of the parent domain's idle states. In the absence of this property, 42 42 - the domain would be considered as capable of being powered-on 43 43 - or powered-off. 32 32 + description: | 33 33 + Phandles of idle states that defines the available states for the 34 34 + power-domain provider. The idle state definitions are compatible with the 35 35 + domain-idle-state bindings, specified in ./domain-idle-state.yaml. 36 36 + 37 37 + Note that, the domain-idle-state property reflects the idle states of this 38 38 + PM domain and not the idle states of the devices or sub-domains in the PM 39 39 + domain. Devices and sub-domains have their own idle states independent of 40 40 + the parent domain's idle states. In the absence of this property, the 41 41 + domain would be considered as capable of being powered-on or powered-off. 44 42 45 43 operating-points-v2: 46 44 $ref: /schemas/types.yaml#/definitions/phandle-array

+1 -1

Documentation/devicetree/bindings/power/power_domain.txt

reviewed

··· 109 109 required-opps = <&domain1_opp_1>; 110 110 }; 111 111 112 112 - [1]. Documentation/devicetree/bindings/power/domain-idle-state.txt 112 112 + [1]. Documentation/devicetree/bindings/power/domain-idle-state.yaml

+1 -1

Documentation/devicetree/bindings/regulator/regulator.yaml

reviewed

··· 191 191 192 192 examples: 193 193 - | 194 194 - xyzreg: regulator@0 { 194 194 + xyzreg: regulator { 195 195 regulator-min-microvolt = <1000000>; 196 196 regulator-max-microvolt = <2500000>; 197 197 regulator-always-on;

+1 -1

Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt

reviewed

··· 3 3 4 4 The RCC IP is both a reset and a clock controller. 5 5 6 6 - Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt 6 6 + Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml

+1 -1

Documentation/devicetree/bindings/sound/st,stm32-sai.txt

reviewed

··· 36 36 - clock-names: Must contain "sai_ck". 37 37 Must also contain "MCLK", if SAI shares a master clock, 38 38 with a SAI set as MCLK clock provider. 39 39 - - dmas: see Documentation/devicetree/bindings/dma/stm32-dma.txt 39 39 + - dmas: see Documentation/devicetree/bindings/dma/st,stm32-dma.yaml 40 40 - dma-names: identifier string for each DMA request line 41 41 "tx": if sai sub-block is configured as playback DAI 42 42 "rx": if sai sub-block is configured as capture DAI

+1 -1

Documentation/devicetree/bindings/sound/st,stm32-spdifrx.txt

reviewed

··· 10 10 - clock-names: must contain "kclk" 11 11 - interrupts: cpu DAI interrupt line 12 12 - dmas: DMA specifiers for audio data DMA and iec control flow DMA 13 13 - See STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt 13 13 + See STM32 DMA bindings, Documentation/devicetree/bindings/dma/st,stm32-dma.yaml 14 14 - dma-names: two dmas have to be defined, "rx" and "rx-ctrl" 15 15 16 16 Optional properties:

+1 -1

Documentation/devicetree/bindings/spi/st,stm32-spi.yaml

reviewed

··· 49 49 dmas: 50 50 description: | 51 51 DMA specifiers for tx and rx dma. DMA fifo mode must be used. See 52 52 - the STM32 DMA bindings Documentation/devicetree/bindings/dma/stm32-dma.txt. 52 52 + the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml. 53 53 items: 54 54 - description: rx DMA channel 55 55 - description: tx DMA channel

+1 -1

Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml

reviewed

··· 125 125 #size-cells = <1>; 126 126 ranges; 127 127 128 128 - sram_a: sram@00000000 { 128 128 + sram_a: sram@0 { 129 129 compatible = "mmio-sram"; 130 130 reg = <0x00000000 0xc000>; 131 131 #address-cells = <1>;

+1 -1

Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml

reviewed

··· 17 17 "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd" 18 18 19 19 Refer to the the bindings described in 20 20 - Documentation/devicetree/bindings/mfd/syscon.txt 20 20 + Documentation/devicetree/bindings/mfd/syscon.yaml 21 21 22 22 properties: 23 23 compatible:

+1 -1

Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml

reviewed

··· 87 87 88 88 examples: 89 89 - | 90 90 - timer { 90 90 + timer@1c20c00 { 91 91 compatible = "allwinner,sun4i-a10-timer"; 92 92 reg = <0x01c20c00 0x400>; 93 93 interrupts = <22>,

+7 -8

MAINTAINERS

reviewed

··· 693 693 M: Yangtao Li <tiny.windzz@gmail.com> 694 694 L: linux-pm@vger.kernel.org 695 695 S: Maintained 696 696 - F: Documentation/devicetree/bindings/opp/sun50i-nvmem-cpufreq.txt 696 696 + F: Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml 697 697 F: drivers/cpufreq/sun50i-cpufreq-nvmem.c 698 698 699 699 ALLWINNER CRYPTO DRIVERS ··· 4016 4016 S: Maintained 4017 4017 R: Enric Balletbo i Serra <enric.balletbo@collabora.com> 4018 4018 R: Guenter Roeck <groeck@chromium.org> 4019 4019 - F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt 4019 4019 + F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml 4020 4020 F: sound/soc/codecs/cros_ec_codec.* 4021 4021 4022 4022 CIRRUS LOGIC AUDIO CODEC DRIVERS ··· 4474 4474 T: git git://linuxtv.org/media_tree.git 4475 4475 S: Maintained 4476 4476 F: drivers/media/platform/sunxi/sun6i-csi/ 4477 4477 - F: Documentation/devicetree/bindings/media/sun6i-csi.txt 4477 4477 + F: Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml 4478 4478 4479 4479 CW1200 WLAN driver 4480 4480 M: Solomon Peachy <pizza@shaftnet.org> ··· 5667 5667 T: git git://anongit.freedesktop.org/drm/drm-misc 5668 5668 S: Maintained 5669 5669 F: drivers/gpu/drm/stm 5670 5670 - F: Documentation/devicetree/bindings/display/st,stm32-ltdc.txt 5670 5670 + F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml 5671 5671 5672 5672 DRM DRIVERS FOR TI LCDC 5673 5673 M: Jyri Sarha <jsarha@ti.com> ··· 10163 10163 M: Andreas Klinger <ak@it-klinger.de> 10164 10164 L: linux-iio@vger.kernel.org 10165 10165 S: Maintained 10166 10166 - F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.txt 10166 10166 + F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml 10167 10167 F: drivers/iio/proximity/mb1232.c 10168 10168 10169 10169 MAXIM MAX77650 PMIC MFD DRIVER ··· 10466 10466 L: linux-media@vger.kernel.org 10467 10467 T: git git://linuxtv.org/media_tree.git 10468 10468 S: Supported 10469 10469 - F: Documentation/devicetree/bindings/media/st,stm32-dcmi.txt 10469 10469 + F: Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml 10470 10470 F: drivers/media/platform/stm32/stm32-dcmi.c 10471 10471 10472 10472 MEDIA DRIVERS FOR NVIDIA TEGRA - VDE ··· 12952 12952 L: linux-pci@vger.kernel.org 12953 12953 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 12954 12954 S: Supported 12955 12955 - F: Documentation/devicetree/bindings/pci/pci-thunder-* 12956 12955 F: drivers/pci/controller/pci-thunder-* 12957 12956 12958 12957 PCIE DRIVER FOR HISILICON ··· 15921 15922 F: drivers/pwm/pwm-stm32* 15922 15923 F: include/linux/*/stm32-*tim* 15923 15924 F: Documentation/ABI/testing/*timer-stm32 15924 15924 - F: Documentation/devicetree/bindings/*/stm32-*timer* 15925 15925 + F: Documentation/devicetree/bindings/*/*stm32-*timer* 15925 15926 F: Documentation/devicetree/bindings/pwm/pwm-stm32* 15926 15927 15927 15928 STMMAC ETHERNET DRIVER

+1 -1

drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/siliabs,wfx.txt

reviewed

··· 93 93 Must contains 64 hexadecimal digits. Not supported in current version. 94 94 95 95 WFx driver also supports `mac-address` and `local-mac-address` as described in 96 96 - Documentation/devicetree/binding/net/ethernet.txt 96 96 + Documentation/devicetree/bindings/net/ethernet.txt 97 97