Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
amd64_edac: Simplify ECC override handling

+21 -19
+19 -18
drivers/edac/amd64_edac.c
··· 2553 2553 2554 2554 if (on) { 2555 2555 if (reg->l & K8_MSR_MCGCTL_NBE) 2556 - pvt->flags.ecc_report = 1; 2556 + pvt->flags.nb_mce_enable = 1; 2557 2557 2558 2558 reg->l |= K8_MSR_MCGCTL_NBE; 2559 2559 } else { 2560 2560 /* 2561 - * Turn off ECC reporting only when it was off before 2561 + * Turn off NB MCE reporting only when it was off before 2562 2562 */ 2563 - if (!pvt->flags.ecc_report) 2563 + if (!pvt->flags.nb_mce_enable) 2564 2564 reg->l &= ~K8_MSR_MCGCTL_NBE; 2565 2565 } 2566 2566 } ··· 2571 2571 return 0; 2572 2572 } 2573 2573 2574 - /* 2575 - * Only if 'ecc_enable_override' is set AND BIOS had ECC disabled, do "we" 2576 - * enable it. 2577 - */ 2578 2574 static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci) 2579 2575 { 2580 2576 struct amd64_pvt *pvt = mci->pvt_info; 2581 2577 u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn; 2582 - 2583 - if (!ecc_enable_override) 2584 - return; 2585 - 2586 - amd64_printk(KERN_WARNING, 2587 - "'ecc_enable_override' parameter is active, " 2588 - "Enabling AMD ECC hardware now: CAUTION\n"); 2589 2578 2590 2579 amd64_read_pci_cfg(pvt->misc_f3_ctl, K8_NBCTL, &value); 2591 2580 ··· 2600 2611 "This node reports that DRAM ECC is " 2601 2612 "currently Disabled; ENABLING now\n"); 2602 2613 2614 + pvt->flags.nb_ecc_prev = 0; 2615 + 2603 2616 /* Attempt to turn on DRAM ECC Enable */ 2604 2617 value |= K8_NBCFG_ECC_ENABLE; 2605 2618 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCFG, value); ··· 2616 2625 amd64_printk(KERN_DEBUG, 2617 2626 "Hardware accepted DRAM ECC Enable\n"); 2618 2627 } 2628 + } else { 2629 + pvt->flags.nb_ecc_prev = 1; 2619 2630 } 2631 + 2620 2632 debugf0("NBCFG(2)= 0x%x CHIPKILL= %s ECC_ENABLE= %s\n", value, 2621 2633 (value & K8_NBCFG_CHIPKILL) ? "Enabled" : "Disabled", 2622 2634 (value & K8_NBCFG_ECC_ENABLE) ? "Enabled" : "Disabled"); ··· 2638 2644 value &= ~mask; 2639 2645 value |= pvt->old_nbctl; 2640 2646 2641 - /* restore the NB Enable MCGCTL bit */ 2642 2647 pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCTL, value); 2643 2648 2649 + /* restore previous BIOS DRAM ECC "off" setting which we force-enabled */ 2650 + if (!pvt->flags.nb_ecc_prev) { 2651 + amd64_read_pci_cfg(pvt->misc_f3_ctl, K8_NBCFG, &value); 2652 + value &= ~K8_NBCFG_ECC_ENABLE; 2653 + pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCFG, value); 2654 + } 2655 + 2656 + /* restore the NB Enable MCGCTL bit */ 2644 2657 if (amd64_toggle_ecc_err_reporting(pvt, OFF)) 2645 - amd64_printk(KERN_WARNING, "Error restoring ECC reporting over " 2646 - "MCGCTL!\n"); 2658 + amd64_printk(KERN_WARNING, "Error restoring NB MCGCTL settings!\n"); 2647 2659 } 2648 2660 2649 2661 /* ··· 2690 2690 if (!ecc_enable_override) { 2691 2691 amd64_printk(KERN_NOTICE, "%s", ecc_msg); 2692 2692 return -ENODEV; 2693 + } else { 2694 + amd64_printk(KERN_WARNING, "Forcing ECC checking on!\n"); 2693 2695 } 2694 - ecc_enable_override = 0; 2695 2696 } 2696 2697 2697 2698 return 0;
+2 -1
drivers/edac/amd64_edac.h
··· 487 487 /* misc settings */ 488 488 struct flags { 489 489 unsigned long cf8_extcfg:1; 490 - unsigned long ecc_report:1; 490 + unsigned long nb_mce_enable:1; 491 + unsigned long nb_ecc_prev:1; 491 492 } flags; 492 493 }; 493 494