ath9k: Remove redundant data structure ath9k_txq_info

Use ath9k_tx_queue_info which contains the same elements,
and merge get/set functions of tx queue properties.
Also, fix whitespace damage in struct ath_softc.

Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

authored by Sujith and committed by John W. Linville ea9880fb 60b67f51

+177 -211
+5 -22
drivers/net/wireless/ath9k/ath9k.h
··· 282 TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080, 283 }; 284 285 - struct ath9k_txq_info { 286 - u32 tqi_ver; 287 - enum ath9k_tx_queue_subtype tqi_subtype; 288 - enum ath9k_tx_queue_flags tqi_qflags; 289 - u32 tqi_priority; 290 - u32 tqi_aifs; 291 - u32 tqi_cwmin; 292 - u32 tqi_cwmax; 293 - u16 tqi_shretry; 294 - u16 tqi_lgretry; 295 - u32 tqi_cbrPeriod; 296 - u32 tqi_cbrOverflowLimit; 297 - u32 tqi_burstTime; 298 - u32 tqi_readyTime; 299 - u32 tqi_compBuf; 300 - }; 301 - 302 #define ATH9K_TXQ_USEDEFAULT ((u32) -1) 303 304 #define ATH9K_DECOMP_MASK_SIZE 128 ··· 982 u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah, 983 struct ath9k_channel *chan); 984 u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags); 985 - bool ath9k_hw_gettxqueueprops(struct ath_hal *ah, int q, 986 - struct ath9k_txq_info *qInfo); 987 - bool ath9k_hw_settxqueueprops(struct ath_hal *ah, int q, 988 - const struct ath9k_txq_info *qInfo); 989 struct ath9k_channel *ath9k_regd_check_channel(struct ath_hal *ah, 990 const struct ath9k_channel *c); 991 void ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds, ··· 1036 bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit); 1037 bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); 1038 int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, 1039 - const struct ath9k_txq_info *qInfo); 1040 u32 ath9k_hw_numtxpending(struct ath_hal *ah, u32 q); 1041 const char *ath9k_hw_probe(u16 vendorid, u16 devid); 1042 bool ath9k_hw_disable(struct ath_hal *ah);
··· 282 TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080, 283 }; 284 285 #define ATH9K_TXQ_USEDEFAULT ((u32) -1) 286 287 #define ATH9K_DECOMP_MASK_SIZE 128 ··· 999 u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah, 1000 struct ath9k_channel *chan); 1001 u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags); 1002 + bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q, 1003 + struct ath9k_tx_queue_info *qinfo); 1004 + bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q, 1005 + const struct ath9k_tx_queue_info *qinfo); 1006 struct ath9k_channel *ath9k_regd_check_channel(struct ath_hal *ah, 1007 const struct ath9k_channel *c); 1008 void ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds, ··· 1053 bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit); 1054 bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); 1055 int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, 1056 + const struct ath9k_tx_queue_info *qinfo); 1057 u32 ath9k_hw_numtxpending(struct ath_hal *ah, u32 q); 1058 const char *ath9k_hw_probe(u16 vendorid, u16 devid); 1059 bool ath9k_hw_disable(struct ath_hal *ah);
+4 -4
drivers/net/wireless/ath9k/beacon.c
··· 30 static int ath_beaconq_config(struct ath_softc *sc) 31 { 32 struct ath_hal *ah = sc->sc_ah; 33 - struct ath9k_txq_info qi; 34 35 - ath9k_hw_gettxqueueprops(ah, sc->sc_bhalq, &qi); 36 if (sc->sc_opmode == ATH9K_M_HOSTAP) { 37 /* Always burst out beacon and CAB traffic. */ 38 qi.tqi_aifs = 1; ··· 45 qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax; 46 } 47 48 - if (!ath9k_hw_settxqueueprops(ah, sc->sc_bhalq, &qi)) { 49 DPRINTF(sc, ATH_DBG_FATAL, 50 "%s: unable to update h/w beacon queue parameters\n", 51 __func__); ··· 335 336 int ath_beaconq_setup(struct ath_hal *ah) 337 { 338 - struct ath9k_txq_info qi; 339 340 memzero(&qi, sizeof(qi)); 341 qi.tqi_aifs = 1;
··· 30 static int ath_beaconq_config(struct ath_softc *sc) 31 { 32 struct ath_hal *ah = sc->sc_ah; 33 + struct ath9k_tx_queue_info qi; 34 35 + ath9k_hw_get_txq_props(ah, sc->sc_bhalq, &qi); 36 if (sc->sc_opmode == ATH9K_M_HOSTAP) { 37 /* Always burst out beacon and CAB traffic. */ 38 qi.tqi_aifs = 1; ··· 45 qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax; 46 } 47 48 + if (!ath9k_hw_set_txq_props(ah, sc->sc_bhalq, &qi)) { 49 DPRINTF(sc, ATH_DBG_FATAL, 50 "%s: unable to update h/w beacon queue parameters\n", 51 __func__); ··· 335 336 int ath_beaconq_setup(struct ath_hal *ah) 337 { 338 + struct ath9k_tx_queue_info qi; 339 340 memzero(&qi, sizeof(qi)); 341 qi.tqi_aifs = 1;
+98 -106
drivers/net/wireless/ath9k/core.h
··· 568 int ath_tx_init(struct ath_softc *sc, int nbufs); 569 int ath_tx_cleanup(struct ath_softc *sc); 570 int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype); 571 - int ath_txq_update(struct ath_softc *sc, int qnum, struct ath9k_txq_info *q); 572 int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb); 573 void ath_tx_tasklet(struct ath_softc *sc); 574 u32 ath_txq_depth(struct ath_softc *sc, int qnum); ··· 923 }; 924 925 struct ath_softc { 926 - struct ieee80211_hw *hw; /* mac80211 instance */ 927 - struct pci_dev *pdev; /* Bus handle */ 928 - void __iomem *mem; /* address of the device */ 929 - struct tasklet_struct intr_tq; /* General tasklet */ 930 - struct tasklet_struct bcon_tasklet; /* Beacon tasklet */ 931 - struct ath_config sc_config; /* per-instance load-time 932 - parameters */ 933 - int sc_debug; /* Debug masks */ 934 - struct ath_hal *sc_ah; /* HAL Instance */ 935 - struct ath_rate_softc *sc_rc; /* tx rate control support */ 936 - u32 sc_intrstatus; /* HAL_STATUS */ 937 - enum ath9k_opmode sc_opmode; /* current operating mode */ 938 939 - /* Properties, Config */ 940 - u8 sc_invalid; /* being detached */ 941 - u8 sc_beacons; /* beacons running */ 942 - u8 sc_scanning; /* scanning active */ 943 - u8 sc_txaggr; /* enable 11n tx aggregation */ 944 - u8 sc_rxaggr; /* enable 11n rx aggregation */ 945 - u8 sc_update_chainmask; /* change chain mask */ 946 - u8 sc_full_reset; /* force full reset */ 947 - enum wireless_mode sc_curmode; /* current phy mode */ 948 - u16 sc_curtxpow; /* current tx power limit */ 949 - u16 sc_curaid; /* current association id */ 950 - u8 sc_curbssid[ETH_ALEN]; 951 - u8 sc_myaddr[ETH_ALEN]; 952 - enum PROT_MODE sc_protmode; /* protection mode */ 953 - u8 sc_mcastantenna;/* Multicast antenna number */ 954 - u8 sc_txantenna; /* data tx antenna 955 - (fixed or auto) */ 956 - u8 sc_nbcnvaps; /* # of vaps sending beacons */ 957 - u16 sc_nvaps; /* # of active virtual ap's */ 958 - struct ath_vap *sc_vaps[ATH_BCBUF]; /* interface id 959 - to avp map */ 960 - enum ath9k_int sc_imask; /* interrupt mask copy */ 961 - u8 sc_bssidmask[ETH_ALEN]; 962 - u8 sc_defant; /* current default antenna */ 963 - u8 sc_rxotherant; /* rx's on non-default antenna*/ 964 - u16 sc_cachelsz; /* cache line size */ 965 - int sc_slotupdate; /* slot to next advance fsm */ 966 - int sc_slottime; /* slot time */ 967 - u8 sc_noreset; 968 - int sc_bslot[ATH_BCBUF];/* beacon xmit slots */ 969 - struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */ 970 - struct list_head node_list; 971 - struct ath_ht_info sc_ht_info; 972 - int16_t sc_noise_floor; /* signal noise floor in dBm */ 973 - enum ath9k_ht_extprotspacing sc_ht_extprotspacing; 974 - u8 sc_tx_chainmask; 975 - u8 sc_rx_chainmask; 976 - u8 sc_rxchaindetect_ref; 977 - u8 sc_rxchaindetect_thresh5GHz; 978 - u8 sc_rxchaindetect_thresh2GHz; 979 - u8 sc_rxchaindetect_delta5GHz; 980 - u8 sc_rxchaindetect_delta2GHz; 981 - u32 sc_rtsaggrlimit; /* Chipset specific 982 - aggr limit */ 983 - u32 sc_flags; 984 #ifdef CONFIG_SLOW_ANT_DIV 985 - /* Slow antenna diversity */ 986 - struct ath_antdiv sc_antdiv; 987 #endif 988 enum { 989 - OK, /* no change needed */ 990 - UPDATE, /* update pending */ 991 - COMMIT /* beacon sent, commit change */ 992 - } sc_updateslot; /* slot time update fsm */ 993 994 /* Crypto */ 995 - u32 sc_keymax; /* size of key cache */ 996 - DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */ 997 - u8 sc_splitmic; /* split TKIP MIC keys */ 998 - int sc_keytype; /* type of the key being used */ 999 1000 /* RX */ 1001 - struct list_head sc_rxbuf; /* receive buffer */ 1002 - struct ath_descdma sc_rxdma; /* RX descriptors */ 1003 - int sc_rxbufsize; /* rx size based on mtu */ 1004 - u32 *sc_rxlink; /* link ptr in last RX desc */ 1005 - u32 sc_rxflush; /* rx flush in progress */ 1006 - u64 sc_lastrx; /* tsf of last rx'd frame */ 1007 1008 /* TX */ 1009 - struct list_head sc_txbuf; /* transmit buffer */ 1010 - struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES]; 1011 - struct ath_descdma sc_txdma; /* TX descriptors */ 1012 - u32 sc_txqsetup; /* h/w queues setup */ 1013 - u32 sc_txintrperiod;/* tx interrupt batching */ 1014 - int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME 1015 - AC -> h/w qnum */ 1016 - u32 sc_ant_tx[8]; /* recent tx frames/antenna */ 1017 1018 /* Beacon */ 1019 - struct ath9k_txq_info sc_beacon_qi; /* adhoc only: beacon 1020 - queue parameters */ 1021 - struct ath_descdma sc_bdma; /* beacon descriptors */ 1022 - struct ath_txq *sc_cabq; /* tx q for cab frames */ 1023 - struct list_head sc_bbuf; /* beacon buffers */ 1024 - u32 sc_bhalq; /* HAL q for outgoing beacons */ 1025 - u32 sc_bmisscount; /* missed beacon transmits */ 1026 - u32 ast_be_xmit; /* beacons transmitted */ 1027 1028 /* Rate */ 1029 - struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; 1030 - const struct ath9k_rate_table *sc_rates[WIRELESS_MODE_MAX]; 1031 - const struct ath9k_rate_table *sc_currates; /* current rate table */ 1032 - u8 sc_rixmap[256]; /* IEEE to h/w 1033 - rate table ix */ 1034 - u8 sc_minrateix; /* min h/w rate index */ 1035 - u8 sc_protrix; /* protection rate index */ 1036 struct { 1037 - u32 rateKbps; /* transfer rate in kbs */ 1038 - u8 ieeerate; /* IEEE rate */ 1039 - } sc_hwmap[256]; /* h/w rate ix mappings */ 1040 1041 /* Channel, Band */ 1042 struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX]; 1043 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 1044 - struct ath9k_channel sc_curchan; /* current h/w channel */ 1045 1046 /* Locks */ 1047 - spinlock_t sc_rxflushlock; /* lock of RX flush */ 1048 - spinlock_t sc_rxbuflock; /* rxbuf lock */ 1049 - spinlock_t sc_txbuflock; /* txbuf lock */ 1050 - spinlock_t sc_resetlock; 1051 - spinlock_t node_lock; 1052 }; 1053 1054 int ath_init(u16 devid, struct ath_softc *sc);
··· 568 int ath_tx_init(struct ath_softc *sc, int nbufs); 569 int ath_tx_cleanup(struct ath_softc *sc); 570 int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype); 571 + int ath_txq_update(struct ath_softc *sc, int qnum, 572 + struct ath9k_tx_queue_info *q); 573 int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb); 574 void ath_tx_tasklet(struct ath_softc *sc); 575 u32 ath_txq_depth(struct ath_softc *sc, int qnum); ··· 922 }; 923 924 struct ath_softc { 925 + struct ieee80211_hw *hw; 926 + struct pci_dev *pdev; 927 + void __iomem *mem; 928 + struct tasklet_struct intr_tq; 929 + struct tasklet_struct bcon_tasklet; 930 + struct ath_config sc_config; /* load-time parameters */ 931 + int sc_debug; 932 + struct ath_hal *sc_ah; 933 + struct ath_rate_softc *sc_rc; /* tx rate control support */ 934 + u32 sc_intrstatus; 935 + enum ath9k_opmode sc_opmode; /* current operating mode */ 936 937 + u8 sc_invalid; /* being detached */ 938 + u8 sc_beacons; /* beacons running */ 939 + u8 sc_scanning; /* scanning active */ 940 + u8 sc_txaggr; /* enable 11n tx aggregation */ 941 + u8 sc_rxaggr; /* enable 11n rx aggregation */ 942 + u8 sc_update_chainmask; /* change chain mask */ 943 + u8 sc_full_reset; /* force full reset */ 944 + enum wireless_mode sc_curmode; /* current phy mode */ 945 + u16 sc_curtxpow; 946 + u16 sc_curaid; 947 + u8 sc_curbssid[ETH_ALEN]; 948 + u8 sc_myaddr[ETH_ALEN]; 949 + enum PROT_MODE sc_protmode; 950 + u8 sc_mcastantenna; 951 + u8 sc_txantenna; /* data tx antenna (fixed or auto) */ 952 + u8 sc_nbcnvaps; /* # of vaps sending beacons */ 953 + u16 sc_nvaps; /* # of active virtual ap's */ 954 + struct ath_vap *sc_vaps[ATH_BCBUF]; 955 + enum ath9k_int sc_imask; 956 + u8 sc_bssidmask[ETH_ALEN]; 957 + u8 sc_defant; /* current default antenna */ 958 + u8 sc_rxotherant; /* rx's on non-default antenna */ 959 + u16 sc_cachelsz; 960 + int sc_slotupdate; /* slot to next advance fsm */ 961 + int sc_slottime; 962 + u8 sc_noreset; 963 + int sc_bslot[ATH_BCBUF]; 964 + struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */ 965 + struct list_head node_list; 966 + struct ath_ht_info sc_ht_info; 967 + int16_t sc_noise_floor; /* signal noise floor in dBm */ 968 + enum ath9k_ht_extprotspacing sc_ht_extprotspacing; 969 + u8 sc_tx_chainmask; 970 + u8 sc_rx_chainmask; 971 + u8 sc_rxchaindetect_ref; 972 + u8 sc_rxchaindetect_thresh5GHz; 973 + u8 sc_rxchaindetect_thresh2GHz; 974 + u8 sc_rxchaindetect_delta5GHz; 975 + u8 sc_rxchaindetect_delta2GHz; 976 + u32 sc_rtsaggrlimit; /* Chipset specific aggr limit */ 977 + u32 sc_flags; 978 #ifdef CONFIG_SLOW_ANT_DIV 979 + struct ath_antdiv sc_antdiv; 980 #endif 981 enum { 982 + OK, /* no change needed */ 983 + UPDATE, /* update pending */ 984 + COMMIT /* beacon sent, commit change */ 985 + } sc_updateslot; /* slot time update fsm */ 986 987 /* Crypto */ 988 + u32 sc_keymax; /* size of key cache */ 989 + DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */ 990 + u8 sc_splitmic; /* split TKIP MIC keys */ 991 + int sc_keytype; 992 993 /* RX */ 994 + struct list_head sc_rxbuf; 995 + struct ath_descdma sc_rxdma; 996 + int sc_rxbufsize; /* rx size based on mtu */ 997 + u32 *sc_rxlink; /* link ptr in last RX desc */ 998 + u32 sc_rxflush; /* rx flush in progress */ 999 + u64 sc_lastrx; /* tsf of last rx'd frame */ 1000 1001 /* TX */ 1002 + struct list_head sc_txbuf; 1003 + struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES]; 1004 + struct ath_descdma sc_txdma; 1005 + u32 sc_txqsetup; 1006 + u32 sc_txintrperiod; /* tx interrupt batching */ 1007 + int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */ 1008 + u32 sc_ant_tx[8]; /* recent tx frames/antenna */ 1009 1010 /* Beacon */ 1011 + struct ath9k_tx_queue_info sc_beacon_qi; 1012 + struct ath_descdma sc_bdma; 1013 + struct ath_txq *sc_cabq; 1014 + struct list_head sc_bbuf; 1015 + u32 sc_bhalq; 1016 + u32 sc_bmisscount; 1017 + u32 ast_be_xmit; /* beacons transmitted */ 1018 1019 /* Rate */ 1020 + struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; 1021 + const struct ath9k_rate_table *sc_rates[WIRELESS_MODE_MAX]; 1022 + const struct ath9k_rate_table *sc_currates; 1023 + u8 sc_rixmap[256]; /* IEEE to h/w rate table ix */ 1024 + u8 sc_minrateix; /* min h/w rate index */ 1025 + u8 sc_protrix; /* protection rate index */ 1026 struct { 1027 + u32 rateKbps; /* transfer rate in kbs */ 1028 + u8 ieeerate; /* IEEE rate */ 1029 + } sc_hwmap[256]; /* h/w rate ix mappings */ 1030 1031 /* Channel, Band */ 1032 struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX]; 1033 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 1034 + struct ath9k_channel sc_curchan; 1035 1036 /* Locks */ 1037 + spinlock_t sc_rxflushlock; 1038 + spinlock_t sc_rxbuflock; 1039 + spinlock_t sc_txbuflock; 1040 + spinlock_t sc_resetlock; 1041 + spinlock_t node_lock; 1042 }; 1043 1044 int ath_init(u16 devid, struct ath_softc *sc);
+54 -64
drivers/net/wireless/ath9k/hw.c
··· 7394 return newLevel != curLevel; 7395 } 7396 7397 - static bool ath9k_hw_set_txq_props(struct ath_hal *ah, 7398 - struct ath9k_tx_queue_info *qi, 7399 - const struct ath9k_txq_info *qInfo) 7400 { 7401 u32 cw; 7402 7403 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 7404 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", 7405 __func__); ··· 7417 7418 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %p\n", __func__, qi); 7419 7420 - qi->tqi_ver = qInfo->tqi_ver; 7421 - qi->tqi_subtype = qInfo->tqi_subtype; 7422 - qi->tqi_qflags = qInfo->tqi_qflags; 7423 - qi->tqi_priority = qInfo->tqi_priority; 7424 - if (qInfo->tqi_aifs != ATH9K_TXQ_USEDEFAULT) 7425 - qi->tqi_aifs = min(qInfo->tqi_aifs, 255U); 7426 else 7427 qi->tqi_aifs = INIT_AIFS; 7428 - if (qInfo->tqi_cwmin != ATH9K_TXQ_USEDEFAULT) { 7429 - cw = min(qInfo->tqi_cwmin, 1024U); 7430 qi->tqi_cwmin = 1; 7431 while (qi->tqi_cwmin < cw) 7432 qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1; 7433 } else 7434 - qi->tqi_cwmin = qInfo->tqi_cwmin; 7435 - if (qInfo->tqi_cwmax != ATH9K_TXQ_USEDEFAULT) { 7436 - cw = min(qInfo->tqi_cwmax, 1024U); 7437 qi->tqi_cwmax = 1; 7438 while (qi->tqi_cwmax < cw) 7439 qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1; 7440 } else 7441 qi->tqi_cwmax = INIT_CWMAX; 7442 7443 - if (qInfo->tqi_shretry != 0) 7444 - qi->tqi_shretry = min((u32) qInfo->tqi_shretry, 15U); 7445 else 7446 qi->tqi_shretry = INIT_SH_RETRY; 7447 - if (qInfo->tqi_lgretry != 0) 7448 - qi->tqi_lgretry = min((u32) qInfo->tqi_lgretry, 15U); 7449 else 7450 qi->tqi_lgretry = INIT_LG_RETRY; 7451 - qi->tqi_cbrPeriod = qInfo->tqi_cbrPeriod; 7452 - qi->tqi_cbrOverflowLimit = qInfo->tqi_cbrOverflowLimit; 7453 - qi->tqi_burstTime = qInfo->tqi_burstTime; 7454 - qi->tqi_readyTime = qInfo->tqi_readyTime; 7455 7456 - switch (qInfo->tqi_subtype) { 7457 case ATH9K_WME_UPSD: 7458 if (qi->tqi_type == ATH9K_TX_QUEUE_DATA) 7459 qi->tqi_intFlags = ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS; ··· 7464 return true; 7465 } 7466 7467 - bool ath9k_hw_settxqueueprops(struct ath_hal *ah, int q, 7468 - const struct ath9k_txq_info *qInfo) 7469 { 7470 struct ath_hal_5416 *ahp = AH5416(ah); 7471 struct ath9k_hw_capabilities *pCap = &ah->ah_caps; 7472 7473 if (q >= pCap->total_queues) { 7474 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", 7475 __func__, q); 7476 return false; 7477 } 7478 - return ath9k_hw_set_txq_props(ah, &ahp->ah_txq[q], qInfo); 7479 - } 7480 7481 - static bool ath9k_hw_get_txq_props(struct ath_hal *ah, 7482 - struct ath9k_txq_info *qInfo, 7483 - const struct ath9k_tx_queue_info *qi) 7484 - { 7485 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 7486 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", 7487 __func__); 7488 return false; 7489 } 7490 7491 - qInfo->tqi_qflags = qi->tqi_qflags; 7492 - qInfo->tqi_ver = qi->tqi_ver; 7493 - qInfo->tqi_subtype = qi->tqi_subtype; 7494 - qInfo->tqi_qflags = qi->tqi_qflags; 7495 - qInfo->tqi_priority = qi->tqi_priority; 7496 - qInfo->tqi_aifs = qi->tqi_aifs; 7497 - qInfo->tqi_cwmin = qi->tqi_cwmin; 7498 - qInfo->tqi_cwmax = qi->tqi_cwmax; 7499 - qInfo->tqi_shretry = qi->tqi_shretry; 7500 - qInfo->tqi_lgretry = qi->tqi_lgretry; 7501 - qInfo->tqi_cbrPeriod = qi->tqi_cbrPeriod; 7502 - qInfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit; 7503 - qInfo->tqi_burstTime = qi->tqi_burstTime; 7504 - qInfo->tqi_readyTime = qi->tqi_readyTime; 7505 7506 return true; 7507 } 7508 7509 - bool 7510 - ath9k_hw_gettxqueueprops(struct ath_hal *ah, int q, 7511 - struct ath9k_txq_info *qInfo) 7512 - { 7513 - struct ath_hal_5416 *ahp = AH5416(ah); 7514 - struct ath9k_hw_capabilities *pCap = &ah->ah_caps; 7515 - 7516 - if (q >= pCap->total_queues) { 7517 - DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", 7518 - __func__, q); 7519 - return false; 7520 - } 7521 - return ath9k_hw_get_txq_props(ah, qInfo, &ahp->ah_txq[q]); 7522 - } 7523 - 7524 int 7525 ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, 7526 - const struct ath9k_txq_info *qInfo) 7527 { 7528 struct ath_hal_5416 *ahp = AH5416(ah); 7529 struct ath9k_tx_queue_info *qi; ··· 7551 } 7552 memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); 7553 qi->tqi_type = type; 7554 - if (qInfo == NULL) { 7555 qi->tqi_qflags = 7556 TXQ_FLAG_TXOKINT_ENABLE 7557 | TXQ_FLAG_TXERRINT_ENABLE ··· 7563 qi->tqi_lgretry = INIT_LG_RETRY; 7564 qi->tqi_physCompBuf = 0; 7565 } else { 7566 - qi->tqi_physCompBuf = qInfo->tqi_compBuf; 7567 - (void) ath9k_hw_settxqueueprops(ah, q, qInfo); 7568 } 7569 7570 return q;
··· 7394 return newLevel != curLevel; 7395 } 7396 7397 + bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q, 7398 + const struct ath9k_tx_queue_info *qinfo) 7399 { 7400 u32 cw; 7401 + struct ath_hal_5416 *ahp = AH5416(ah); 7402 + struct ath9k_hw_capabilities *pCap = &ah->ah_caps; 7403 + struct ath9k_tx_queue_info *qi; 7404 7405 + if (q >= pCap->total_queues) { 7406 + DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", 7407 + __func__, q); 7408 + return false; 7409 + } 7410 + 7411 + qi = &ahp->ah_txq[q]; 7412 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 7413 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", 7414 __func__); ··· 7408 7409 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %p\n", __func__, qi); 7410 7411 + qi->tqi_ver = qinfo->tqi_ver; 7412 + qi->tqi_subtype = qinfo->tqi_subtype; 7413 + qi->tqi_qflags = qinfo->tqi_qflags; 7414 + qi->tqi_priority = qinfo->tqi_priority; 7415 + if (qinfo->tqi_aifs != ATH9K_TXQ_USEDEFAULT) 7416 + qi->tqi_aifs = min(qinfo->tqi_aifs, 255U); 7417 else 7418 qi->tqi_aifs = INIT_AIFS; 7419 + if (qinfo->tqi_cwmin != ATH9K_TXQ_USEDEFAULT) { 7420 + cw = min(qinfo->tqi_cwmin, 1024U); 7421 qi->tqi_cwmin = 1; 7422 while (qi->tqi_cwmin < cw) 7423 qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1; 7424 } else 7425 + qi->tqi_cwmin = qinfo->tqi_cwmin; 7426 + if (qinfo->tqi_cwmax != ATH9K_TXQ_USEDEFAULT) { 7427 + cw = min(qinfo->tqi_cwmax, 1024U); 7428 qi->tqi_cwmax = 1; 7429 while (qi->tqi_cwmax < cw) 7430 qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1; 7431 } else 7432 qi->tqi_cwmax = INIT_CWMAX; 7433 7434 + if (qinfo->tqi_shretry != 0) 7435 + qi->tqi_shretry = min((u32) qinfo->tqi_shretry, 15U); 7436 else 7437 qi->tqi_shretry = INIT_SH_RETRY; 7438 + if (qinfo->tqi_lgretry != 0) 7439 + qi->tqi_lgretry = min((u32) qinfo->tqi_lgretry, 15U); 7440 else 7441 qi->tqi_lgretry = INIT_LG_RETRY; 7442 + qi->tqi_cbrPeriod = qinfo->tqi_cbrPeriod; 7443 + qi->tqi_cbrOverflowLimit = qinfo->tqi_cbrOverflowLimit; 7444 + qi->tqi_burstTime = qinfo->tqi_burstTime; 7445 + qi->tqi_readyTime = qinfo->tqi_readyTime; 7446 7447 + switch (qinfo->tqi_subtype) { 7448 case ATH9K_WME_UPSD: 7449 if (qi->tqi_type == ATH9K_TX_QUEUE_DATA) 7450 qi->tqi_intFlags = ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS; ··· 7455 return true; 7456 } 7457 7458 + bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q, 7459 + struct ath9k_tx_queue_info *qinfo) 7460 { 7461 struct ath_hal_5416 *ahp = AH5416(ah); 7462 struct ath9k_hw_capabilities *pCap = &ah->ah_caps; 7463 + struct ath9k_tx_queue_info *qi; 7464 7465 if (q >= pCap->total_queues) { 7466 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", 7467 __func__, q); 7468 return false; 7469 } 7470 7471 + qi = &ahp->ah_txq[q]; 7472 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 7473 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", 7474 __func__); 7475 return false; 7476 } 7477 7478 + qinfo->tqi_qflags = qi->tqi_qflags; 7479 + qinfo->tqi_ver = qi->tqi_ver; 7480 + qinfo->tqi_subtype = qi->tqi_subtype; 7481 + qinfo->tqi_qflags = qi->tqi_qflags; 7482 + qinfo->tqi_priority = qi->tqi_priority; 7483 + qinfo->tqi_aifs = qi->tqi_aifs; 7484 + qinfo->tqi_cwmin = qi->tqi_cwmin; 7485 + qinfo->tqi_cwmax = qi->tqi_cwmax; 7486 + qinfo->tqi_shretry = qi->tqi_shretry; 7487 + qinfo->tqi_lgretry = qi->tqi_lgretry; 7488 + qinfo->tqi_cbrPeriod = qi->tqi_cbrPeriod; 7489 + qinfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit; 7490 + qinfo->tqi_burstTime = qi->tqi_burstTime; 7491 + qinfo->tqi_readyTime = qi->tqi_readyTime; 7492 7493 return true; 7494 } 7495 7496 int 7497 ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, 7498 + const struct ath9k_tx_queue_info *qinfo) 7499 { 7500 struct ath_hal_5416 *ahp = AH5416(ah); 7501 struct ath9k_tx_queue_info *qi; ··· 7561 } 7562 memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); 7563 qi->tqi_type = type; 7564 + if (qinfo == NULL) { 7565 qi->tqi_qflags = 7566 TXQ_FLAG_TXOKINT_ENABLE 7567 | TXQ_FLAG_TXERRINT_ENABLE ··· 7573 qi->tqi_lgretry = INIT_LG_RETRY; 7574 qi->tqi_physCompBuf = 0; 7575 } else { 7576 + qi->tqi_physCompBuf = qinfo->tqi_physCompBuf; 7577 + (void) ath9k_hw_set_txq_props(ah, q, qinfo); 7578 } 7579 7580 return q;
+1 -1
drivers/net/wireless/ath9k/main.c
··· 700 const struct ieee80211_tx_queue_params *params) 701 { 702 struct ath_softc *sc = hw->priv; 703 - struct ath9k_txq_info qi; 704 int ret = 0, qnum; 705 706 if (queue >= WME_NUM_AC)
··· 700 const struct ieee80211_tx_queue_params *params) 701 { 702 struct ath_softc *sc = hw->priv; 703 + struct ath9k_tx_queue_info qi; 704 int ret = 0, qnum; 705 706 if (queue >= WME_NUM_AC)
+15 -14
drivers/net/wireless/ath9k/xmit.c
··· 2209 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) 2210 { 2211 struct ath_hal *ah = sc->sc_ah; 2212 - struct ath9k_txq_info qi; 2213 int qnum; 2214 2215 memzero(&qi, sizeof(qi)); ··· 2217 qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; 2218 qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; 2219 qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; 2220 - qi.tqi_compBuf = 0; 2221 2222 /* 2223 * Enable interrupts only for EOL and DESC conditions. ··· 2337 2338 /* Update parameters for a transmit queue */ 2339 2340 - int ath_txq_update(struct ath_softc *sc, int qnum, struct ath9k_txq_info *qi0) 2341 { 2342 struct ath_hal *ah = sc->sc_ah; 2343 int error = 0; 2344 - struct ath9k_txq_info qi; 2345 2346 if (qnum == sc->sc_bhalq) { 2347 /* ··· 2350 * It will be picked up by ath_beaconq_config when 2351 * it's necessary. 2352 */ 2353 - sc->sc_beacon_qi = *qi0; 2354 return 0; 2355 } 2356 2357 ASSERT(sc->sc_txq[qnum].axq_qnum == qnum); 2358 2359 - ath9k_hw_gettxqueueprops(ah, qnum, &qi); 2360 - qi.tqi_aifs = qi0->tqi_aifs; 2361 - qi.tqi_cwmin = qi0->tqi_cwmin; 2362 - qi.tqi_cwmax = qi0->tqi_cwmax; 2363 - qi.tqi_burstTime = qi0->tqi_burstTime; 2364 - qi.tqi_readyTime = qi0->tqi_readyTime; 2365 2366 - if (!ath9k_hw_settxqueueprops(ah, qnum, &qi)) { 2367 DPRINTF(sc, ATH_DBG_FATAL, 2368 "%s: unable to update hardware queue %u!\n", 2369 __func__, qnum); ··· 2377 2378 int ath_cabq_update(struct ath_softc *sc) 2379 { 2380 - struct ath9k_txq_info qi; 2381 int qnum = sc->sc_cabq->axq_qnum; 2382 struct ath_beacon_config conf; 2383 2384 - ath9k_hw_gettxqueueprops(sc->sc_ah, qnum, &qi); 2385 /* 2386 * Ensure the readytime % is within the bounds. 2387 */
··· 2209 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) 2210 { 2211 struct ath_hal *ah = sc->sc_ah; 2212 + struct ath9k_tx_queue_info qi; 2213 int qnum; 2214 2215 memzero(&qi, sizeof(qi)); ··· 2217 qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; 2218 qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; 2219 qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; 2220 + qi.tqi_physCompBuf = 0; 2221 2222 /* 2223 * Enable interrupts only for EOL and DESC conditions. ··· 2337 2338 /* Update parameters for a transmit queue */ 2339 2340 + int ath_txq_update(struct ath_softc *sc, int qnum, 2341 + struct ath9k_tx_queue_info *qinfo) 2342 { 2343 struct ath_hal *ah = sc->sc_ah; 2344 int error = 0; 2345 + struct ath9k_tx_queue_info qi; 2346 2347 if (qnum == sc->sc_bhalq) { 2348 /* ··· 2349 * It will be picked up by ath_beaconq_config when 2350 * it's necessary. 2351 */ 2352 + sc->sc_beacon_qi = *qinfo; 2353 return 0; 2354 } 2355 2356 ASSERT(sc->sc_txq[qnum].axq_qnum == qnum); 2357 2358 + ath9k_hw_get_txq_props(ah, qnum, &qi); 2359 + qi.tqi_aifs = qinfo->tqi_aifs; 2360 + qi.tqi_cwmin = qinfo->tqi_cwmin; 2361 + qi.tqi_cwmax = qinfo->tqi_cwmax; 2362 + qi.tqi_burstTime = qinfo->tqi_burstTime; 2363 + qi.tqi_readyTime = qinfo->tqi_readyTime; 2364 2365 + if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) { 2366 DPRINTF(sc, ATH_DBG_FATAL, 2367 "%s: unable to update hardware queue %u!\n", 2368 __func__, qnum); ··· 2376 2377 int ath_cabq_update(struct ath_softc *sc) 2378 { 2379 + struct ath9k_tx_queue_info qi; 2380 int qnum = sc->sc_cabq->axq_qnum; 2381 struct ath_beacon_config conf; 2382 2383 + ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi); 2384 /* 2385 * Ensure the readytime % is within the bounds. 2386 */