Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driver

Remove gpio to pinctrl pin mapping code from driver and
address this through standard property "gpio-ranges".

Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Pramod Kumar and committed by
Linus Walleij
ea92211c 03e09bc1

+3 -128
+3 -128
drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c
··· 29 29 #include <linux/of_device.h> 30 30 #include <linux/of_irq.h> 31 31 #include <linux/pinctrl/pinctrl.h> 32 - #include <linux/pinctrl/pinmux.h> 33 32 #include <linux/pinctrl/pinconf.h> 34 33 #include <linux/pinctrl/pinconf-generic.h> 35 34 ··· 596 597 }; 597 598 598 599 /* 599 - * Map a GPIO in the local gpio_chip pin space to a pin in the Cygnus IOMUX 600 - * pinctrl pin space 601 - */ 602 - struct cygnus_gpio_pin_range { 603 - unsigned offset; 604 - unsigned pin_base; 605 - unsigned num_pins; 606 - }; 607 - 608 - #define CYGNUS_PINRANGE(o, p, n) { .offset = o, .pin_base = p, .num_pins = n } 609 - 610 - /* 611 - * Pin mapping table for mapping local GPIO pins to Cygnus IOMUX pinctrl pins 612 - */ 613 - static const struct cygnus_gpio_pin_range cygnus_gpio_pintable[] = { 614 - CYGNUS_PINRANGE(0, 42, 1), 615 - CYGNUS_PINRANGE(1, 44, 3), 616 - CYGNUS_PINRANGE(4, 48, 1), 617 - CYGNUS_PINRANGE(5, 50, 3), 618 - CYGNUS_PINRANGE(8, 126, 1), 619 - CYGNUS_PINRANGE(9, 155, 1), 620 - CYGNUS_PINRANGE(10, 152, 1), 621 - CYGNUS_PINRANGE(11, 154, 1), 622 - CYGNUS_PINRANGE(12, 153, 1), 623 - CYGNUS_PINRANGE(13, 127, 3), 624 - CYGNUS_PINRANGE(16, 140, 1), 625 - CYGNUS_PINRANGE(17, 145, 7), 626 - CYGNUS_PINRANGE(24, 130, 10), 627 - CYGNUS_PINRANGE(34, 141, 4), 628 - CYGNUS_PINRANGE(38, 54, 1), 629 - CYGNUS_PINRANGE(39, 56, 3), 630 - CYGNUS_PINRANGE(42, 60, 3), 631 - CYGNUS_PINRANGE(45, 64, 3), 632 - CYGNUS_PINRANGE(48, 68, 2), 633 - CYGNUS_PINRANGE(50, 84, 6), 634 - CYGNUS_PINRANGE(56, 94, 6), 635 - CYGNUS_PINRANGE(62, 72, 1), 636 - CYGNUS_PINRANGE(63, 70, 1), 637 - CYGNUS_PINRANGE(64, 80, 1), 638 - CYGNUS_PINRANGE(65, 74, 3), 639 - CYGNUS_PINRANGE(68, 78, 1), 640 - CYGNUS_PINRANGE(69, 82, 1), 641 - CYGNUS_PINRANGE(70, 156, 17), 642 - CYGNUS_PINRANGE(87, 104, 12), 643 - CYGNUS_PINRANGE(99, 102, 2), 644 - CYGNUS_PINRANGE(101, 90, 4), 645 - CYGNUS_PINRANGE(105, 116, 6), 646 - CYGNUS_PINRANGE(111, 100, 2), 647 - CYGNUS_PINRANGE(113, 122, 4), 648 - CYGNUS_PINRANGE(123, 11, 1), 649 - CYGNUS_PINRANGE(124, 38, 4), 650 - CYGNUS_PINRANGE(128, 43, 1), 651 - CYGNUS_PINRANGE(129, 47, 1), 652 - CYGNUS_PINRANGE(130, 49, 1), 653 - CYGNUS_PINRANGE(131, 53, 1), 654 - CYGNUS_PINRANGE(132, 55, 1), 655 - CYGNUS_PINRANGE(133, 59, 1), 656 - CYGNUS_PINRANGE(134, 63, 1), 657 - CYGNUS_PINRANGE(135, 67, 1), 658 - CYGNUS_PINRANGE(136, 71, 1), 659 - CYGNUS_PINRANGE(137, 73, 1), 660 - CYGNUS_PINRANGE(138, 77, 1), 661 - CYGNUS_PINRANGE(139, 79, 1), 662 - CYGNUS_PINRANGE(140, 81, 1), 663 - CYGNUS_PINRANGE(141, 83, 1), 664 - CYGNUS_PINRANGE(142, 10, 1) 665 - }; 666 - 667 - /* 668 - * The Cygnus IOMUX controller mainly supports group based mux configuration, 669 - * but certain pins can be muxed to GPIO individually. Only the ASIU GPIO 670 - * controller can support this, so it's an optional configuration 671 - * 672 - * Return -ENODEV means no support and that's fine 673 - */ 674 - static int cygnus_gpio_pinmux_add_range(struct cygnus_gpio *chip) 675 - { 676 - struct device_node *node = chip->dev->of_node; 677 - struct device_node *pinmux_node; 678 - struct platform_device *pinmux_pdev; 679 - struct gpio_chip *gc = &chip->gc; 680 - int i, ret = 0; 681 - 682 - /* parse DT to find the phandle to the pinmux controller */ 683 - pinmux_node = of_parse_phandle(node, "pinmux", 0); 684 - if (!pinmux_node) 685 - return -ENODEV; 686 - 687 - pinmux_pdev = of_find_device_by_node(pinmux_node); 688 - /* no longer need the pinmux node */ 689 - of_node_put(pinmux_node); 690 - if (!pinmux_pdev) { 691 - dev_err(chip->dev, "failed to get pinmux device\n"); 692 - return -EINVAL; 693 - } 694 - 695 - /* now need to create the mapping between local GPIO and PINMUX pins */ 696 - for (i = 0; i < ARRAY_SIZE(cygnus_gpio_pintable); i++) { 697 - ret = gpiochip_add_pin_range(gc, dev_name(&pinmux_pdev->dev), 698 - cygnus_gpio_pintable[i].offset, 699 - cygnus_gpio_pintable[i].pin_base, 700 - cygnus_gpio_pintable[i].num_pins); 701 - if (ret) { 702 - dev_err(chip->dev, "unable to add GPIO pin range\n"); 703 - goto err_put_device; 704 - } 705 - } 706 - 707 - chip->pinmux_is_supported = true; 708 - 709 - /* no need for pinmux_pdev device reference anymore */ 710 - put_device(&pinmux_pdev->dev); 711 - return 0; 712 - 713 - err_put_device: 714 - put_device(&pinmux_pdev->dev); 715 - gpiochip_remove_pin_ranges(gc); 716 - return ret; 717 - } 718 - 719 - /* 720 600 * Cygnus GPIO controller supports some PINCONF related configurations such as 721 601 * pull up, pull down, and drive strength, when the pin is configured to GPIO 722 602 * ··· 729 851 gc->set = cygnus_gpio_set; 730 852 gc->get = cygnus_gpio_get; 731 853 854 + chip->pinmux_is_supported = of_property_read_bool(dev->of_node, 855 + "gpio-ranges"); 856 + 732 857 ret = gpiochip_add(gc); 733 858 if (ret < 0) { 734 859 dev_err(dev, "unable to add GPIO chip\n"); 735 860 return ret; 736 - } 737 - 738 - ret = cygnus_gpio_pinmux_add_range(chip); 739 - if (ret && ret != -ENODEV) { 740 - dev_err(dev, "unable to add GPIO pin range\n"); 741 - goto err_rm_gpiochip; 742 861 } 743 862 744 863 ret = cygnus_gpio_register_pinconf(chip);