Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: phy: Convert st,spear1310-miphy to DT schema

Convert the ST SPEAr MIPHY PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212629.744191-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Rob Herring (Arm) and committed by
Vinod Koul
ea54c9d1 3ed7be12

+53 -15
+53
Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/st,spear1310-miphy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ST SPEAr miphy 8 + 9 + maintainers: 10 + - Pratyush Anand <pratyush.anand@gmail.com> 11 + 12 + description: 13 + ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA. 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - st,spear1310-miphy 19 + - st,spear1340-miphy 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + misc: 25 + description: Phandle for the syscon node to access misc registers. 26 + $ref: /schemas/types.yaml#/definitions/phandle 27 + 28 + '#phy-cells': 29 + description: > 30 + Cell[0] indicates interface type: 0 = SATA, 1 = PCIe. 31 + const: 1 32 + 33 + phy-id: 34 + description: Instance id of the phy. Required when multiple PHYs are present. 35 + $ref: /schemas/types.yaml#/definitions/uint32 36 + 37 + required: 38 + - compatible 39 + - reg 40 + - misc 41 + - '#phy-cells' 42 + 43 + additionalProperties: false 44 + 45 + examples: 46 + - | 47 + miphy@1000 { 48 + compatible = "st,spear1310-miphy"; 49 + reg = <0x1000 0x100>; 50 + misc = <&syscon>; 51 + #phy-cells = <1>; 52 + phy-id = <0>; 53 + };
-15
Documentation/devicetree/bindings/phy/st-spear-miphy.txt
··· 1 - ST SPEAr miphy DT details 2 - ========================= 3 - 4 - ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA. 5 - 6 - Required properties: 7 - - compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy" 8 - - reg : offset and length of the PHY register set. 9 - - misc: phandle for the syscon node to access misc registers 10 - - #phy-cells : from the generic PHY bindings, must be 1. 11 - - cell[1]: 0 if phy used for SATA, 1 for PCIe. 12 - 13 - Optional properties: 14 - - phy-id: Instance id of the phy. Only required when there are multiple phys 15 - present on a implementation.