Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

PCI: Refactor pcie_update_link_speed()

pcie_update_link_speed() is passed the Link Status register but not all
callers have that value at hand nor need the value.

Refactor pcie_update_link_speed() to include reading the Link Status
register and create __pcie_update_link_speed() which can be used by the
hotplug code that has the register value at hand beforehand (and needs the
value for other purposes).

Link: https://lore.kernel.org/r/20241018144755.7875-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Ilpo Järvinen and committed by
Bjorn Helgaas
e93d9fcf d2bd39c0

+14 -7
+1 -1
drivers/pci/hotplug/pciehp_hpc.c
··· 319 319 return -1; 320 320 } 321 321 322 - pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); 322 + __pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); 323 323 324 324 if (!found) { 325 325 ctrl_info(ctrl, "Slot(%s): No device found\n",
+6 -1
drivers/pci/pci.h
··· 379 379 enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev); 380 380 void __pcie_print_link_status(struct pci_dev *dev, bool verbose); 381 381 void pcie_report_downtraining(struct pci_dev *dev); 382 - void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); 382 + 383 + static inline void __pcie_update_link_speed(struct pci_bus *bus, u16 linksta) 384 + { 385 + bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS]; 386 + } 387 + void pcie_update_link_speed(struct pci_bus *bus); 383 388 384 389 /* Single Root I/O Virtualization */ 385 390 struct pci_sriov {
+7 -5
drivers/pci/probe.c
··· 742 742 } 743 743 EXPORT_SYMBOL_GPL(pci_speed_string); 744 744 745 - void pcie_update_link_speed(struct pci_bus *bus, u16 linksta) 745 + void pcie_update_link_speed(struct pci_bus *bus) 746 746 { 747 - bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS]; 747 + struct pci_dev *bridge = bus->self; 748 + u16 linksta; 749 + 750 + pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta); 751 + __pcie_update_link_speed(bus, linksta); 748 752 } 749 753 EXPORT_SYMBOL_GPL(pcie_update_link_speed); 750 754 ··· 831 827 832 828 if (pci_is_pcie(bridge)) { 833 829 u32 linkcap; 834 - u16 linksta; 835 830 836 831 pcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap); 837 832 bus->max_bus_speed = pcie_link_speed[linkcap & PCI_EXP_LNKCAP_SLS]; 838 833 839 - pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta); 840 - pcie_update_link_speed(bus, linksta); 834 + pcie_update_link_speed(bus); 841 835 } 842 836 } 843 837