tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Replace all DMA_nBIT_MASK macro with DMA_BIT_MASK(n)

This is the second go through of the old DMA_nBIT_MASK macro,and there're not
so many of them left,so I put them into one patch.I hope this is the last round.
After this the definition of the old DMA_nBIT_MASK macro could be removed.

Signed-off-by: Yang Hongyang <yanghy@cn.fujitsu.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: Greg KH <greg@kroah.com>
Cc: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Yang Hongyang and committed by
Linus Torvalds e930438c 316cb4ef

+36 -36
+4 -4
arch/arm/mach-omap2/usb-musb.c
··· 131 131 .power = 50, /* up to 100 mA */ 132 132 }; 133 133 134 - static u64 musb_dmamask = DMA_32BIT_MASK; 134 + static u64 musb_dmamask = DMA_BIT_MASK(32); 135 135 136 136 static struct platform_device musb_device = { 137 137 .name = "musb_hdrc", 138 138 .id = -1, 139 139 .dev = { 140 140 .dma_mask = &musb_dmamask, 141 - .coherent_dma_mask = DMA_32BIT_MASK, 141 + .coherent_dma_mask = DMA_BIT_MASK(32), 142 142 .platform_data = &musb_plat, 143 143 }, 144 144 .num_resources = ARRAY_SIZE(musb_resources), ··· 146 146 }; 147 147 148 148 #ifdef CONFIG_NOP_USB_XCEIV 149 - static u64 nop_xceiv_dmamask = DMA_32BIT_MASK; 149 + static u64 nop_xceiv_dmamask = DMA_BIT_MASK(32); 150 150 151 151 static struct platform_device nop_xceiv_device = { 152 152 .name = "nop_usb_xceiv", 153 153 .id = -1, 154 154 .dev = { 155 155 .dma_mask = &nop_xceiv_dmamask, 156 - .coherent_dma_mask = DMA_32BIT_MASK, 156 + .coherent_dma_mask = DMA_BIT_MASK(32), 157 157 .platform_data = NULL, 158 158 }, 159 159 };
+1 -1
arch/ia64/kernel/pci-swiotlb.c
··· 16 16 static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size, 17 17 dma_addr_t *dma_handle, gfp_t gfp) 18 18 { 19 - if (dev->coherent_dma_mask != DMA_64BIT_MASK) 19 + if (dev->coherent_dma_mask != DMA_BIT_MASK(64)) 20 20 gfp |= GFP_DMA; 21 21 return swiotlb_alloc_coherent(dev, size, dma_handle, gfp); 22 22 }
+1 -1
drivers/atm/solos-pci.c
··· 1059 1059 goto out; 1060 1060 } 1061 1061 1062 - err = pci_set_dma_mask(dev, DMA_32BIT_MASK); 1062 + err = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); 1063 1063 if (err) { 1064 1064 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n"); 1065 1065 goto out;
+1 -1
drivers/block/cciss.c
··· 3505 3505 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3506 3506 CCISS commands, so they must be allocated from the lower 4GiB of 3507 3507 memory. */ 3508 - err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 3508 + err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3509 3509 if (err) { 3510 3510 iounmap(vaddr); 3511 3511 return -ENOMEM;
+2 -2
drivers/net/atl1c/atl1c_main.c
··· 2532 2532 * various kernel subsystems to support the mechanics required by a 2533 2533 * fixed-high-32-bit system. 2534 2534 */ 2535 - if ((pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) || 2536 - (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) != 0)) { 2535 + if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2536 + (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2537 2537 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2538 2538 goto err_dma; 2539 2539 }
+2 -2
drivers/net/benet/be_main.c
··· 1821 1821 1822 1822 be_msix_enable(adapter); 1823 1823 1824 - status = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 1824 + status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 1825 1825 if (!status) { 1826 1826 netdev->features |= NETIF_F_HIGHDMA; 1827 1827 } else { 1828 - status = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1828 + status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1829 1829 if (status) { 1830 1830 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n"); 1831 1831 goto free_netdev;
+4 -4
drivers/net/jme.c
··· 2591 2591 jme_pci_dma64(struct pci_dev *pdev) 2592 2592 { 2593 2593 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && 2594 - !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) 2595 - if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) 2594 + !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 2595 + if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) 2596 2596 return 1; 2597 2597 2598 2598 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && 2599 - !pci_set_dma_mask(pdev, DMA_40BIT_MASK)) 2600 - if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) 2599 + !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))) 2600 + if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) 2601 2601 return 1; 2602 2602 2603 2603 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
+2 -2
drivers/net/wireless/ath9k/pci.c
··· 93 93 if (pci_enable_device(pdev)) 94 94 return -EIO; 95 95 96 - ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 96 + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 97 97 98 98 if (ret) { 99 99 printk(KERN_ERR "ath9k: 32-bit DMA not available\n"); 100 100 goto bad; 101 101 } 102 102 103 - ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 103 + ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 104 104 105 105 if (ret) { 106 106 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
+2 -2
drivers/net/wireless/p54/p54pci.c
··· 492 492 goto err_disable_dev; 493 493 } 494 494 495 - if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) || 496 - pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) { 495 + if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) || 496 + pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 497 497 dev_err(&pdev->dev, "No suitable DMA available\n"); 498 498 goto err_free_reg; 499 499 }
+4 -4
drivers/scsi/3w-9xxx.c
··· 2234 2234 pci_set_master(pdev); 2235 2235 pci_try_set_mwi(pdev); 2236 2236 2237 - if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) 2238 - || pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) 2239 - if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) 2240 - || pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) { 2237 + if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) 2238 + || pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) 2239 + if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 2240 + || pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 2241 2241 TW_PRINTK(host, TW_DRIVER, 0x40, "Failed to set dma mask during resume"); 2242 2242 retval = -ENODEV; 2243 2243 goto out_disable_device;
+1 -1
drivers/scsi/aacraid/aachba.c
··· 1378 1378 if (dev->nondasd_support && !dev->in_reset) 1379 1379 printk(KERN_INFO "%s%d: Non-DASD support enabled.\n",dev->name, dev->id); 1380 1380 1381 - if (dma_get_required_mask(&dev->pdev->dev) > DMA_32BIT_MASK) 1381 + if (dma_get_required_mask(&dev->pdev->dev) > DMA_BIT_MASK(32)) 1382 1382 dev->needs_dac = 1; 1383 1383 dev->dac_support = 0; 1384 1384 if ((sizeof(dma_addr_t) > 4) && dev->needs_dac &&
+5 -5
drivers/scsi/mpt2sas/mpt2sas_base.c
··· 855 855 if (sizeof(dma_addr_t) > 4) { 856 856 const uint64_t required_mask = 857 857 dma_get_required_mask(&pdev->dev); 858 - if ((required_mask > DMA_32BIT_MASK) && !pci_set_dma_mask(pdev, 859 - DMA_64BIT_MASK) && !pci_set_consistent_dma_mask(pdev, 860 - DMA_64BIT_MASK)) { 858 + if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 859 + DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 860 + DMA_BIT_MASK(64))) { 861 861 ioc->base_add_sg_single = &_base_add_sg_single_64; 862 862 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 863 863 desc = "64"; ··· 865 865 } 866 866 } 867 867 868 - if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK) 869 - && !pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) { 868 + if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 869 + && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 870 870 ioc->base_add_sg_single = &_base_add_sg_single_32; 871 871 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 872 872 desc = "32";
+1 -1
drivers/staging/b3dfg/b3dfg.c
··· 1000 1000 1001 1001 pci_set_master(pdev); 1002 1002 1003 - r = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1003 + r = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1004 1004 if (r) { 1005 1005 dev_err(&pdev->dev, "no usable DMA configuration\n"); 1006 1006 goto err_free_res;
+2 -2
drivers/usb/otg/nop-usb-xceiv.c
··· 36 36 struct device *dev; 37 37 }; 38 38 39 - static u64 nop_xceiv_dmamask = DMA_32BIT_MASK; 39 + static u64 nop_xceiv_dmamask = DMA_BIT_MASK(32); 40 40 41 41 static struct platform_device nop_xceiv_device = { 42 42 .name = "nop_usb_xceiv", 43 43 .id = -1, 44 44 .dev = { 45 45 .dma_mask = &nop_xceiv_dmamask, 46 - .coherent_dma_mask = DMA_32BIT_MASK, 46 + .coherent_dma_mask = DMA_BIT_MASK(32), 47 47 .platform_data = NULL, 48 48 }, 49 49 };
+4 -4
sound/pci/hda/hda_intel.c
··· 2260 2260 gcap &= ~0x01; 2261 2261 2262 2262 /* allow 64bit DMA address if supported by H/W */ 2263 - if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_64BIT_MASK)) 2264 - pci_set_consistent_dma_mask(pci, DMA_64BIT_MASK); 2263 + if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64))) 2264 + pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64)); 2265 2265 else { 2266 - pci_set_dma_mask(pci, DMA_32BIT_MASK); 2267 - pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK); 2266 + pci_set_dma_mask(pci, DMA_BIT_MASK(32)); 2267 + pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)); 2268 2268 } 2269 2269 2270 2270 /* read number of streams from GCAP register instead of using