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Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller

The suspend/resume code for Armada XP has to modify certain registers
of the SDRAM controller. Therefore, we need to define a Device Tree
binding for this hardware block.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: devicetree@vger.kernel.org
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

authored by

Thomas Petazzoni and committed by
Jason Cooper
e92293a2 f114040e

+21
+21
Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
··· 1 + Device Tree bindings for MVEBU SDRAM controllers 2 + 3 + The Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller 4 + differs from one SoC variant to another, but they also share a number 5 + of commonalities. 6 + 7 + For now, this Device Tree binding documentation only documents the 8 + Armada XP SDRAM controller. 9 + 10 + Required properties: 11 + 12 + - compatible: for Armada XP, "marvell,armada-xp-sdram-controller" 13 + - reg: a resource specifier for the register space, which should 14 + include all SDRAM controller registers as per the datasheet. 15 + 16 + Example: 17 + 18 + sdramc@1400 { 19 + compatible = "marvell,armada-xp-sdram-controller"; 20 + reg = <0x1400 0x500>; 21 + };