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[ARM] 4384/1: S3C2412/13 SPI registers offset correction

Change the SPI Channel 1 register offset in s3c_spi1_resource[], and
s3c2412_dma_mappings[]. Offset has to be 0x100 in s3c2412/13's case.
Also, total SPI memory resource size changed to 0x24 for s3c2412/13.

Signed-off-by: Sandeep Patil <psandeep.s@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Sandeep Sanjay Patil and committed by
Russell King e903382c d73d8011

+16 -4
unified split
+2 -2
arch/arm/mach-s3c2412/dma.c
··· 59 [DMACH_SPI1] = { 60 .name = "spi1", 61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), 62 - .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT, 63 - .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT, 64 }, 65 [DMACH_UART0] = { 66 .name = "uart0",
··· 59 [DMACH_SPI1] = { 60 .name = "spi1", 61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), 62 + .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, 63 + .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, 64 }, 65 [DMACH_UART0] = { 66 .name = "uart0",
+9
arch/arm/mach-s3c2412/s3c2412.c
··· 37 #include <asm/arch/regs-gpio.h> 38 #include <asm/arch/regs-gpioj.h> 39 #include <asm/arch/regs-dsc.h> 40 41 #include <asm/plat-s3c24xx/s3c2412.h> 42 #include <asm/plat-s3c24xx/cpu.h> ··· 75 s3c_device_sdi.name = "s3c2412-sdi"; 76 s3c_device_lcd.name = "s3c2412-lcd"; 77 s3c_device_nand.name = "s3c2412-nand"; 78 } 79 80 /* s3c2412_idle
··· 37 #include <asm/arch/regs-gpio.h> 38 #include <asm/arch/regs-gpioj.h> 39 #include <asm/arch/regs-dsc.h> 40 + #include <asm/arch/regs-spi.h> 41 42 #include <asm/plat-s3c24xx/s3c2412.h> 43 #include <asm/plat-s3c24xx/cpu.h> ··· 74 s3c_device_sdi.name = "s3c2412-sdi"; 75 s3c_device_lcd.name = "s3c2412-lcd"; 76 s3c_device_nand.name = "s3c2412-nand"; 77 + 78 + /* spi channel related changes, s3c2412/13 specific */ 79 + s3c_device_spi0.name = "s3c2412-spi"; 80 + s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24; 81 + s3c_device_spi1.name = "s3c2412-spi"; 82 + s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1; 83 + s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24; 84 + 85 } 86 87 /* s3c2412_idle
+3 -2
arch/arm/plat-s3c24xx/devs.c
··· 33 34 #include <asm/plat-s3c24xx/devs.h> 35 #include <asm/plat-s3c24xx/cpu.h> 36 37 /* Serial port registrations */ 38 ··· 438 439 static struct resource s3c_spi1_resource[] = { 440 [0] = { 441 - .start = S3C24XX_PA_SPI + 0x20, 442 - .end = S3C24XX_PA_SPI + 0x20 + 0x1f, 443 .flags = IORESOURCE_MEM, 444 }, 445 [1] = {
··· 33 34 #include <asm/plat-s3c24xx/devs.h> 35 #include <asm/plat-s3c24xx/cpu.h> 36 + #include <asm/arch/regs-spi.h> 37 38 /* Serial port registrations */ 39 ··· 437 438 static struct resource s3c_spi1_resource[] = { 439 [0] = { 440 + .start = S3C24XX_PA_SPI + S3C2410_SPI1, 441 + .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f, 442 .flags = IORESOURCE_MEM, 443 }, 444 [1] = {
+2
include/asm-arm/arch-s3c2410/regs-spi.h
··· 12 #ifndef __ASM_ARCH_REGS_SPI_H 13 #define __ASM_ARCH_REGS_SPI_H 14 15 16 #define S3C2410_SPCON (0x00) 17
··· 12 #ifndef __ASM_ARCH_REGS_SPI_H 13 #define __ASM_ARCH_REGS_SPI_H 14 15 + #define S3C2410_SPI1 (0x20) 16 + #define S3C2412_SPI1 (0x100) 17 18 #define S3C2410_SPCON (0x00) 19