Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'qcom-dts-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm dts updates for v5.13

This adds Bluetooth support on the Samsung Galaxy S5, corrects the mount
matrix for the IMU on Nexus 5 and corrects the fuel gauge irq trigger
for the two devices.

* tag 'qcom-dts-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: msm8974-klte: Add bluetooth support
ARM: dts: qcom: msm8974: add blsp2_uart8
ARM: dts: qcom: msm8974-samsung-klte: correct fuel gauge interrupt trigger level
ARM: dts: qcom: msm8974-lge-nexus5: correct fuel gauge interrupt trigger level
ARM: dts: qcom: msm8974-hammerhead: add mount matrix for IMU

Link: https://lore.kernel.org/r/20210409162359.776076-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+65 -2
+5 -1
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
··· 529 529 pinctrl-names = "default"; 530 530 pinctrl-0 = <&mpu6515_pin>; 531 531 532 + mount-matrix = "0", "-1", "0", 533 + "-1", "0", "0", 534 + "0", "0", "1"; 535 + 532 536 i2c-gate { 533 537 #address-cells = <1>; 534 538 #size-cells = <0>; ··· 579 575 maxim,rcomp = /bits/ 8 <0x4d>; 580 576 581 577 interrupt-parent = <&msmgpio>; 582 - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 578 + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 583 579 584 580 pinctrl-names = "default"; 585 581 pinctrl-0 = <&fuelgauge_pin>;
+51 -1
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
··· 322 322 status = "okay"; 323 323 }; 324 324 325 + /* blsp2_uart8 */ 326 + serial@f995e000 { 327 + status = "okay"; 328 + 329 + pinctrl-names = "default", "sleep"; 330 + pinctrl-0 = <&blsp2_uart8_pins_active>; 331 + pinctrl-1 = <&blsp2_uart8_pins_sleep>; 332 + 333 + bluetooth { 334 + compatible = "brcm,bcm43540-bt"; 335 + max-speed = <3000000>; 336 + pinctrl-names = "default"; 337 + pinctrl-0 = <&bt_pins>; 338 + device-wakeup-gpios = <&msmgpio 91 GPIO_ACTIVE_HIGH>; 339 + shutdown-gpios = <&gpio_expander 9 GPIO_ACTIVE_HIGH>; 340 + interrupt-parent = <&msmgpio>; 341 + interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; 342 + interrupt-names = "host-wakeup"; 343 + }; 344 + }; 345 + 325 346 gpio-keys { 326 347 compatible = "gpio-keys"; 327 348 input-name = "gpio-keys"; ··· 377 356 }; 378 357 379 358 pinctrl@fd510000 { 359 + blsp2_uart8_pins_active: blsp2-uart8-pins-active { 360 + pins = "gpio45", "gpio46", "gpio47", "gpio48"; 361 + function = "blsp_uart8"; 362 + drive-strength = <8>; 363 + bias-disable; 364 + }; 365 + 366 + blsp2_uart8_pins_sleep: blsp2-uart8-pins-sleep { 367 + pins = "gpio45", "gpio46", "gpio47", "gpio48"; 368 + function = "gpio"; 369 + drive-strength = <2>; 370 + bias-pull-down; 371 + }; 372 + 373 + bt_pins: bt-pins { 374 + hostwake { 375 + pins = "gpio75"; 376 + function = "gpio"; 377 + drive-strength = <16>; 378 + input-enable; 379 + }; 380 + 381 + devwake { 382 + pins = "gpio91"; 383 + function = "gpio"; 384 + drive-strength = <2>; 385 + }; 386 + }; 387 + 380 388 sdhc1_pin_a: sdhc1-pin-active { 381 389 clk { 382 390 pins = "sdc1_clk"; ··· 767 717 maxim,rcomp = /bits/ 8 <0x56>; 768 718 769 719 interrupt-parent = <&pma8084_gpios>; 770 - interrupts = <21 IRQ_TYPE_EDGE_FALLING>; 720 + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 771 721 772 722 pinctrl-names = "default"; 773 723 pinctrl-0 = <&fuelgauge_pin>;
+9
arch/arm/boot/dts/qcom-msm8974.dtsi
··· 715 715 status = "disabled"; 716 716 }; 717 717 718 + blsp2_uart8: serial@f995e000 { 719 + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 720 + reg = <0xf995e000 0x1000>; 721 + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 722 + clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; 723 + clock-names = "core", "iface"; 724 + status = "disabled"; 725 + }; 726 + 718 727 blsp2_uart10: serial@f9960000 { 719 728 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 720 729 reg = <0xf9960000 0x1000>;