Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

sound: pci: au88x0: printk replacement

as pr_* macros are more preffered over printk, so printk replaced
with corresponding pr_* macros.
this patch will generate warning from checkpatch as it only did printk
replacement and didnot fixed other style issues.

Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>

authored by

Sudip Mukherjee and committed by
Takashi Iwai
e7e69265 848f3a82

+74 -74
+11 -11
sound/pci/au88x0/au88x0.c
··· 48 48 { 49 49 int rc; 50 50 if (!(rc = pci_write_config_byte(vortex, 0x40, 0xff))) { 51 - printk(KERN_INFO CARD_NAME 51 + pr_info( CARD_NAME 52 52 ": vortex latency is 0xff\n"); 53 53 } else { 54 - printk(KERN_WARNING CARD_NAME 54 + pr_warn( CARD_NAME 55 55 ": could not set vortex latency: pci error 0x%x\n", rc); 56 56 } 57 57 } ··· 70 70 if (!(rc = pci_read_config_byte(via, 0x42, &value)) 71 71 && ((value & 0x10) 72 72 || !(rc = pci_write_config_byte(via, 0x42, value | 0x10)))) { 73 - printk(KERN_INFO CARD_NAME 73 + pr_info( CARD_NAME 74 74 ": bridge config is 0x%x\n", value | 0x10); 75 75 } else { 76 - printk(KERN_WARNING CARD_NAME 76 + pr_warn( CARD_NAME 77 77 ": could not set vortex latency: pci error 0x%x\n", rc); 78 78 } 79 79 } ··· 97 97 PCI_DEVICE_ID_AMD_FE_GATE_7007, NULL); 98 98 } 99 99 if (via) { 100 - printk(KERN_INFO CARD_NAME ": Activating latency workaround...\n"); 100 + pr_info( CARD_NAME ": Activating latency workaround...\n"); 101 101 vortex_fix_latency(vortex); 102 102 vortex_fix_agp_bridge(via); 103 103 } ··· 153 153 return err; 154 154 if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 || 155 155 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) { 156 - printk(KERN_ERR "error to set DMA mask\n"); 156 + pr_err( "error to set DMA mask\n"); 157 157 pci_disable_device(pci); 158 158 return -ENXIO; 159 159 } ··· 182 182 183 183 chip->mmio = pci_ioremap_bar(pci, 0); 184 184 if (!chip->mmio) { 185 - printk(KERN_ERR "MMIO area remap failed.\n"); 185 + pr_err( "MMIO area remap failed.\n"); 186 186 err = -ENOMEM; 187 187 goto ioremap_out; 188 188 } ··· 191 191 * This must be done before we do request_irq otherwise we can get spurious 192 192 * interrupts that we do not handle properly and make a mess of things */ 193 193 if ((err = vortex_core_init(chip)) != 0) { 194 - printk(KERN_ERR "hw core init failed\n"); 194 + pr_err( "hw core init failed\n"); 195 195 goto core_out; 196 196 } 197 197 198 198 if ((err = request_irq(pci->irq, vortex_interrupt, 199 199 IRQF_SHARED, KBUILD_MODNAME, 200 200 chip)) != 0) { 201 - printk(KERN_ERR "cannot grab irq\n"); 201 + pr_err( "cannot grab irq\n"); 202 202 goto irq_out; 203 203 } 204 204 chip->irq = pci->irq; ··· 342 342 chip->rev = pci->revision; 343 343 #ifdef CHIP_AU8830 344 344 if ((chip->rev) != 0xfe && (chip->rev) != 0xfa) { 345 - printk(KERN_ALERT 345 + pr_alert( 346 346 "vortex: The revision (%x) of your card has not been seen before.\n", 347 347 chip->rev); 348 - printk(KERN_ALERT 348 + pr_alert( 349 349 "vortex: Please email the results of 'lspci -vv' to openvortex-dev@nongnu.org.\n"); 350 350 snd_card_free(card); 351 351 err = -ENODEV;
+5 -5
sound/pci/au88x0/au88x0_a3d.c
··· 463 463 static void a3dsrc_ZeroState(a3dsrc_t * a) 464 464 { 465 465 /* 466 - printk(KERN_DEBUG "vortex: ZeroState slice: %d, source %d\n", 466 + pr_debug( "vortex: ZeroState slice: %d, source %d\n", 467 467 a->slice, a->source); 468 468 */ 469 469 a3dsrc_SetAtmosState(a, 0, 0, 0, 0); ··· 489 489 int i, var, var2; 490 490 491 491 if ((a->vortex) == NULL) { 492 - printk(KERN_ERR "vortex: ZeroStateA3D: ERROR: a->vortex is NULL\n"); 492 + pr_err( "vortex: ZeroStateA3D: ERROR: a->vortex is NULL\n"); 493 493 return; 494 494 } 495 495 ··· 628 628 v->mixxtlk[0] = 629 629 vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN); 630 630 if (v->mixxtlk[0] < 0) { 631 - printk 631 + pr_warn 632 632 ("vortex: vortex_Vort3D: ERROR: not enough free mixer resources.\n"); 633 633 return; 634 634 } 635 635 v->mixxtlk[1] = 636 636 vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN); 637 637 if (v->mixxtlk[1] < 0) { 638 - printk 638 + pr_warn 639 639 ("vortex: vortex_Vort3D: ERROR: not enough free mixer resources.\n"); 640 640 return; 641 641 } ··· 679 679 static void vortex_Vort3D_InitializeSource(a3dsrc_t * a, int en) 680 680 { 681 681 if (a->vortex == NULL) { 682 - printk 682 + pr_warn 683 683 ("vortex: Vort3D_InitializeSource: A3D source not initialized\n"); 684 684 return; 685 685 }
+38 -38
sound/pci/au88x0/au88x0_core.c
··· 285 285 temp = hwread(vortex->mmio, prev); 286 286 //printk(KERN_INFO "vortex: mixAddWTD: while addr=%x, val=%x\n", prev, temp); 287 287 if ((++lifeboat) > 0xf) { 288 - printk(KERN_ERR 288 + pr_err( 289 289 "vortex_mixer_addWTD: lifeboat overflow\n"); 290 290 return 0; 291 291 } ··· 303 303 304 304 eax = hwread(vortex->mmio, VORTEX_MIXER_SR); 305 305 if (((1 << ch) & eax) == 0) { 306 - printk(KERN_ERR "mix ALARM %x\n", eax); 306 + pr_err( "mix ALARM %x\n", eax); 307 307 return 0; 308 308 } 309 309 ebp = VORTEX_MIXER_CHNBASE + (ch << 2); ··· 324 324 //printk(KERN_INFO "vortex: mixdelWTD: 1 addr=%x, val=%x, src=%x\n", ebx, edx, src); 325 325 while ((edx & 0xf) != mix) { 326 326 if ((esi) > 0xf) { 327 - printk(KERN_ERR 327 + pr_err( 328 328 "vortex: mixdelWTD: error lifeboat overflow\n"); 329 329 return 0; 330 330 } ··· 492 492 hwwrite(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2), ratio); 493 493 temp = hwread(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2)); 494 494 if ((++lifeboat) > 0x9) { 495 - printk(KERN_ERR "Vortex: Src cvr fail\n"); 495 + pr_err( "Vortex: Src cvr fail\n"); 496 496 break; 497 497 } 498 498 } ··· 545 545 hwwrite(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2), desired_ratio); 546 546 547 547 if ((lifeboat++) > 15) { 548 - printk(KERN_ERR "Vortex: could not set src-%d from %d to %d\n", 548 + pr_err( "Vortex: could not set src-%d from %d to %d\n", 549 549 src, hw_ratio, desired_ratio); 550 550 break; 551 551 } ··· 684 684 temp = hwread(vortex->mmio, prev); 685 685 //printk(KERN_INFO "vortex: srcAddWTD: while addr=%x, val=%x\n", prev, temp); 686 686 if ((++lifeboat) > 0xf) { 687 - printk(KERN_ERR 687 + pr_err( 688 688 "vortex_src_addWTD: lifeboat overflow\n"); 689 689 return 0; 690 690 } ··· 703 703 704 704 eax = hwread(vortex->mmio, VORTEX_SRCBLOCK_SR); 705 705 if (((1 << ch) & eax) == 0) { 706 - printk(KERN_ERR "src alarm\n"); 706 + pr_err( "src alarm\n"); 707 707 return 0; 708 708 } 709 709 ebp = VORTEX_SRC_CHNBASE + (ch << 2); ··· 724 724 //printk(KERN_INFO "vortex: srcdelWTD: 1 addr=%x, val=%x, src=%x\n", ebx, edx, src); 725 725 while ((edx & 0xf) != src) { 726 726 if ((esi) > 0xf) { 727 - printk 727 + pr_warn 728 728 ("vortex: srcdelWTD: error, lifeboat overflow\n"); 729 729 return 0; 730 730 } ··· 819 819 do { 820 820 temp = hwread(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2)); 821 821 if (lifeboat++ > 0xbb8) { 822 - printk(KERN_ERR 822 + pr_err( 823 823 "Vortex: vortex_fifo_setadbctrl fail\n"); 824 824 break; 825 825 } ··· 915 915 do { 916 916 temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2)); 917 917 if (lifeboat++ > 0xbb8) { 918 - printk(KERN_ERR "Vortex: vortex_fifo_setwtctrl fail\n"); 918 + pr_err( "Vortex: vortex_fifo_setwtctrl fail\n"); 919 919 break; 920 920 } 921 921 } ··· 970 970 do { 971 971 temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2)); 972 972 if (lifeboat++ > 0xbb8) { 973 - printk(KERN_ERR "Vortex: vortex_fifo_setwtctrl fail (hanging)\n"); 973 + pr_err( "Vortex: vortex_fifo_setwtctrl fail (hanging)\n"); 974 974 break; 975 975 } 976 976 } while ((temp & FIFO_RDONLY)&&(temp & FIFO_VALID)&&(temp != 0xFFFFFFFF)); ··· 1042 1042 for (x = NR_ADB - 1; x >= 0; x--) { 1043 1043 hwwrite(vortex->mmio, addr, (FIFO_U0 | FIFO_U1)); 1044 1044 if (hwread(vortex->mmio, addr) != (FIFO_U0 | FIFO_U1)) 1045 - printk(KERN_ERR "bad adb fifo reset!"); 1045 + pr_err( "bad adb fifo reset!"); 1046 1046 vortex_fifo_clearadbdata(vortex, x, FIFO_SIZE); 1047 1047 addr -= 4; 1048 1048 } ··· 1053 1053 for (x = NR_WT - 1; x >= 0; x--) { 1054 1054 hwwrite(vortex->mmio, addr, FIFO_U0); 1055 1055 if (hwread(vortex->mmio, addr) != FIFO_U0) 1056 - printk(KERN_ERR 1056 + pr_err( 1057 1057 "bad wt fifo reset (0x%08x, 0x%08x)!\n", 1058 1058 addr, hwread(vortex->mmio, addr)); 1059 1059 vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE); ··· 1136 1136 break; 1137 1137 } 1138 1138 /* 1139 - printk(KERN_DEBUG "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n", 1139 + pr_debug( "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n", 1140 1140 dma->cfg0, dma->cfg1); 1141 1141 */ 1142 1142 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0); ··· 1213 1213 if (dma->period_virt >= dma->nr_periods) 1214 1214 dma->period_virt -= dma->nr_periods; 1215 1215 if (delta != 1) 1216 - printk(KERN_INFO "vortex: %d virt=%d, real=%d, delta=%d\n", 1216 + pr_info( "vortex: %d virt=%d, real=%d, delta=%d\n", 1217 1217 adbdma, dma->period_virt, dma->period_real, delta); 1218 1218 1219 1219 return delta; ··· 1482 1482 dma->period_real = page; 1483 1483 1484 1484 if (delta != 1) 1485 - printk(KERN_WARNING "vortex: wt virt = %d, delta = %d\n", 1485 + pr_warn( "vortex: wt virt = %d, delta = %d\n", 1486 1486 dma->period_virt, delta); 1487 1487 1488 1488 return delta; ··· 1667 1667 hwread(vortex->mmio, 1668 1668 VORTEX_ADB_RTBASE + (temp << 2)) & ADB_MASK; 1669 1669 if ((lifeboat++) > ADB_MASK) { 1670 - printk(KERN_ERR 1670 + pr_err( 1671 1671 "vortex_adb_addroutes: unending route! 0x%x\n", 1672 1672 *route); 1673 1673 return; ··· 1703 1703 hwread(vortex->mmio, 1704 1704 VORTEX_ADB_RTBASE + (prev << 2)) & ADB_MASK; 1705 1705 if (((lifeboat++) > ADB_MASK) || (temp == ADB_MASK)) { 1706 - printk(KERN_ERR 1706 + pr_err( 1707 1707 "vortex_adb_delroutes: route not found! 0x%x\n", 1708 1708 route0); 1709 1709 return; ··· 1967 1967 ADB_CODECOUT(0 + 4)); 1968 1968 vortex_connection_mix_adb(vortex, en, 0x11, mixers[3], 1969 1969 ADB_CODECOUT(1 + 4)); 1970 - /* printk(KERN_DEBUG "SDAC detected "); */ 1970 + /* pr_debug( "SDAC detected "); */ 1971 1971 } 1972 1972 #else 1973 1973 // Use plain direct output to codec. ··· 2022 2022 else 2023 2023 vortex->dma_adb[i].resources[restype] |= (1 << i); 2024 2024 /* 2025 - printk(KERN_DEBUG 2025 + pr_debug( 2026 2026 "vortex: ResManager: type %d out %d\n", 2027 2027 restype, i); 2028 2028 */ ··· 2037 2037 if (resmap[restype] & (1 << i)) { 2038 2038 resmap[restype] &= ~(1 << i); 2039 2039 /* 2040 - printk(KERN_DEBUG 2040 + pr_debug( 2041 2041 "vortex: ResManager: type %d in %d\n", 2042 2042 restype, i); 2043 2043 */ ··· 2045 2045 } 2046 2046 } 2047 2047 } 2048 - printk(KERN_ERR "vortex: FATAL: ResManager: resource type %d exhausted.\n", restype); 2048 + pr_err( "vortex: FATAL: ResManager: resource type %d exhausted.\n", restype); 2049 2049 return -ENOMEM; 2050 2050 } 2051 2051 ··· 2173 2173 memset(stream->resources, 0, 2174 2174 sizeof(unsigned char) * 2175 2175 VORTEX_RESOURCE_LAST); 2176 - printk(KERN_ERR "vortex: out of A3D sources. Sorry\n"); 2176 + pr_err( "vortex: out of A3D sources. Sorry\n"); 2177 2177 return -EBUSY; 2178 2178 } 2179 2179 /* (De)Initialize A3D hardware source. */ ··· 2421 2421 hwread(vortex->mmio, VORTEX_IRQ_SOURCE); 2422 2422 // Is at least one IRQ flag set? 2423 2423 if (source == 0) { 2424 - printk(KERN_ERR "vortex: missing irq source\n"); 2424 + pr_err( "vortex: missing irq source\n"); 2425 2425 return IRQ_NONE; 2426 2426 } 2427 2427 ··· 2429 2429 // Attend every interrupt source. 2430 2430 if (unlikely(source & IRQ_ERR_MASK)) { 2431 2431 if (source & IRQ_FATAL) { 2432 - printk(KERN_ERR "vortex: IRQ fatal error\n"); 2432 + pr_err( "vortex: IRQ fatal error\n"); 2433 2433 } 2434 2434 if (source & IRQ_PARITY) { 2435 - printk(KERN_ERR "vortex: IRQ parity error\n"); 2435 + pr_err( "vortex: IRQ parity error\n"); 2436 2436 } 2437 2437 if (source & IRQ_REG) { 2438 - printk(KERN_ERR "vortex: IRQ reg error\n"); 2438 + pr_err( "vortex: IRQ reg error\n"); 2439 2439 } 2440 2440 if (source & IRQ_FIFO) { 2441 - printk(KERN_ERR "vortex: IRQ fifo error\n"); 2441 + pr_err( "vortex: IRQ fifo error\n"); 2442 2442 } 2443 2443 if (source & IRQ_DMA) { 2444 - printk(KERN_ERR "vortex: IRQ dma error\n"); 2444 + pr_err( "vortex: IRQ dma error\n"); 2445 2445 } 2446 2446 handled = 1; 2447 2447 } ··· 2489 2489 } 2490 2490 2491 2491 if (!handled) { 2492 - printk(KERN_ERR "vortex: unknown irq source %x\n", source); 2492 + pr_err( "vortex: unknown irq source %x\n", source); 2493 2493 } 2494 2494 return IRQ_RETVAL(handled); 2495 2495 } ··· 2546 2546 while (!(hwread(card->mmio, VORTEX_CODEC_CTRL) & 0x100)) { 2547 2547 udelay(100); 2548 2548 if (lifeboat++ > POLL_COUNT) { 2549 - printk(KERN_ERR "vortex: ac97 codec stuck busy\n"); 2549 + pr_err( "vortex: ac97 codec stuck busy\n"); 2550 2550 return; 2551 2551 } 2552 2552 } ··· 2572 2572 while (!(hwread(card->mmio, VORTEX_CODEC_CTRL) & 0x100)) { 2573 2573 udelay(100); 2574 2574 if (lifeboat++ > POLL_COUNT) { 2575 - printk(KERN_ERR "vortex: ac97 codec stuck busy\n"); 2575 + pr_err( "vortex: ac97 codec stuck busy\n"); 2576 2576 return 0xffff; 2577 2577 } 2578 2578 } ··· 2586 2586 udelay(100); 2587 2587 data = hwread(card->mmio, VORTEX_CODEC_IO); 2588 2588 if (lifeboat++ > POLL_COUNT) { 2589 - printk(KERN_ERR "vortex: ac97 address never arrived\n"); 2589 + pr_err( "vortex: ac97 address never arrived\n"); 2590 2590 return 0xffff; 2591 2591 } 2592 2592 } while ((data & VORTEX_CODEC_ADDMASK) != ··· 2683 2683 static int vortex_core_init(vortex_t *vortex) 2684 2684 { 2685 2685 2686 - printk(KERN_INFO "Vortex: init.... "); 2686 + pr_info( "Vortex: init.... "); 2687 2687 /* Hardware Init. */ 2688 2688 hwwrite(vortex->mmio, VORTEX_CTRL, 0xffffffff); 2689 2689 msleep(5); ··· 2728 2728 //vortex_enable_timer_int(vortex); 2729 2729 //vortex_disable_timer_int(vortex); 2730 2730 2731 - printk(KERN_INFO "done.\n"); 2731 + pr_info( "done.\n"); 2732 2732 spin_lock_init(&vortex->lock); 2733 2733 2734 2734 return 0; ··· 2737 2737 static int vortex_core_shutdown(vortex_t * vortex) 2738 2738 { 2739 2739 2740 - printk(KERN_INFO "Vortex: shutdown..."); 2740 + pr_info( "Vortex: shutdown..."); 2741 2741 #ifndef CHIP_AU8820 2742 2742 vortex_eq_free(vortex); 2743 2743 vortex_Vort3D_disable(vortex); ··· 2759 2759 msleep(5); 2760 2760 hwwrite(vortex->mmio, VORTEX_IRQ_SOURCE, 0xffff); 2761 2761 2762 - printk(KERN_INFO "done.\n"); 2762 + pr_info( "done.\n"); 2763 2763 return 0; 2764 2764 } 2765 2765 ··· 2793 2793 break; 2794 2794 default: 2795 2795 fmt = 0x8; 2796 - printk(KERN_ERR "vortex: format unsupported %d\n", alsafmt); 2796 + pr_err( "vortex: format unsupported %d\n", alsafmt); 2797 2797 break; 2798 2798 } 2799 2799 return fmt;
+1 -1
sound/pci/au88x0/au88x0_eq.c
··· 845 845 846 846 vortex_Eqlzr_GetAllPeaks(vortex, peaks, &count); 847 847 if (count != 20) { 848 - printk(KERN_ERR "vortex: peak count error 20 != %d \n", count); 848 + pr_err( "vortex: peak count error 20 != %d \n", count); 849 849 return -1; 850 850 } 851 851 for (i = 0; i < 20; i++)
+1 -1
sound/pci/au88x0/au88x0_game.c
··· 98 98 99 99 vortex->gameport = gp = gameport_allocate_port(); 100 100 if (!gp) { 101 - printk(KERN_ERR "vortex: cannot allocate memory for gameport\n"); 101 + pr_err( "vortex: cannot allocate memory for gameport\n"); 102 102 return -ENOMEM; 103 103 } 104 104
+1 -1
sound/pci/au88x0/au88x0_mpu401.c
··· 73 73 /* Check if anything is OK. */ 74 74 temp = hwread(vortex->mmio, VORTEX_MIDI_DATA); 75 75 if (temp != MPU401_ACK /*0xfe */ ) { 76 - printk(KERN_ERR "midi port doesn't acknowledge!\n"); 76 + pr_err( "midi port doesn't acknowledge!\n"); 77 77 return -ENODEV; 78 78 } 79 79 /* Enable MPU401 interrupts. */
+4 -4
sound/pci/au88x0/au88x0_pcm.c
··· 227 227 err = 228 228 snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 229 229 if (err < 0) { 230 - printk(KERN_ERR "Vortex: pcm page alloc failed!\n"); 230 + pr_err( "Vortex: pcm page alloc failed!\n"); 231 231 return err; 232 232 } 233 233 /* 234 - printk(KERN_INFO "Vortex: periods %d, period_bytes %d, channels = %d\n", params_periods(hw_params), 234 + pr_info( "Vortex: periods %d, period_bytes %d, channels = %d\n", params_periods(hw_params), 235 235 params_period_bytes(hw_params), params_channels(hw_params)); 236 236 */ 237 237 spin_lock_irq(&chip->lock); ··· 371 371 } 372 372 #ifndef CHIP_AU8810 373 373 else { 374 - printk(KERN_INFO "vortex: wt start %d\n", dma); 374 + pr_info( "vortex: wt start %d\n", dma); 375 375 vortex_wtdma_startfifo(chip, dma); 376 376 } 377 377 #endif ··· 384 384 vortex_adbdma_stopfifo(chip, dma); 385 385 #ifndef CHIP_AU8810 386 386 else { 387 - printk(KERN_INFO "vortex: wt stop %d\n", dma); 387 + pr_info( "vortex: wt stop %d\n", dma); 388 388 vortex_wtdma_stopfifo(chip, dma); 389 389 } 390 390 #endif
+13 -13
sound/pci/au88x0/au88x0_synth.c
··· 90 90 hwwrite(vortex->mmio, WT_PARM(wt, 2), 0); 91 91 92 92 temp = hwread(vortex->mmio, WT_PARM(wt, 3)); 93 - printk(KERN_DEBUG "vortex: WT PARM3: %x\n", temp); 93 + pr_debug( "vortex: WT PARM3: %x\n", temp); 94 94 //hwwrite(vortex->mmio, WT_PARM(wt, 3), temp); 95 95 96 96 hwwrite(vortex->mmio, WT_DELAY(wt, 0), 0); ··· 98 98 hwwrite(vortex->mmio, WT_DELAY(wt, 2), 0); 99 99 hwwrite(vortex->mmio, WT_DELAY(wt, 3), 0); 100 100 101 - printk(KERN_DEBUG "vortex: WT GMODE: %x\n", hwread(vortex->mmio, WT_GMODE(wt))); 101 + pr_debug( "vortex: WT GMODE: %x\n", hwread(vortex->mmio, WT_GMODE(wt))); 102 102 103 103 hwwrite(vortex->mmio, WT_PARM(wt, 2), 0xffffffff); 104 104 hwwrite(vortex->mmio, WT_PARM(wt, 3), 0xcff1c810); ··· 106 106 voice->parm0 = voice->parm1 = 0xcfb23e2f; 107 107 hwwrite(vortex->mmio, WT_PARM(wt, 0), voice->parm0); 108 108 hwwrite(vortex->mmio, WT_PARM(wt, 1), voice->parm1); 109 - printk(KERN_DEBUG "vortex: WT GMODE 2 : %x\n", hwread(vortex->mmio, WT_GMODE(wt))); 109 + pr_debug( "vortex: WT GMODE 2 : %x\n", hwread(vortex->mmio, WT_GMODE(wt))); 110 110 return 0; 111 111 } 112 112 ··· 196 196 197 197 if ((reg == 5) || ((reg >= 7) && (reg <= 10)) || (reg == 0xc)) { 198 198 if (wt >= (NR_WT / NR_WT_PB)) { 199 - printk 199 + pr_warn 200 200 ("vortex: WT SetReg: bank out of range. reg=0x%x, wt=%d\n", 201 201 reg, wt); 202 202 return 0; 203 203 } 204 204 } else { 205 205 if (wt >= NR_WT) { 206 - printk(KERN_ERR "vortex: WT SetReg: voice out of range\n"); 206 + pr_err( "vortex: WT SetReg: voice out of range\n"); 207 207 return 0; 208 208 } 209 209 } ··· 214 214 /* Voice specific parameters */ 215 215 case 0: /* running */ 216 216 /* 217 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 217 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 218 218 WT_RUN(wt), (int)val); 219 219 */ 220 220 hwwrite(vortex->mmio, WT_RUN(wt), val); 221 221 return 0xc; 222 222 case 1: /* param 0 */ 223 223 /* 224 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 224 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 225 225 WT_PARM(wt,0), (int)val); 226 226 */ 227 227 hwwrite(vortex->mmio, WT_PARM(wt, 0), val); 228 228 return 0xc; 229 229 case 2: /* param 1 */ 230 230 /* 231 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 231 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 232 232 WT_PARM(wt,1), (int)val); 233 233 */ 234 234 hwwrite(vortex->mmio, WT_PARM(wt, 1), val); 235 235 return 0xc; 236 236 case 3: /* param 2 */ 237 237 /* 238 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 238 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 239 239 WT_PARM(wt,2), (int)val); 240 240 */ 241 241 hwwrite(vortex->mmio, WT_PARM(wt, 2), val); 242 242 return 0xc; 243 243 case 4: /* param 3 */ 244 244 /* 245 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 245 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 246 246 WT_PARM(wt,3), (int)val); 247 247 */ 248 248 hwwrite(vortex->mmio, WT_PARM(wt, 3), val); 249 249 return 0xc; 250 250 case 6: /* mute */ 251 251 /* 252 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 252 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 253 253 WT_MUTE(wt), (int)val); 254 254 */ 255 255 hwwrite(vortex->mmio, WT_MUTE(wt), val); ··· 257 257 case 0xb: 258 258 /* delay */ 259 259 /* 260 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", 260 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", 261 261 WT_DELAY(wt,0), (int)val); 262 262 */ 263 263 hwwrite(vortex->mmio, WT_DELAY(wt, 3), val); ··· 285 285 return 0; 286 286 } 287 287 /* 288 - printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val); 288 + pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val); 289 289 */ 290 290 hwwrite(vortex->mmio, ecx, val); 291 291 return 1;