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docs: kvm: convert devices/vcpu.txt to ReST
- Use title markups;
- adjust indentation and add blank lines as needed;
- adjust tables to match ReST accepted formats;
- use :field: markups;
- mark code blocks as such.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
authored by
Mauro Carvalho Chehab
and committed by
Paolo Bonzini
e777a5bd
e9447430
+115
-76
+1
Documentation/virt/kvm/devices/index.rst
+1
Documentation/virt/kvm/devices/index.rst
+114
Documentation/virt/kvm/devices/vcpu.rst
+114
Documentation/virt/kvm/devices/vcpu.rst
···
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.. SPDX-License-Identifier: GPL-2.0
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======================
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Generic vcpu interface
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======================
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The virtual cpu "device" also accepts the ioctls KVM_SET_DEVICE_ATTR,
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KVM_GET_DEVICE_ATTR, and KVM_HAS_DEVICE_ATTR. The interface uses the same struct
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kvm_device_attr as other devices, but targets VCPU-wide settings and controls.
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The groups and attributes per virtual cpu, if any, are architecture specific.
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1. GROUP: KVM_ARM_VCPU_PMU_V3_CTRL
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==================================
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:Architectures: ARM64
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1.1. ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_IRQ
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---------------------------------------
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:Parameters: in kvm_device_attr.addr the address for PMU overflow interrupt is a
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pointer to an int
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Returns:
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======= ========================================================
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-EBUSY The PMU overflow interrupt is already set
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-ENXIO The overflow interrupt not set when attempting to get it
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-ENODEV PMUv3 not supported
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-EINVAL Invalid PMU overflow interrupt number supplied or
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trying to set the IRQ number without using an in-kernel
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irqchip.
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======= ========================================================
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A value describing the PMUv3 (Performance Monitor Unit v3) overflow interrupt
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number for this vcpu. This interrupt could be a PPI or SPI, but the interrupt
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type must be same for each vcpu. As a PPI, the interrupt number is the same for
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all vcpus, while as an SPI it must be a separate number per vcpu.
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1.2 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_INIT
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---------------------------------------
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:Parameters: no additional parameter in kvm_device_attr.addr
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Returns:
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======= ======================================================
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-ENODEV PMUv3 not supported or GIC not initialized
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-ENXIO PMUv3 not properly configured or in-kernel irqchip not
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configured as required prior to calling this attribute
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-EBUSY PMUv3 already initialized
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======= ======================================================
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Request the initialization of the PMUv3. If using the PMUv3 with an in-kernel
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virtual GIC implementation, this must be done after initializing the in-kernel
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irqchip.
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2. GROUP: KVM_ARM_VCPU_TIMER_CTRL
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=================================
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:Architectures: ARM, ARM64
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2.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_VTIMER, KVM_ARM_VCPU_TIMER_IRQ_PTIMER
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-----------------------------------------------------------------------------
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:Parameters: in kvm_device_attr.addr the address for the timer interrupt is a
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pointer to an int
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Returns:
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======= =================================
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-EINVAL Invalid timer interrupt number
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-EBUSY One or more VCPUs has already run
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======= =================================
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A value describing the architected timer interrupt number when connected to an
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in-kernel virtual GIC. These must be a PPI (16 <= intid < 32). Setting the
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attribute overrides the default values (see below).
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============================= ==========================================
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KVM_ARM_VCPU_TIMER_IRQ_VTIMER The EL1 virtual timer intid (default: 27)
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KVM_ARM_VCPU_TIMER_IRQ_PTIMER The EL1 physical timer intid (default: 30)
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============================= ==========================================
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Setting the same PPI for different timers will prevent the VCPUs from running.
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Setting the interrupt number on a VCPU configures all VCPUs created at that
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time to use the number provided for a given timer, overwriting any previously
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configured values on other VCPUs. Userspace should configure the interrupt
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numbers on at least one VCPU after creating all VCPUs and before running any
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VCPUs.
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3. GROUP: KVM_ARM_VCPU_PVTIME_CTRL
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==================================
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:Architectures: ARM64
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3.1 ATTRIBUTE: KVM_ARM_VCPU_PVTIME_IPA
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--------------------------------------
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:Parameters: 64-bit base address
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Returns:
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======= ======================================
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-ENXIO Stolen time not implemented
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-EEXIST Base address already set for this VCPU
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-EINVAL Base address not 64 byte aligned
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======= ======================================
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Specifies the base address of the stolen time structure for this VCPU. The
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base address must be 64 byte aligned and exist within a valid guest memory
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region. See Documentation/virt/kvm/arm/pvtime.txt for more information
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including the layout of the stolen time structure.
-76
Documentation/virt/kvm/devices/vcpu.txt
-76
Documentation/virt/kvm/devices/vcpu.txt
···
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Generic vcpu interface
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====================================
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-
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The virtual cpu "device" also accepts the ioctls KVM_SET_DEVICE_ATTR,
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KVM_GET_DEVICE_ATTR, and KVM_HAS_DEVICE_ATTR. The interface uses the same struct
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-
kvm_device_attr as other devices, but targets VCPU-wide settings and controls.
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-
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The groups and attributes per virtual cpu, if any, are architecture specific.
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1. GROUP: KVM_ARM_VCPU_PMU_V3_CTRL
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Architectures: ARM64
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1.1. ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_IRQ
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Parameters: in kvm_device_attr.addr the address for PMU overflow interrupt is a
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pointer to an int
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Returns: -EBUSY: The PMU overflow interrupt is already set
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-ENXIO: The overflow interrupt not set when attempting to get it
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-ENODEV: PMUv3 not supported
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-EINVAL: Invalid PMU overflow interrupt number supplied or
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trying to set the IRQ number without using an in-kernel
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irqchip.
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A value describing the PMUv3 (Performance Monitor Unit v3) overflow interrupt
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number for this vcpu. This interrupt could be a PPI or SPI, but the interrupt
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type must be same for each vcpu. As a PPI, the interrupt number is the same for
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all vcpus, while as an SPI it must be a separate number per vcpu.
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1.2 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_INIT
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Parameters: no additional parameter in kvm_device_attr.addr
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Returns: -ENODEV: PMUv3 not supported or GIC not initialized
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-ENXIO: PMUv3 not properly configured or in-kernel irqchip not
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configured as required prior to calling this attribute
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-EBUSY: PMUv3 already initialized
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Request the initialization of the PMUv3. If using the PMUv3 with an in-kernel
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virtual GIC implementation, this must be done after initializing the in-kernel
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irqchip.
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2. GROUP: KVM_ARM_VCPU_TIMER_CTRL
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Architectures: ARM,ARM64
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2.1. ATTRIBUTE: KVM_ARM_VCPU_TIMER_IRQ_VTIMER
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2.2. ATTRIBUTE: KVM_ARM_VCPU_TIMER_IRQ_PTIMER
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Parameters: in kvm_device_attr.addr the address for the timer interrupt is a
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pointer to an int
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Returns: -EINVAL: Invalid timer interrupt number
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-EBUSY: One or more VCPUs has already run
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A value describing the architected timer interrupt number when connected to an
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in-kernel virtual GIC. These must be a PPI (16 <= intid < 32). Setting the
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attribute overrides the default values (see below).
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KVM_ARM_VCPU_TIMER_IRQ_VTIMER: The EL1 virtual timer intid (default: 27)
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KVM_ARM_VCPU_TIMER_IRQ_PTIMER: The EL1 physical timer intid (default: 30)
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Setting the same PPI for different timers will prevent the VCPUs from running.
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Setting the interrupt number on a VCPU configures all VCPUs created at that
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time to use the number provided for a given timer, overwriting any previously
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configured values on other VCPUs. Userspace should configure the interrupt
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numbers on at least one VCPU after creating all VCPUs and before running any
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VCPUs.
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3. GROUP: KVM_ARM_VCPU_PVTIME_CTRL
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Architectures: ARM64
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3.1 ATTRIBUTE: KVM_ARM_VCPU_PVTIME_IPA
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Parameters: 64-bit base address
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Returns: -ENXIO: Stolen time not implemented
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-EEXIST: Base address already set for this VCPU
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-EINVAL: Base address not 64 byte aligned
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Specifies the base address of the stolen time structure for this VCPU. The
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base address must be 64 byte aligned and exist within a valid guest memory
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region. See Documentation/virt/kvm/arm/pvtime.txt for more information
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including the layout of the stolen time structure.