Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

KVM: x86: Fold irq_comm.c into irq.c

Drop irq_comm.c, a.k.a. common IRQ APIs, as there has been no non-x86 user
since commit 003f7de62589 ("KVM: ia64: remove") (at the time, irq_comm.c
lived in virt/kvm, not arch/x86/kvm).

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Kai Huang <kai.huang@intel.com>
Link: https://lore.kernel.org/r/20250611213557.294358-19-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

+305 -330
+2 -4
arch/x86/kvm/Makefile
··· 5 5 6 6 include $(srctree)/virt/kvm/Makefile.kvm 7 7 8 - kvm-y += x86.o emulate.o irq.o lapic.o \ 9 - irq_comm.o cpuid.o pmu.o mtrr.o \ 10 - debugfs.o mmu/mmu.o mmu/page_track.o \ 11 - mmu/spte.o 8 + kvm-y += x86.o emulate.o irq.o lapic.o cpuid.o pmu.o mtrr.o \ 9 + debugfs.o mmu/mmu.o mmu/page_track.o mmu/spte.o 12 10 13 11 kvm-$(CONFIG_X86_64) += mmu/tdp_iter.o mmu/tdp_mmu.o 14 12 kvm-$(CONFIG_KVM_IOAPIC) += i8259.o i8254.o ioapic.o
+303 -1
arch/x86/kvm/irq.c
··· 12 12 #include <linux/export.h> 13 13 #include <linux/kvm_host.h> 14 14 15 + #include "hyperv.h" 15 16 #include "ioapic.h" 16 17 #include "irq.h" 17 - #include "i8254.h" 18 + #include "trace.h" 18 19 #include "x86.h" 19 20 #include "xen.h" 20 21 ··· 192 191 bool kvm_arch_irqchip_in_kernel(struct kvm *kvm) 193 192 { 194 193 return irqchip_in_kernel(kvm); 194 + } 195 + 196 + int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, 197 + struct kvm_lapic_irq *irq, struct dest_map *dest_map) 198 + { 199 + int r = -1; 200 + struct kvm_vcpu *vcpu, *lowest = NULL; 201 + unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)]; 202 + unsigned int dest_vcpus = 0; 203 + 204 + if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map)) 205 + return r; 206 + 207 + if (irq->dest_mode == APIC_DEST_PHYSICAL && 208 + irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) { 209 + pr_info("apic: phys broadcast and lowest prio\n"); 210 + irq->delivery_mode = APIC_DM_FIXED; 211 + } 212 + 213 + memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap)); 214 + 215 + kvm_for_each_vcpu(i, vcpu, kvm) { 216 + if (!kvm_apic_present(vcpu)) 217 + continue; 218 + 219 + if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, 220 + irq->dest_id, irq->dest_mode)) 221 + continue; 222 + 223 + if (!kvm_lowest_prio_delivery(irq)) { 224 + if (r < 0) 225 + r = 0; 226 + r += kvm_apic_set_irq(vcpu, irq, dest_map); 227 + } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) { 228 + if (!kvm_vector_hashing_enabled()) { 229 + if (!lowest) 230 + lowest = vcpu; 231 + else if (kvm_apic_compare_prio(vcpu, lowest) < 0) 232 + lowest = vcpu; 233 + } else { 234 + __set_bit(i, dest_vcpu_bitmap); 235 + dest_vcpus++; 236 + } 237 + } 238 + } 239 + 240 + if (dest_vcpus != 0) { 241 + int idx = kvm_vector_to_index(irq->vector, dest_vcpus, 242 + dest_vcpu_bitmap, KVM_MAX_VCPUS); 243 + 244 + lowest = kvm_get_vcpu(kvm, idx); 245 + } 246 + 247 + if (lowest) 248 + r = kvm_apic_set_irq(lowest, irq, dest_map); 249 + 250 + return r; 251 + } 252 + 253 + void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 254 + struct kvm_lapic_irq *irq) 255 + { 256 + struct msi_msg msg = { .address_lo = e->msi.address_lo, 257 + .address_hi = e->msi.address_hi, 258 + .data = e->msi.data }; 259 + 260 + trace_kvm_msi_set_irq(msg.address_lo | (kvm->arch.x2apic_format ? 261 + (u64)msg.address_hi << 32 : 0), msg.data); 262 + 263 + irq->dest_id = x86_msi_msg_get_destid(&msg, kvm->arch.x2apic_format); 264 + irq->vector = msg.arch_data.vector; 265 + irq->dest_mode = kvm_lapic_irq_dest_mode(msg.arch_addr_lo.dest_mode_logical); 266 + irq->trig_mode = msg.arch_data.is_level; 267 + irq->delivery_mode = msg.arch_data.delivery_mode << 8; 268 + irq->msi_redir_hint = msg.arch_addr_lo.redirect_hint; 269 + irq->level = 1; 270 + irq->shorthand = APIC_DEST_NOSHORT; 271 + } 272 + EXPORT_SYMBOL_GPL(kvm_set_msi_irq); 273 + 274 + static inline bool kvm_msi_route_invalid(struct kvm *kvm, 275 + struct kvm_kernel_irq_routing_entry *e) 276 + { 277 + return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff); 278 + } 279 + 280 + int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, 281 + struct kvm *kvm, int irq_source_id, int level, bool line_status) 282 + { 283 + struct kvm_lapic_irq irq; 284 + 285 + if (kvm_msi_route_invalid(kvm, e)) 286 + return -EINVAL; 287 + 288 + if (!level) 289 + return -1; 290 + 291 + kvm_set_msi_irq(kvm, e, &irq); 292 + 293 + return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL); 294 + } 295 + 296 + int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e, 297 + struct kvm *kvm, int irq_source_id, int level, 298 + bool line_status) 299 + { 300 + struct kvm_lapic_irq irq; 301 + int r; 302 + 303 + switch (e->type) { 304 + #ifdef CONFIG_KVM_HYPERV 305 + case KVM_IRQ_ROUTING_HV_SINT: 306 + return kvm_hv_synic_set_irq(e, kvm, irq_source_id, level, 307 + line_status); 308 + #endif 309 + 310 + case KVM_IRQ_ROUTING_MSI: 311 + if (kvm_msi_route_invalid(kvm, e)) 312 + return -EINVAL; 313 + 314 + kvm_set_msi_irq(kvm, e, &irq); 315 + 316 + if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL)) 317 + return r; 318 + break; 319 + 320 + #ifdef CONFIG_KVM_XEN 321 + case KVM_IRQ_ROUTING_XEN_EVTCHN: 322 + if (!level) 323 + return -1; 324 + 325 + return kvm_xen_set_evtchn_fast(&e->xen_evtchn, kvm); 326 + #endif 327 + default: 328 + break; 329 + } 330 + 331 + return -EWOULDBLOCK; 332 + } 333 + 334 + bool kvm_arch_can_set_irq_routing(struct kvm *kvm) 335 + { 336 + return irqchip_in_kernel(kvm); 337 + } 338 + 339 + int kvm_set_routing_entry(struct kvm *kvm, 340 + struct kvm_kernel_irq_routing_entry *e, 341 + const struct kvm_irq_routing_entry *ue) 342 + { 343 + /* We can't check irqchip_in_kernel() here as some callers are 344 + * currently initializing the irqchip. Other callers should therefore 345 + * check kvm_arch_can_set_irq_routing() before calling this function. 346 + */ 347 + switch (ue->type) { 348 + #ifdef CONFIG_KVM_IOAPIC 349 + case KVM_IRQ_ROUTING_IRQCHIP: 350 + if (irqchip_split(kvm)) 351 + return -EINVAL; 352 + e->irqchip.pin = ue->u.irqchip.pin; 353 + switch (ue->u.irqchip.irqchip) { 354 + case KVM_IRQCHIP_PIC_SLAVE: 355 + e->irqchip.pin += PIC_NUM_PINS / 2; 356 + fallthrough; 357 + case KVM_IRQCHIP_PIC_MASTER: 358 + if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2) 359 + return -EINVAL; 360 + e->set = kvm_pic_set_irq; 361 + break; 362 + case KVM_IRQCHIP_IOAPIC: 363 + if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS) 364 + return -EINVAL; 365 + e->set = kvm_ioapic_set_irq; 366 + break; 367 + default: 368 + return -EINVAL; 369 + } 370 + e->irqchip.irqchip = ue->u.irqchip.irqchip; 371 + break; 372 + #endif 373 + case KVM_IRQ_ROUTING_MSI: 374 + e->set = kvm_set_msi; 375 + e->msi.address_lo = ue->u.msi.address_lo; 376 + e->msi.address_hi = ue->u.msi.address_hi; 377 + e->msi.data = ue->u.msi.data; 378 + 379 + if (kvm_msi_route_invalid(kvm, e)) 380 + return -EINVAL; 381 + break; 382 + #ifdef CONFIG_KVM_HYPERV 383 + case KVM_IRQ_ROUTING_HV_SINT: 384 + e->set = kvm_hv_synic_set_irq; 385 + e->hv_sint.vcpu = ue->u.hv_sint.vcpu; 386 + e->hv_sint.sint = ue->u.hv_sint.sint; 387 + break; 388 + #endif 389 + #ifdef CONFIG_KVM_XEN 390 + case KVM_IRQ_ROUTING_XEN_EVTCHN: 391 + return kvm_xen_setup_evtchn(kvm, e, ue); 392 + #endif 393 + default: 394 + return -EINVAL; 395 + } 396 + 397 + return 0; 398 + } 399 + 400 + bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 401 + struct kvm_vcpu **dest_vcpu) 402 + { 403 + int r = 0; 404 + unsigned long i; 405 + struct kvm_vcpu *vcpu; 406 + 407 + if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu)) 408 + return true; 409 + 410 + kvm_for_each_vcpu(i, vcpu, kvm) { 411 + if (!kvm_apic_present(vcpu)) 412 + continue; 413 + 414 + if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand, 415 + irq->dest_id, irq->dest_mode)) 416 + continue; 417 + 418 + if (++r == 2) 419 + return false; 420 + 421 + *dest_vcpu = vcpu; 422 + } 423 + 424 + return r == 1; 425 + } 426 + EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu); 427 + 428 + void kvm_scan_ioapic_irq(struct kvm_vcpu *vcpu, u32 dest_id, u16 dest_mode, 429 + u8 vector, unsigned long *ioapic_handled_vectors) 430 + { 431 + /* 432 + * Intercept EOI if the vCPU is the target of the new IRQ routing, or 433 + * the vCPU has a pending IRQ from the old routing, i.e. if the vCPU 434 + * may receive a level-triggered IRQ in the future, or already received 435 + * level-triggered IRQ. The EOI needs to be intercepted and forwarded 436 + * to I/O APIC emulation so that the IRQ can be de-asserted. 437 + */ 438 + if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, dest_id, dest_mode)) { 439 + __set_bit(vector, ioapic_handled_vectors); 440 + } else if (kvm_apic_pending_eoi(vcpu, vector)) { 441 + __set_bit(vector, ioapic_handled_vectors); 442 + 443 + /* 444 + * Track the highest pending EOI for which the vCPU is NOT the 445 + * target in the new routing. Only the EOI for the IRQ that is 446 + * in-flight (for the old routing) needs to be intercepted, any 447 + * future IRQs that arrive on this vCPU will be coincidental to 448 + * the level-triggered routing and don't need to be intercepted. 449 + */ 450 + if ((int)vector > vcpu->arch.highest_stale_pending_ioapic_eoi) 451 + vcpu->arch.highest_stale_pending_ioapic_eoi = vector; 452 + } 453 + } 454 + 455 + void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, 456 + ulong *ioapic_handled_vectors) 457 + { 458 + struct kvm *kvm = vcpu->kvm; 459 + struct kvm_kernel_irq_routing_entry *entry; 460 + struct kvm_irq_routing_table *table; 461 + u32 i, nr_ioapic_pins; 462 + int idx; 463 + 464 + idx = srcu_read_lock(&kvm->irq_srcu); 465 + table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu); 466 + nr_ioapic_pins = min_t(u32, table->nr_rt_entries, 467 + kvm->arch.nr_reserved_ioapic_pins); 468 + for (i = 0; i < nr_ioapic_pins; ++i) { 469 + hlist_for_each_entry(entry, &table->map[i], link) { 470 + struct kvm_lapic_irq irq; 471 + 472 + if (entry->type != KVM_IRQ_ROUTING_MSI) 473 + continue; 474 + 475 + kvm_set_msi_irq(vcpu->kvm, entry, &irq); 476 + 477 + if (!irq.trig_mode) 478 + continue; 479 + 480 + kvm_scan_ioapic_irq(vcpu, irq.dest_id, irq.dest_mode, 481 + irq.vector, ioapic_handled_vectors); 482 + } 483 + } 484 + srcu_read_unlock(&kvm->irq_srcu, idx); 485 + } 486 + 487 + void kvm_arch_irq_routing_update(struct kvm *kvm) 488 + { 489 + #ifdef CONFIG_KVM_HYPERV 490 + kvm_hv_irq_routing_update(kvm); 491 + #endif 492 + 493 + if (irqchip_split(kvm)) 494 + kvm_make_scan_ioapic_request(kvm); 195 495 } 196 496 197 497 #ifdef CONFIG_KVM_IOAPIC
-325
arch/x86/kvm/irq_comm.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * irq_comm.c: Common API for in kernel interrupt controller 4 - * Copyright (c) 2007, Intel Corporation. 5 - * 6 - * Authors: 7 - * Yaozu (Eddie) Dong <Eddie.dong@intel.com> 8 - * 9 - * Copyright 2010 Red Hat, Inc. and/or its affiliates. 10 - */ 11 - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 - 13 - #include <linux/kvm_host.h> 14 - #include <linux/slab.h> 15 - #include <linux/export.h> 16 - #include <linux/rculist.h> 17 - 18 - #include "hyperv.h" 19 - #include "ioapic.h" 20 - #include "irq.h" 21 - #include "lapic.h" 22 - #include "trace.h" 23 - #include "x86.h" 24 - #include "xen.h" 25 - 26 - int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, 27 - struct kvm_lapic_irq *irq, struct dest_map *dest_map) 28 - { 29 - int r = -1; 30 - struct kvm_vcpu *vcpu, *lowest = NULL; 31 - unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)]; 32 - unsigned int dest_vcpus = 0; 33 - 34 - if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map)) 35 - return r; 36 - 37 - if (irq->dest_mode == APIC_DEST_PHYSICAL && 38 - irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) { 39 - pr_info("apic: phys broadcast and lowest prio\n"); 40 - irq->delivery_mode = APIC_DM_FIXED; 41 - } 42 - 43 - memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap)); 44 - 45 - kvm_for_each_vcpu(i, vcpu, kvm) { 46 - if (!kvm_apic_present(vcpu)) 47 - continue; 48 - 49 - if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, 50 - irq->dest_id, irq->dest_mode)) 51 - continue; 52 - 53 - if (!kvm_lowest_prio_delivery(irq)) { 54 - if (r < 0) 55 - r = 0; 56 - r += kvm_apic_set_irq(vcpu, irq, dest_map); 57 - } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) { 58 - if (!kvm_vector_hashing_enabled()) { 59 - if (!lowest) 60 - lowest = vcpu; 61 - else if (kvm_apic_compare_prio(vcpu, lowest) < 0) 62 - lowest = vcpu; 63 - } else { 64 - __set_bit(i, dest_vcpu_bitmap); 65 - dest_vcpus++; 66 - } 67 - } 68 - } 69 - 70 - if (dest_vcpus != 0) { 71 - int idx = kvm_vector_to_index(irq->vector, dest_vcpus, 72 - dest_vcpu_bitmap, KVM_MAX_VCPUS); 73 - 74 - lowest = kvm_get_vcpu(kvm, idx); 75 - } 76 - 77 - if (lowest) 78 - r = kvm_apic_set_irq(lowest, irq, dest_map); 79 - 80 - return r; 81 - } 82 - 83 - void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 84 - struct kvm_lapic_irq *irq) 85 - { 86 - struct msi_msg msg = { .address_lo = e->msi.address_lo, 87 - .address_hi = e->msi.address_hi, 88 - .data = e->msi.data }; 89 - 90 - trace_kvm_msi_set_irq(msg.address_lo | (kvm->arch.x2apic_format ? 91 - (u64)msg.address_hi << 32 : 0), msg.data); 92 - 93 - irq->dest_id = x86_msi_msg_get_destid(&msg, kvm->arch.x2apic_format); 94 - irq->vector = msg.arch_data.vector; 95 - irq->dest_mode = kvm_lapic_irq_dest_mode(msg.arch_addr_lo.dest_mode_logical); 96 - irq->trig_mode = msg.arch_data.is_level; 97 - irq->delivery_mode = msg.arch_data.delivery_mode << 8; 98 - irq->msi_redir_hint = msg.arch_addr_lo.redirect_hint; 99 - irq->level = 1; 100 - irq->shorthand = APIC_DEST_NOSHORT; 101 - } 102 - EXPORT_SYMBOL_GPL(kvm_set_msi_irq); 103 - 104 - static inline bool kvm_msi_route_invalid(struct kvm *kvm, 105 - struct kvm_kernel_irq_routing_entry *e) 106 - { 107 - return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff); 108 - } 109 - 110 - int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, 111 - struct kvm *kvm, int irq_source_id, int level, bool line_status) 112 - { 113 - struct kvm_lapic_irq irq; 114 - 115 - if (kvm_msi_route_invalid(kvm, e)) 116 - return -EINVAL; 117 - 118 - if (!level) 119 - return -1; 120 - 121 - kvm_set_msi_irq(kvm, e, &irq); 122 - 123 - return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL); 124 - } 125 - 126 - int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e, 127 - struct kvm *kvm, int irq_source_id, int level, 128 - bool line_status) 129 - { 130 - struct kvm_lapic_irq irq; 131 - int r; 132 - 133 - switch (e->type) { 134 - #ifdef CONFIG_KVM_HYPERV 135 - case KVM_IRQ_ROUTING_HV_SINT: 136 - return kvm_hv_synic_set_irq(e, kvm, irq_source_id, level, 137 - line_status); 138 - #endif 139 - 140 - case KVM_IRQ_ROUTING_MSI: 141 - if (kvm_msi_route_invalid(kvm, e)) 142 - return -EINVAL; 143 - 144 - kvm_set_msi_irq(kvm, e, &irq); 145 - 146 - if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL)) 147 - return r; 148 - break; 149 - 150 - #ifdef CONFIG_KVM_XEN 151 - case KVM_IRQ_ROUTING_XEN_EVTCHN: 152 - if (!level) 153 - return -1; 154 - 155 - return kvm_xen_set_evtchn_fast(&e->xen_evtchn, kvm); 156 - #endif 157 - default: 158 - break; 159 - } 160 - 161 - return -EWOULDBLOCK; 162 - } 163 - 164 - bool kvm_arch_can_set_irq_routing(struct kvm *kvm) 165 - { 166 - return irqchip_in_kernel(kvm); 167 - } 168 - 169 - int kvm_set_routing_entry(struct kvm *kvm, 170 - struct kvm_kernel_irq_routing_entry *e, 171 - const struct kvm_irq_routing_entry *ue) 172 - { 173 - /* We can't check irqchip_in_kernel() here as some callers are 174 - * currently initializing the irqchip. Other callers should therefore 175 - * check kvm_arch_can_set_irq_routing() before calling this function. 176 - */ 177 - switch (ue->type) { 178 - #ifdef CONFIG_KVM_IOAPIC 179 - case KVM_IRQ_ROUTING_IRQCHIP: 180 - if (irqchip_split(kvm)) 181 - return -EINVAL; 182 - e->irqchip.pin = ue->u.irqchip.pin; 183 - switch (ue->u.irqchip.irqchip) { 184 - case KVM_IRQCHIP_PIC_SLAVE: 185 - e->irqchip.pin += PIC_NUM_PINS / 2; 186 - fallthrough; 187 - case KVM_IRQCHIP_PIC_MASTER: 188 - if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2) 189 - return -EINVAL; 190 - e->set = kvm_pic_set_irq; 191 - break; 192 - case KVM_IRQCHIP_IOAPIC: 193 - if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS) 194 - return -EINVAL; 195 - e->set = kvm_ioapic_set_irq; 196 - break; 197 - default: 198 - return -EINVAL; 199 - } 200 - e->irqchip.irqchip = ue->u.irqchip.irqchip; 201 - break; 202 - #endif 203 - case KVM_IRQ_ROUTING_MSI: 204 - e->set = kvm_set_msi; 205 - e->msi.address_lo = ue->u.msi.address_lo; 206 - e->msi.address_hi = ue->u.msi.address_hi; 207 - e->msi.data = ue->u.msi.data; 208 - 209 - if (kvm_msi_route_invalid(kvm, e)) 210 - return -EINVAL; 211 - break; 212 - #ifdef CONFIG_KVM_HYPERV 213 - case KVM_IRQ_ROUTING_HV_SINT: 214 - e->set = kvm_hv_synic_set_irq; 215 - e->hv_sint.vcpu = ue->u.hv_sint.vcpu; 216 - e->hv_sint.sint = ue->u.hv_sint.sint; 217 - break; 218 - #endif 219 - #ifdef CONFIG_KVM_XEN 220 - case KVM_IRQ_ROUTING_XEN_EVTCHN: 221 - return kvm_xen_setup_evtchn(kvm, e, ue); 222 - #endif 223 - default: 224 - return -EINVAL; 225 - } 226 - 227 - return 0; 228 - } 229 - 230 - bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 231 - struct kvm_vcpu **dest_vcpu) 232 - { 233 - int r = 0; 234 - unsigned long i; 235 - struct kvm_vcpu *vcpu; 236 - 237 - if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu)) 238 - return true; 239 - 240 - kvm_for_each_vcpu(i, vcpu, kvm) { 241 - if (!kvm_apic_present(vcpu)) 242 - continue; 243 - 244 - if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand, 245 - irq->dest_id, irq->dest_mode)) 246 - continue; 247 - 248 - if (++r == 2) 249 - return false; 250 - 251 - *dest_vcpu = vcpu; 252 - } 253 - 254 - return r == 1; 255 - } 256 - EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu); 257 - 258 - void kvm_scan_ioapic_irq(struct kvm_vcpu *vcpu, u32 dest_id, u16 dest_mode, 259 - u8 vector, unsigned long *ioapic_handled_vectors) 260 - { 261 - /* 262 - * Intercept EOI if the vCPU is the target of the new IRQ routing, or 263 - * the vCPU has a pending IRQ from the old routing, i.e. if the vCPU 264 - * may receive a level-triggered IRQ in the future, or already received 265 - * level-triggered IRQ. The EOI needs to be intercepted and forwarded 266 - * to I/O APIC emulation so that the IRQ can be de-asserted. 267 - */ 268 - if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, dest_id, dest_mode)) { 269 - __set_bit(vector, ioapic_handled_vectors); 270 - } else if (kvm_apic_pending_eoi(vcpu, vector)) { 271 - __set_bit(vector, ioapic_handled_vectors); 272 - 273 - /* 274 - * Track the highest pending EOI for which the vCPU is NOT the 275 - * target in the new routing. Only the EOI for the IRQ that is 276 - * in-flight (for the old routing) needs to be intercepted, any 277 - * future IRQs that arrive on this vCPU will be coincidental to 278 - * the level-triggered routing and don't need to be intercepted. 279 - */ 280 - if ((int)vector > vcpu->arch.highest_stale_pending_ioapic_eoi) 281 - vcpu->arch.highest_stale_pending_ioapic_eoi = vector; 282 - } 283 - } 284 - 285 - void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, 286 - ulong *ioapic_handled_vectors) 287 - { 288 - struct kvm *kvm = vcpu->kvm; 289 - struct kvm_kernel_irq_routing_entry *entry; 290 - struct kvm_irq_routing_table *table; 291 - u32 i, nr_ioapic_pins; 292 - int idx; 293 - 294 - idx = srcu_read_lock(&kvm->irq_srcu); 295 - table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu); 296 - nr_ioapic_pins = min_t(u32, table->nr_rt_entries, 297 - kvm->arch.nr_reserved_ioapic_pins); 298 - for (i = 0; i < nr_ioapic_pins; ++i) { 299 - hlist_for_each_entry(entry, &table->map[i], link) { 300 - struct kvm_lapic_irq irq; 301 - 302 - if (entry->type != KVM_IRQ_ROUTING_MSI) 303 - continue; 304 - 305 - kvm_set_msi_irq(vcpu->kvm, entry, &irq); 306 - 307 - if (!irq.trig_mode) 308 - continue; 309 - 310 - kvm_scan_ioapic_irq(vcpu, irq.dest_id, irq.dest_mode, 311 - irq.vector, ioapic_handled_vectors); 312 - } 313 - } 314 - srcu_read_unlock(&kvm->irq_srcu, idx); 315 - } 316 - 317 - void kvm_arch_irq_routing_update(struct kvm *kvm) 318 - { 319 - #ifdef CONFIG_KVM_HYPERV 320 - kvm_hv_irq_routing_update(kvm); 321 - #endif 322 - 323 - if (irqchip_split(kvm)) 324 - kvm_make_scan_ioapic_request(kvm); 325 - }