Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: Add kiq hdp flush callbacks

Add kiq hdp flush callbacks for gfx ips to support gpu hdp flush when no
ring presents

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Victor Zhao and committed by
Alex Deucher
e71ca1ef 152dca4e

+8 -2
+1
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
··· 9951 9951 .emit_wreg = gfx_v10_0_ring_emit_wreg, 9952 9952 .emit_reg_wait = gfx_v10_0_ring_emit_reg_wait, 9953 9953 .emit_reg_write_reg_wait = gfx_v10_0_ring_emit_reg_write_reg_wait, 9954 + .emit_hdp_flush = gfx_v10_0_ring_emit_hdp_flush, 9954 9955 }; 9955 9956 9956 9957 static void gfx_v10_0_set_ring_funcs(struct amdgpu_device *adev)
+3 -2
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
··· 2438 2438 if (version_minor == 3) 2439 2439 gfx_v11_0_load_rlcp_rlcv_microcode(adev); 2440 2440 } 2441 - 2441 + 2442 2442 return 0; 2443 2443 } 2444 2444 ··· 3886 3886 } 3887 3887 3888 3888 memcpy(fw, fw_data, fw_size); 3889 - 3889 + 3890 3890 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); 3891 3891 amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); 3892 3892 ··· 7318 7318 .emit_wreg = gfx_v11_0_ring_emit_wreg, 7319 7319 .emit_reg_wait = gfx_v11_0_ring_emit_reg_wait, 7320 7320 .emit_reg_write_reg_wait = gfx_v11_0_ring_emit_reg_write_reg_wait, 7321 + .emit_hdp_flush = gfx_v11_0_ring_emit_hdp_flush, 7321 7322 }; 7322 7323 7323 7324 static void gfx_v11_0_set_ring_funcs(struct amdgpu_device *adev)
+1
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
··· 5595 5595 .emit_wreg = gfx_v12_0_ring_emit_wreg, 5596 5596 .emit_reg_wait = gfx_v12_0_ring_emit_reg_wait, 5597 5597 .emit_reg_write_reg_wait = gfx_v12_0_ring_emit_reg_write_reg_wait, 5598 + .emit_hdp_flush = gfx_v12_0_ring_emit_hdp_flush, 5598 5599 }; 5599 5600 5600 5601 static void gfx_v12_0_set_ring_funcs(struct amdgpu_device *adev)
+1
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
··· 6939 6939 .pad_ib = amdgpu_ring_generic_pad_ib, 6940 6940 .emit_rreg = gfx_v8_0_ring_emit_rreg, 6941 6941 .emit_wreg = gfx_v8_0_ring_emit_wreg, 6942 + .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, 6942 6943 }; 6943 6944 6944 6945 static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev)
+1
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
··· 7586 7586 .emit_wreg = gfx_v9_0_ring_emit_wreg, 7587 7587 .emit_reg_wait = gfx_v9_0_ring_emit_reg_wait, 7588 7588 .emit_reg_write_reg_wait = gfx_v9_0_ring_emit_reg_write_reg_wait, 7589 + .emit_hdp_flush = gfx_v9_0_ring_emit_hdp_flush, 7589 7590 }; 7590 7591 7591 7592 static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev)
+1
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
··· 4792 4792 .emit_wreg = gfx_v9_4_3_ring_emit_wreg, 4793 4793 .emit_reg_wait = gfx_v9_4_3_ring_emit_reg_wait, 4794 4794 .emit_reg_write_reg_wait = gfx_v9_4_3_ring_emit_reg_write_reg_wait, 4795 + .emit_hdp_flush = gfx_v9_4_3_ring_emit_hdp_flush, 4795 4796 }; 4796 4797 4797 4798 static void gfx_v9_4_3_set_ring_funcs(struct amdgpu_device *adev)