Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ASoC: rt5670: fix wrong bit def for pll src

The bit allocation for PLL source is 0x80 [13:11] instead of [12:11]

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Bard Liao and committed by
Mark Brown
e71bf055 8005c49d

+6 -6
+6 -6
sound/soc/codecs/rt5670.h
··· 973 973 #define RT5670_SCLK_SRC_MCLK (0x0 << 14) 974 974 #define RT5670_SCLK_SRC_PLL1 (0x1 << 14) 975 975 #define RT5670_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */ 976 - #define RT5670_PLL1_SRC_MASK (0x3 << 12) 977 - #define RT5670_PLL1_SRC_SFT 12 978 - #define RT5670_PLL1_SRC_MCLK (0x0 << 12) 979 - #define RT5670_PLL1_SRC_BCLK1 (0x1 << 12) 980 - #define RT5670_PLL1_SRC_BCLK2 (0x2 << 12) 981 - #define RT5670_PLL1_SRC_BCLK3 (0x3 << 12) 976 + #define RT5670_PLL1_SRC_MASK (0x7 << 11) 977 + #define RT5670_PLL1_SRC_SFT 11 978 + #define RT5670_PLL1_SRC_MCLK (0x0 << 11) 979 + #define RT5670_PLL1_SRC_BCLK1 (0x1 << 11) 980 + #define RT5670_PLL1_SRC_BCLK2 (0x2 << 11) 981 + #define RT5670_PLL1_SRC_BCLK3 (0x3 << 11) 982 982 #define RT5670_PLL1_PD_MASK (0x1 << 3) 983 983 #define RT5670_PLL1_PD_SFT 3 984 984 #define RT5670_PLL1_PD_1 (0x0 << 3)