Merge branch 'fbdev-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6

* 'fbdev-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6:
sisfb: delete osdef.h
sisfb: move the CONFIG warning to sis_main.c
sisfb: replace SiS_SetMemory with memset_io
sisfb: remove InPort/OutPort wrappers
sisfb: use CONFIG_FB_SIS_301/315 instead of SIS301/315H
sisfb: delete redudant #define SIS_LINUX_KERNEL
sisfb: delete dead SIS_XORG_XF86 code
sisfb: delete fallback code for pci_map_rom()
sisfb: delete obsolete PCI ROM bug workaround
fbdev: Update documentation index file.
lxfb: Program panel v/h sync output polarity correctly
fbcmap: integer overflow bug
fbcmap: cleanup white space in fb_alloc_cmap()
MAINTAINERS: Add fbdev patchwork entry, tidy up file patterns.
fbdev: da8xx: punt duplicated FBIO_WAITFORVSYNC define
fbdev: sh_mobile_lcdcfb: fix bug in reconfig()

+284 -1280
+25 -7
Documentation/fb/00-INDEX
··· 4 Geert Uytterhoeven <geert@linux-m68k.org> 5 6 00-INDEX 7 - - this file 8 arkfb.txt 9 - info on the fbdev driver for ARK Logic chips. 10 aty128fb.txt 11 - info on the ATI Rage128 frame buffer driver. 12 cirrusfb.txt 13 - info on the driver for Cirrus Logic chipsets. 14 deferred_io.txt 15 - an introduction to deferred IO. 16 fbcon.txt 17 - intro to and usage guide for the framebuffer console (fbcon). 18 framebuffer.txt 19 - introduction to frame buffer devices. 20 - imacfb.txt 21 - - info on the generic EFI platform driver for Intel based Macs. 22 intel810.txt 23 - documentation for the Intel 810/815 framebuffer driver. 24 intelfb.txt 25 - docs for Intel 830M/845G/852GM/855GM/865G/915G/945G fb driver. 26 internals.txt 27 - quick overview of frame buffer device internals. 28 matroxfb.txt 29 - info on the Matrox framebuffer driver for Alpha, Intel and PPC. 30 modedb.txt 31 - info on the video mode database. 32 - matroxfb.txt 33 - - info on the Matrox frame buffer driver. 34 pvr2fb.txt 35 - info on the PowerVR 2 frame buffer driver. 36 pxafb.txt ··· 47 - info on the fbdev driver for S3 Trio/Virge chips. 48 sa1100fb.txt 49 - information about the driver for the SA-1100 LCD controller. 50 sisfb.txt 51 - info on the framebuffer device driver for various SiS chips. 52 sstfb.txt 53 - info on the frame buffer driver for 3dfx' Voodoo Graphics boards. 54 tgafb.txt 55 - - info on the TGA (DECChip 21030) frame buffer driver 56 vesafb.txt 57 - - info on the VESA frame buffer device 58 vt8623fb.txt 59 - info on the fb driver for the graphics core in VIA VT8623 chipsets.
··· 4 Geert Uytterhoeven <geert@linux-m68k.org> 5 6 00-INDEX 7 + - this file. 8 arkfb.txt 9 - info on the fbdev driver for ARK Logic chips. 10 aty128fb.txt 11 - info on the ATI Rage128 frame buffer driver. 12 cirrusfb.txt 13 - info on the driver for Cirrus Logic chipsets. 14 + cmap_xfbdev.txt 15 + - an introduction to fbdev's cmap structures. 16 deferred_io.txt 17 - an introduction to deferred IO. 18 + efifb.txt 19 + - info on the EFI platform driver for Intel based Apple computers. 20 + ep93xx-fb.txt 21 + - info on the driver for EP93xx LCD controller. 22 fbcon.txt 23 - intro to and usage guide for the framebuffer console (fbcon). 24 framebuffer.txt 25 - introduction to frame buffer devices. 26 + gxfb.txt 27 + - info on the framebuffer driver for AMD Geode GX2 based processors. 28 intel810.txt 29 - documentation for the Intel 810/815 framebuffer driver. 30 intelfb.txt 31 - docs for Intel 830M/845G/852GM/855GM/865G/915G/945G fb driver. 32 internals.txt 33 - quick overview of frame buffer device internals. 34 + lxfb.txt 35 + - info on the framebuffer driver for AMD Geode LX based processors. 36 matroxfb.txt 37 - info on the Matrox framebuffer driver for Alpha, Intel and PPC. 38 + metronomefb.txt 39 + - info on the driver for the Metronome display controller. 40 modedb.txt 41 - info on the video mode database. 42 pvr2fb.txt 43 - info on the PowerVR 2 frame buffer driver. 44 pxafb.txt ··· 39 - info on the fbdev driver for S3 Trio/Virge chips. 40 sa1100fb.txt 41 - information about the driver for the SA-1100 LCD controller. 42 + sh7760fb.txt 43 + - info on the SH7760/SH7763 integrated LCDC Framebuffer driver. 44 sisfb.txt 45 - info on the framebuffer device driver for various SiS chips. 46 sstfb.txt 47 - info on the frame buffer driver for 3dfx' Voodoo Graphics boards. 48 tgafb.txt 49 + - info on the TGA (DECChip 21030) frame buffer driver. 50 + tridentfb.txt 51 + info on the framebuffer driver for some Trident chip based cards. 52 + uvesafb.txt 53 + - info on the userspace VESA (VBE2+ compliant) frame buffer device. 54 vesafb.txt 55 + - info on the VESA frame buffer device. 56 + viafb.modes 57 + - list of modes for VIA Integration Graphic Chip. 58 + viafb.txt 59 + - info on the VIA Integration Graphic Chip console framebuffer driver. 60 vt8623fb.txt 61 - info on the fb driver for the graphics core in VIA VT8623 chipsets.
+3 -1
MAINTAINERS
··· 2444 FRAMEBUFFER LAYER 2445 L: linux-fbdev@vger.kernel.org 2446 W: http://linux-fbdev.sourceforge.net/ 2447 T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6.git 2448 S: Orphan 2449 F: Documentation/fb/ 2450 - F: drivers/video/fb* 2451 F: include/linux/fb.h 2452 2453 FREESCALE DMA DRIVER
··· 2444 FRAMEBUFFER LAYER 2445 L: linux-fbdev@vger.kernel.org 2446 W: http://linux-fbdev.sourceforge.net/ 2447 + Q: http://patchwork.kernel.org/project/linux-fbdev/list/ 2448 T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6.git 2449 S: Orphan 2450 F: Documentation/fb/ 2451 + F: drivers/video/ 2452 + F: include/video/ 2453 F: include/linux/fb.h 2454 2455 FREESCALE DMA DRIVER
+42 -24
drivers/video/fbcmap.c
··· 88 * 89 */ 90 91 - int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp) 92 { 93 - int size = len*sizeof(u16); 94 95 - if (cmap->len != len) { 96 - fb_dealloc_cmap(cmap); 97 - if (!len) 98 - return 0; 99 - if (!(cmap->red = kmalloc(size, GFP_ATOMIC))) 100 - goto fail; 101 - if (!(cmap->green = kmalloc(size, GFP_ATOMIC))) 102 - goto fail; 103 - if (!(cmap->blue = kmalloc(size, GFP_ATOMIC))) 104 - goto fail; 105 - if (transp) { 106 - if (!(cmap->transp = kmalloc(size, GFP_ATOMIC))) 107 goto fail; 108 - } else 109 - cmap->transp = NULL; 110 - } 111 - cmap->start = 0; 112 - cmap->len = len; 113 - fb_copy_cmap(fb_default_cmap(len), cmap); 114 - return 0; 115 116 fail: 117 - fb_dealloc_cmap(cmap); 118 - return -ENOMEM; 119 } 120 121 /** ··· 264 int rc, size = cmap->len * sizeof(u16); 265 struct fb_cmap umap; 266 267 memset(&umap, 0, sizeof(struct fb_cmap)); 268 - rc = fb_alloc_cmap(&umap, cmap->len, cmap->transp != NULL); 269 if (rc) 270 return rc; 271 if (copy_from_user(umap.red, cmap->red, size) ||
··· 88 * 89 */ 90 91 + int fb_alloc_cmap_gfp(struct fb_cmap *cmap, int len, int transp, gfp_t flags) 92 { 93 + int size = len * sizeof(u16); 94 + int ret = -ENOMEM; 95 96 + if (cmap->len != len) { 97 + fb_dealloc_cmap(cmap); 98 + if (!len) 99 + return 0; 100 + 101 + cmap->red = kmalloc(size, flags); 102 + if (!cmap->red) 103 + goto fail; 104 + cmap->green = kmalloc(size, flags); 105 + if (!cmap->green) 106 + goto fail; 107 + cmap->blue = kmalloc(size, flags); 108 + if (!cmap->blue) 109 + goto fail; 110 + if (transp) { 111 + cmap->transp = kmalloc(size, flags); 112 + if (!cmap->transp) 113 + goto fail; 114 + } else { 115 + cmap->transp = NULL; 116 + } 117 + } 118 + cmap->start = 0; 119 + cmap->len = len; 120 + ret = fb_copy_cmap(fb_default_cmap(len), cmap); 121 + if (ret) 122 goto fail; 123 + return 0; 124 125 fail: 126 + fb_dealloc_cmap(cmap); 127 + return ret; 128 + } 129 + 130 + int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp) 131 + { 132 + return fb_alloc_cmap_gfp(cmap, len, transp, GFP_ATOMIC); 133 } 134 135 /** ··· 250 int rc, size = cmap->len * sizeof(u16); 251 struct fb_cmap umap; 252 253 + if (size < 0 || size < cmap->len) 254 + return -E2BIG; 255 + 256 memset(&umap, 0, sizeof(struct fb_cmap)); 257 + rc = fb_alloc_cmap_gfp(&umap, cmap->len, cmap->transp != NULL, 258 + GFP_KERNEL); 259 if (rc) 260 return rc; 261 if (copy_from_user(umap.red, cmap->red, size) ||
+2 -2
drivers/video/geode/lxfb_ops.c
··· 276 write_fp(par, FP_PT1, 0); 277 temp = FP_PT2_SCRC; 278 279 - if (info->var.sync & FB_SYNC_HOR_HIGH_ACT) 280 temp |= FP_PT2_HSP; 281 282 - if (info->var.sync & FB_SYNC_VERT_HIGH_ACT) 283 temp |= FP_PT2_VSP; 284 285 write_fp(par, FP_PT2, temp);
··· 276 write_fp(par, FP_PT1, 0); 277 temp = FP_PT2_SCRC; 278 279 + if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) 280 temp |= FP_PT2_HSP; 281 282 + if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) 283 temp |= FP_PT2_VSP; 284 285 write_fp(par, FP_PT2, temp);
+2 -2
drivers/video/sh_mobile_lcdcfb.c
··· 860 /* Couldn't reconfigure, hopefully, can continue as before */ 861 return; 862 863 - info->fix.line_length = mode2.xres * (ch->cfg.bpp / 8); 864 865 /* 866 * fb_set_var() calls the notifier change internally, only if ··· 868 * user event, we have to call the chain ourselves. 869 */ 870 event.info = info; 871 - event.data = &mode2; 872 fb_notifier_call_chain(evnt, &event); 873 } 874
··· 860 /* Couldn't reconfigure, hopefully, can continue as before */ 861 return; 862 863 + info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8); 864 865 /* 866 * fb_set_var() calls the notifier change internally, only if ··· 868 * user event, we have to call the chain ourselves. 869 */ 870 event.info = info; 871 + event.data = &mode1; 872 fb_notifier_call_chain(evnt, &event); 873 } 874
+49 -636
drivers/video/sis/init.c
··· 62 63 #include "init.h" 64 65 - #ifdef SIS300 66 #include "300vtbl.h" 67 #endif 68 69 - #ifdef SIS315H 70 #include "310vtbl.h" 71 #endif 72 ··· 78 /* POINTER INITIALIZATION */ 79 /*********************************************/ 80 81 - #if defined(SIS300) || defined(SIS315H) 82 static void 83 InitCommonPointer(struct SiS_Private *SiS_Pr) 84 { ··· 160 } 161 #endif 162 163 - #ifdef SIS300 164 static void 165 InitTo300Pointer(struct SiS_Private *SiS_Pr) 166 { ··· 237 } 238 #endif 239 240 - #ifdef SIS315H 241 static void 242 InitTo310Pointer(struct SiS_Private *SiS_Pr) 243 { ··· 321 SiSInitPtr(struct SiS_Private *SiS_Pr) 322 { 323 if(SiS_Pr->ChipType < SIS_315H) { 324 - #ifdef SIS300 325 InitTo300Pointer(SiS_Pr); 326 #else 327 return false; 328 #endif 329 } else { 330 - #ifdef SIS315H 331 InitTo310Pointer(SiS_Pr); 332 #else 333 return false; ··· 340 /* HELPER: Get ModeID */ 341 /*********************************************/ 342 343 - #ifndef SIS_XORG_XF86 344 static 345 - #endif 346 unsigned short 347 SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, 348 int Depth, bool FSTN, int LCDwidth, int LCDheight) ··· 882 void 883 SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data) 884 { 885 - OutPortByte(port, index); 886 - OutPortByte(port + 1, data); 887 } 888 889 void 890 SiS_SetRegByte(SISIOADDRESS port, unsigned short data) 891 { 892 - OutPortByte(port, data); 893 } 894 895 void 896 SiS_SetRegShort(SISIOADDRESS port, unsigned short data) 897 { 898 - OutPortWord(port, data); 899 } 900 901 void 902 SiS_SetRegLong(SISIOADDRESS port, unsigned int data) 903 { 904 - OutPortLong(port, data); 905 } 906 907 unsigned char 908 SiS_GetReg(SISIOADDRESS port, unsigned short index) 909 { 910 - OutPortByte(port, index); 911 - return(InPortByte(port + 1)); 912 } 913 914 unsigned char 915 SiS_GetRegByte(SISIOADDRESS port) 916 { 917 - return(InPortByte(port)); 918 } 919 920 unsigned short 921 SiS_GetRegShort(SISIOADDRESS port) 922 { 923 - return(InPortWord(port)); 924 } 925 926 unsigned int 927 SiS_GetRegLong(SISIOADDRESS port) 928 { 929 - return(InPortLong(port)); 930 } 931 932 void ··· 1087 SiSInitPCIetc(struct SiS_Private *SiS_Pr) 1088 { 1089 switch(SiS_Pr->ChipType) { 1090 - #ifdef SIS300 1091 case SIS_300: 1092 case SIS_540: 1093 case SIS_630: ··· 1106 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A); 1107 break; 1108 #endif 1109 - #ifdef SIS315H 1110 case SIS_315H: 1111 case SIS_315: 1112 case SIS_315PRO: ··· 1150 /* HELPER: SetLVDSetc */ 1151 /*********************************************/ 1152 1153 - #ifdef SIS_LINUX_KERNEL 1154 static 1155 - #endif 1156 void 1157 SiSSetLVDSetc(struct SiS_Private *SiS_Pr) 1158 { ··· 1170 if((temp == 1) || (temp == 2)) return; 1171 1172 switch(SiS_Pr->ChipType) { 1173 - #ifdef SIS300 1174 case SIS_540: 1175 case SIS_630: 1176 case SIS_730: ··· 1184 } 1185 break; 1186 #endif 1187 - #ifdef SIS315H 1188 case SIS_550: 1189 case SIS_650: 1190 case SIS_740: ··· 1416 /* HELPER: GetVBType */ 1417 /*********************************************/ 1418 1419 - #ifdef SIS_LINUX_KERNEL 1420 static 1421 - #endif 1422 void 1423 SiS_GetVBType(struct SiS_Private *SiS_Pr) 1424 { ··· 1481 /* HELPER: Check RAM size */ 1482 /*********************************************/ 1483 1484 - #ifdef SIS_LINUX_KERNEL 1485 static bool 1486 SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 1487 unsigned short ModeIdIndex) ··· 1494 if(AdapterMemSize < memorysize) return false; 1495 return true; 1496 } 1497 - #endif 1498 1499 /*********************************************/ 1500 /* HELPER: Get DRAM type */ 1501 /*********************************************/ 1502 1503 - #ifdef SIS315H 1504 static unsigned char 1505 SiS_Get310DRAMType(struct SiS_Private *SiS_Pr) 1506 { ··· 1566 /* HELPER: ClearBuffer */ 1567 /*********************************************/ 1568 1569 - #ifdef SIS_LINUX_KERNEL 1570 static void 1571 SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo) 1572 { ··· 1578 1579 if(SiS_Pr->SiS_ModeType >= ModeEGA) { 1580 if(ModeNo > 0x13) { 1581 - SiS_SetMemory(memaddr, memsize, 0); 1582 } else { 1583 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr; 1584 for(i = 0; i < 0x4000; i++) writew(0x0000, &pBuffer[i]); ··· 1587 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr; 1588 for(i = 0; i < 0x4000; i++) writew(0x0720, &pBuffer[i]); 1589 } else { 1590 - SiS_SetMemory(memaddr, 0x8000, 0); 1591 } 1592 } 1593 - #endif 1594 1595 /*********************************************/ 1596 /* HELPER: SearchModeID */ ··· 2122 SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F); 2123 } 2124 2125 - #ifdef SIS315H 2126 if(SiS_Pr->ChipType == XGI_20) { 2127 SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1); 2128 if(!(temp = crt1data[5] & 0x1f)) { ··· 2205 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb); 2206 2207 if(SiS_Pr->ChipType >= SIS_315H) { 2208 - #ifdef SIS315H 2209 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01); 2210 if(SiS_Pr->ChipType == XGI_20) { 2211 unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex); ··· 2226 /* FIFO */ 2227 /*********************************************/ 2228 2229 - #ifdef SIS300 2230 void 2231 SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1, 2232 unsigned short *idx2) ··· 2496 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data); 2497 2498 /* Write foreground and background queue */ 2499 - #ifdef SIS_LINUX_KERNEL 2500 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50); 2501 - #else 2502 - templ = pciReadLong(0x00000000, 0x50); 2503 - #endif 2504 2505 if(SiS_Pr->ChipType == SIS_730) { 2506 ··· 2516 2517 } 2518 2519 - #ifdef SIS_LINUX_KERNEL 2520 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ); 2521 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0); 2522 - #else 2523 - pciWriteLong(0x00000000, 0x50, templ); 2524 - templ = pciReadLong(0x00000000, 0xA0); 2525 - #endif 2526 2527 /* GUI grant timer (PCI config 0xA3) */ 2528 if(SiS_Pr->ChipType == SIS_730) { ··· 2533 2534 } 2535 2536 - #ifdef SIS_LINUX_KERNEL 2537 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ); 2538 - #else 2539 - pciWriteLong(0x00000000, 0xA0, templ); 2540 - #endif 2541 } 2542 - #endif /* SIS300 */ 2543 2544 - #ifdef SIS315H 2545 static void 2546 SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex) 2547 { ··· 2589 } 2590 2591 if(SiS_Pr->ChipType < SIS_315H) { 2592 - #ifdef SIS300 2593 if(VCLK > 150) data |= 0x80; 2594 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data); 2595 ··· 2598 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data); 2599 #endif 2600 } else if(SiS_Pr->ChipType < XGI_20) { 2601 - #ifdef SIS315H 2602 if(VCLK >= 166) data |= 0x0c; 2603 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data); 2604 ··· 2607 } 2608 #endif 2609 } else { 2610 - #ifdef SIS315H 2611 if(VCLK >= 200) data |= 0x0c; 2612 if(SiS_Pr->ChipType == XGI_20) data &= ~0x04; 2613 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data); ··· 2652 unsigned short ModeIdIndex, unsigned short RRTI) 2653 { 2654 unsigned short data, infoflag = 0, modeflag, resindex; 2655 - #ifdef SIS315H 2656 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 2657 unsigned short data2, data3; 2658 #endif ··· 2713 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data); 2714 } 2715 2716 - #ifdef SIS315H 2717 if(SiS_Pr->ChipType >= SIS_315H) { 2718 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb); 2719 } ··· 2803 2804 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex); 2805 2806 - #ifdef SIS315H 2807 if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) || 2808 (SiS_Pr->ChipType == XGI_40)) { 2809 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) { ··· 2822 #endif 2823 } 2824 2825 - #ifdef SIS315H 2826 static void 2827 SiS_SetupDualChip(struct SiS_Private *SiS_Pr) 2828 { ··· 2976 SiS_Pr->SiS_SelectCRT2Rate = 0; 2977 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); 2978 2979 - #ifdef SIS_XORG_XF86 2980 - xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n", 2981 - SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo); 2982 - #endif 2983 - 2984 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) { 2985 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 2986 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; ··· 3000 } 3001 3002 switch(SiS_Pr->ChipType) { 3003 - #ifdef SIS300 3004 case SIS_300: 3005 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex); 3006 break; ··· 3011 break; 3012 #endif 3013 default: 3014 - #ifdef SIS315H 3015 if(SiS_Pr->ChipType == XGI_20) { 3016 unsigned char sr2b = 0, sr2c = 0; 3017 switch(ModeNo) { ··· 3034 3035 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 3036 3037 - #ifdef SIS315H 3038 if(SiS_Pr->ChipType == XGI_40) { 3039 SiS_SetupDualChip(SiS_Pr); 3040 } ··· 3042 3043 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex); 3044 3045 - #ifdef SIS_LINUX_KERNEL 3046 if(SiS_Pr->SiS_flag_clearbuffer) { 3047 SiS_ClearBuffer(SiS_Pr, ModeNo); 3048 } 3049 - #endif 3050 3051 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) { 3052 SiS_WaitRetrace1(SiS_Pr); ··· 3074 static void 3075 SiS_ResetVB(struct SiS_Private *SiS_Pr) 3076 { 3077 - #ifdef SIS315H 3078 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 3079 unsigned short temp; 3080 ··· 3109 * which locks CRT2 in some way to CRT1 timing. Disable 3110 * this here. 3111 */ 3112 - #ifdef SIS315H 3113 if((IS_SIS651) || (IS_SISM650) || 3114 SiS_Pr->ChipType == SIS_340 || 3115 SiS_Pr->ChipType == XGI_40) { ··· 3130 static void 3131 SiS_Handle760(struct SiS_Private *SiS_Pr) 3132 { 3133 - #ifdef SIS315H 3134 unsigned int somebase; 3135 unsigned char temp1, temp2, temp3; 3136 ··· 3140 (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) ) 3141 return; 3142 3143 - #ifdef SIS_LINUX_KERNEL 3144 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74); 3145 - #else 3146 - somebase = pciReadWord(0x00001000, 0x74); 3147 - #endif 3148 somebase &= 0xffff; 3149 3150 if(somebase == 0) return; ··· 3156 temp2 = 0x0b; 3157 } 3158 3159 - #ifdef SIS_LINUX_KERNEL 3160 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1); 3161 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2); 3162 - #else 3163 - pciWriteByte(0x00000000, 0x7e, temp1); 3164 - pciWriteByte(0x00000000, 0x8d, temp2); 3165 - #endif 3166 3167 SiS_SetRegByte((somebase + 0x85), temp3); 3168 #endif 3169 } 3170 3171 /*********************************************/ 3172 - /* X.org/XFree86: SET SCREEN PITCH */ 3173 - /*********************************************/ 3174 - 3175 - #ifdef SIS_XORG_XF86 3176 - static void 3177 - SiS_SetPitchCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3178 - { 3179 - SISPtr pSiS = SISPTR(pScrn); 3180 - unsigned short HDisplay = pSiS->scrnPitch >> 3; 3181 - 3182 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF)); 3183 - SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay >> 8)); 3184 - } 3185 - 3186 - static void 3187 - SiS_SetPitchCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3188 - { 3189 - SISPtr pSiS = SISPTR(pScrn); 3190 - unsigned short HDisplay = pSiS->scrnPitch2 >> 3; 3191 - 3192 - /* Unlock CRT2 */ 3193 - if(pSiS->VGAEngine == SIS_315_VGA) 3194 - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01); 3195 - else 3196 - SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01); 3197 - 3198 - SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF)); 3199 - SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8)); 3200 - } 3201 - 3202 - static void 3203 - SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3204 - { 3205 - SISPtr pSiS = SISPTR(pScrn); 3206 - bool isslavemode = false; 3207 - 3208 - if( (pSiS->VBFlags2 & VB2_VIDEOBRIDGE) && 3209 - ( ((pSiS->VGAEngine == SIS_300_VGA) && 3210 - (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) || 3211 - ((pSiS->VGAEngine == SIS_315_VGA) && 3212 - (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) { 3213 - isslavemode = true; 3214 - } 3215 - 3216 - /* We need to set pitch for CRT1 if bridge is in slave mode, too */ 3217 - if((pSiS->VBFlags & DISPTYPE_DISP1) || (isslavemode)) { 3218 - SiS_SetPitchCRT1(SiS_Pr, pScrn); 3219 - } 3220 - /* We must not set the pitch for CRT2 if bridge is in slave mode */ 3221 - if((pSiS->VBFlags & DISPTYPE_DISP2) && (!isslavemode)) { 3222 - SiS_SetPitchCRT2(SiS_Pr, pScrn); 3223 - } 3224 - } 3225 - #endif 3226 - 3227 - /*********************************************/ 3228 /* SiSSetMode() */ 3229 /*********************************************/ 3230 3231 - #ifdef SIS_XORG_XF86 3232 - /* We need pScrn for setting the pitch correctly */ 3233 - bool 3234 - SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, bool dosetpitch) 3235 - #else 3236 bool 3237 SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) 3238 - #endif 3239 { 3240 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; 3241 unsigned short RealModeNo, ModeIdIndex; 3242 unsigned char backupreg = 0; 3243 - #ifdef SIS_LINUX_KERNEL 3244 unsigned short KeepLockReg; 3245 3246 SiS_Pr->UseCustomMode = false; 3247 SiS_Pr->CRT1UsesCustomMode = false; 3248 - #endif 3249 3250 SiS_Pr->SiS_flag_clearbuffer = 0; 3251 3252 if(SiS_Pr->UseCustomMode) { 3253 ModeNo = 0xfe; 3254 } else { 3255 - #ifdef SIS_LINUX_KERNEL 3256 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1; 3257 - #endif 3258 ModeNo &= 0x7f; 3259 } 3260 ··· 3196 SiS_GetSysFlags(SiS_Pr); 3197 3198 SiS_Pr->SiS_VGAINFO = 0x11; 3199 - #if defined(SIS_XORG_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__)) 3200 - if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3201 - #endif 3202 3203 - #ifdef SIS_LINUX_KERNEL 3204 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05); 3205 - #endif 3206 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3207 3208 SiSInitPCIetc(SiS_Pr); ··· 3234 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex); 3235 SiS_SetLowModeTest(SiS_Pr, ModeNo); 3236 3237 - #ifdef SIS_LINUX_KERNEL 3238 /* Check memory size (kernel framebuffer driver only) */ 3239 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) { 3240 return false; 3241 } 3242 - #endif 3243 3244 SiS_OpenCRTC(SiS_Pr); 3245 ··· 3272 SiS_DisplayOn(SiS_Pr); 3273 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3274 3275 - #ifdef SIS315H 3276 if(SiS_Pr->ChipType >= SIS_315H) { 3277 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3278 if(!(SiS_IsDualEdge(SiS_Pr))) { ··· 3284 3285 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 3286 if(SiS_Pr->ChipType >= SIS_315H) { 3287 - #ifdef SIS315H 3288 if(!SiS_Pr->SiS_ROMNew) { 3289 if(SiS_IsVAMode(SiS_Pr)) { 3290 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); ··· 3312 } 3313 } 3314 3315 - #ifdef SIS_XORG_XF86 3316 - if(pScrn) { 3317 - /* SetPitch: Adapt to virtual size & position */ 3318 - if((ModeNo > 0x13) && (dosetpitch)) { 3319 - SiS_SetPitch(SiS_Pr, pScrn); 3320 - } 3321 - 3322 - /* Backup/Set ModeNo in BIOS scratch area */ 3323 - SiS_GetSetModeID(pScrn, ModeNo); 3324 - } 3325 - #endif 3326 - 3327 SiS_CloseCRTC(SiS_Pr); 3328 3329 SiS_Handle760(SiS_Pr); 3330 3331 - #ifdef SIS_LINUX_KERNEL 3332 /* We never lock registers in XF86 */ 3333 if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); 3334 - #endif 3335 3336 return true; 3337 } 3338 - 3339 - /*********************************************/ 3340 - /* X.org/XFree86: SiSBIOSSetMode() */ 3341 - /* for non-Dual-Head mode */ 3342 - /*********************************************/ 3343 - 3344 - #ifdef SIS_XORG_XF86 3345 - bool 3346 - SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, 3347 - DisplayModePtr mode, bool IsCustom) 3348 - { 3349 - SISPtr pSiS = SISPTR(pScrn); 3350 - unsigned short ModeNo = 0; 3351 - 3352 - SiS_Pr->UseCustomMode = false; 3353 - 3354 - if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3355 - 3356 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n", 3357 - SiS_Pr->CHDisplay, 3358 - (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 : 3359 - (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 : 3360 - SiS_Pr->CVDisplay))); 3361 - 3362 - } else { 3363 - 3364 - /* Don't need vbflags here; checks done earlier */ 3365 - ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); 3366 - if(!ModeNo) return false; 3367 - 3368 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo); 3369 - 3370 - } 3371 - 3372 - return(SiSSetMode(SiS_Pr, pScrn, ModeNo, true)); 3373 - } 3374 - 3375 - /*********************************************/ 3376 - /* X.org/XFree86: SiSBIOSSetModeCRT2() */ 3377 - /* for Dual-Head modes */ 3378 - /*********************************************/ 3379 - 3380 - bool 3381 - SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, 3382 - DisplayModePtr mode, bool IsCustom) 3383 - { 3384 - SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; 3385 - SISPtr pSiS = SISPTR(pScrn); 3386 - #ifdef SISDUALHEAD 3387 - SISEntPtr pSiSEnt = pSiS->entityPrivate; 3388 - #endif 3389 - unsigned short ModeIdIndex; 3390 - unsigned short ModeNo = 0; 3391 - unsigned char backupreg = 0; 3392 - 3393 - SiS_Pr->UseCustomMode = false; 3394 - 3395 - /* Remember: Custom modes for CRT2 are ONLY supported 3396 - * -) on the 30x/B/C, and 3397 - * -) if CRT2 is LCD or VGA, or CRT1 is LCDA 3398 - */ 3399 - 3400 - if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3401 - 3402 - ModeNo = 0xfe; 3403 - 3404 - } else { 3405 - 3406 - ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); 3407 - if(!ModeNo) return false; 3408 - 3409 - } 3410 - 3411 - SiSRegInit(SiS_Pr, BaseAddr); 3412 - SiSInitPtr(SiS_Pr); 3413 - SiS_GetSysFlags(SiS_Pr); 3414 - #if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__) 3415 - SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3416 - #else 3417 - SiS_Pr->SiS_VGAINFO = 0x11; 3418 - #endif 3419 - 3420 - SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3421 - 3422 - SiSInitPCIetc(SiS_Pr); 3423 - SiSSetLVDSetc(SiS_Pr); 3424 - SiSDetermineROMUsage(SiS_Pr); 3425 - 3426 - /* Save mode info so we can set it from within SetMode for CRT1 */ 3427 - #ifdef SISDUALHEAD 3428 - if(pSiS->DualHeadMode) { 3429 - pSiSEnt->CRT2ModeNo = ModeNo; 3430 - pSiSEnt->CRT2DMode = mode; 3431 - pSiSEnt->CRT2IsCustom = IsCustom; 3432 - pSiSEnt->CRT2CR30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 3433 - pSiSEnt->CRT2CR31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31); 3434 - pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3435 - pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3436 - #if 0 3437 - /* We can't set CRT2 mode before CRT1 mode is set - says who...? */ 3438 - if(pSiSEnt->CRT1ModeNo == -1) { 3439 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3440 - "Setting CRT2 mode delayed until after setting CRT1 mode\n"); 3441 - return true; 3442 - } 3443 - #endif 3444 - pSiSEnt->CRT2ModeSet = true; 3445 - } 3446 - #endif 3447 - 3448 - if(SiS_Pr->UseCustomMode) { 3449 - 3450 - unsigned short temptemp = SiS_Pr->CVDisplay; 3451 - 3452 - if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1; 3453 - else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1; 3454 - 3455 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3456 - "Setting custom mode %dx%d on CRT2\n", 3457 - SiS_Pr->CHDisplay, temptemp); 3458 - 3459 - } else { 3460 - 3461 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3462 - "Setting standard mode 0x%x on CRT2\n", ModeNo); 3463 - 3464 - } 3465 - 3466 - SiS_UnLockCRT2(SiS_Pr); 3467 - 3468 - if(!SiS_Pr->UseCustomMode) { 3469 - if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; 3470 - } else { 3471 - ModeIdIndex = 0; 3472 - } 3473 - 3474 - SiS_GetVBType(SiS_Pr); 3475 - 3476 - SiS_InitVB(SiS_Pr); 3477 - if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 3478 - if(SiS_Pr->ChipType >= SIS_315H) { 3479 - SiS_ResetVB(SiS_Pr); 3480 - SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10); 3481 - SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c); 3482 - backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3483 - } else { 3484 - backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3485 - } 3486 - } 3487 - 3488 - /* Get VB information (connectors, connected devices) */ 3489 - if(!SiS_Pr->UseCustomMode) { 3490 - SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 1); 3491 - } else { 3492 - /* If this is a custom mode, we don't check the modeflag for CRT2Mode */ 3493 - SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0); 3494 - } 3495 - SiS_SetYPbPr(SiS_Pr); 3496 - SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex); 3497 - SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex); 3498 - SiS_SetLowModeTest(SiS_Pr, ModeNo); 3499 - 3500 - SiS_ResetSegmentRegisters(SiS_Pr); 3501 - 3502 - /* Set mode on CRT2 */ 3503 - if( (SiS_Pr->SiS_VBType & VB_SISVB) || 3504 - (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 3505 - (SiS_Pr->SiS_IF_DEF_CH70xx != 0) || 3506 - (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) { 3507 - SiS_SetCRT2Group(SiS_Pr, ModeNo); 3508 - } 3509 - 3510 - SiS_StrangeStuff(SiS_Pr); 3511 - 3512 - SiS_DisplayOn(SiS_Pr); 3513 - SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3514 - 3515 - if(SiS_Pr->ChipType >= SIS_315H) { 3516 - if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3517 - if(!(SiS_IsDualEdge(SiS_Pr))) { 3518 - SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 3519 - } 3520 - } 3521 - } 3522 - 3523 - if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 3524 - if(SiS_Pr->ChipType >= SIS_315H) { 3525 - if(!SiS_Pr->SiS_ROMNew) { 3526 - if(SiS_IsVAMode(SiS_Pr)) { 3527 - SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 3528 - } else { 3529 - SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE); 3530 - } 3531 - } 3532 - 3533 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg); 3534 - 3535 - if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) { 3536 - SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); 3537 - } 3538 - } else if((SiS_Pr->ChipType == SIS_630) || 3539 - (SiS_Pr->ChipType == SIS_730)) { 3540 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3541 - } 3542 - } 3543 - 3544 - /* SetPitch: Adapt to virtual size & position */ 3545 - SiS_SetPitchCRT2(SiS_Pr, pScrn); 3546 - 3547 - SiS_Handle760(SiS_Pr); 3548 - 3549 - return true; 3550 - } 3551 - 3552 - /*********************************************/ 3553 - /* X.org/XFree86: SiSBIOSSetModeCRT1() */ 3554 - /* for Dual-Head modes */ 3555 - /*********************************************/ 3556 - 3557 - bool 3558 - SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, 3559 - DisplayModePtr mode, bool IsCustom) 3560 - { 3561 - SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; 3562 - SISPtr pSiS = SISPTR(pScrn); 3563 - unsigned short ModeIdIndex, ModeNo = 0; 3564 - unsigned char backupreg = 0; 3565 - #ifdef SISDUALHEAD 3566 - SISEntPtr pSiSEnt = pSiS->entityPrivate; 3567 - unsigned char backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0; 3568 - bool backupcustom; 3569 - #endif 3570 - 3571 - SiS_Pr->UseCustomMode = false; 3572 - 3573 - if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3574 - 3575 - unsigned short temptemp = SiS_Pr->CVDisplay; 3576 - 3577 - if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1; 3578 - else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1; 3579 - 3580 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3581 - "Setting custom mode %dx%d on CRT1\n", 3582 - SiS_Pr->CHDisplay, temptemp); 3583 - ModeNo = 0xfe; 3584 - 3585 - } else { 3586 - 3587 - ModeNo = SiS_GetModeNumber(pScrn, mode, 0); /* don't give VBFlags */ 3588 - if(!ModeNo) return false; 3589 - 3590 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3591 - "Setting standard mode 0x%x on CRT1\n", ModeNo); 3592 - } 3593 - 3594 - SiSInitPtr(SiS_Pr); 3595 - SiSRegInit(SiS_Pr, BaseAddr); 3596 - SiS_GetSysFlags(SiS_Pr); 3597 - #if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__) 3598 - SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3599 - #else 3600 - SiS_Pr->SiS_VGAINFO = 0x11; 3601 - #endif 3602 - 3603 - SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3604 - 3605 - SiSInitPCIetc(SiS_Pr); 3606 - SiSSetLVDSetc(SiS_Pr); 3607 - SiSDetermineROMUsage(SiS_Pr); 3608 - 3609 - SiS_UnLockCRT2(SiS_Pr); 3610 - 3611 - if(!SiS_Pr->UseCustomMode) { 3612 - if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; 3613 - } else { 3614 - ModeIdIndex = 0; 3615 - } 3616 - 3617 - /* Determine VBType */ 3618 - SiS_GetVBType(SiS_Pr); 3619 - 3620 - SiS_InitVB(SiS_Pr); 3621 - if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 3622 - if(SiS_Pr->ChipType >= SIS_315H) { 3623 - backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3624 - } else { 3625 - backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3626 - } 3627 - } 3628 - 3629 - /* Get VB information (connectors, connected devices) */ 3630 - /* (We don't care if the current mode is a CRT2 mode) */ 3631 - SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0); 3632 - SiS_SetYPbPr(SiS_Pr); 3633 - SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex); 3634 - SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex); 3635 - SiS_SetLowModeTest(SiS_Pr, ModeNo); 3636 - 3637 - SiS_OpenCRTC(SiS_Pr); 3638 - 3639 - /* Set mode on CRT1 */ 3640 - SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex); 3641 - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3642 - SiS_SetCRT2Group(SiS_Pr, ModeNo); 3643 - } 3644 - 3645 - /* SetPitch: Adapt to virtual size & position */ 3646 - SiS_SetPitchCRT1(SiS_Pr, pScrn); 3647 - 3648 - SiS_HandleCRT1(SiS_Pr); 3649 - 3650 - SiS_StrangeStuff(SiS_Pr); 3651 - 3652 - SiS_CloseCRTC(SiS_Pr); 3653 - 3654 - #ifdef SISDUALHEAD 3655 - if(pSiS->DualHeadMode) { 3656 - pSiSEnt->CRT1ModeNo = ModeNo; 3657 - pSiSEnt->CRT1DMode = mode; 3658 - } 3659 - #endif 3660 - 3661 - if(SiS_Pr->UseCustomMode) { 3662 - SiS_Pr->CRT1UsesCustomMode = true; 3663 - SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; 3664 - SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; 3665 - } else { 3666 - SiS_Pr->CRT1UsesCustomMode = false; 3667 - } 3668 - 3669 - /* Reset CRT2 if changing mode on CRT1 */ 3670 - #ifdef SISDUALHEAD 3671 - if(pSiS->DualHeadMode) { 3672 - if(pSiSEnt->CRT2ModeNo != -1) { 3673 - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3674 - "(Re-)Setting mode for CRT2\n"); 3675 - backupcustom = SiS_Pr->UseCustomMode; 3676 - backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 3677 - backupcr31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31); 3678 - backupcr35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3679 - backupcr38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3680 - if(SiS_Pr->SiS_VBType & VB_SISVB) { 3681 - /* Backup LUT-enable */ 3682 - if(pSiSEnt->CRT2ModeSet) { 3683 - backupp40d = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0d) & 0x08; 3684 - } 3685 - } 3686 - if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3687 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,pSiSEnt->CRT2CR30); 3688 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,pSiSEnt->CRT2CR31); 3689 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35); 3690 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38); 3691 - } 3692 - 3693 - SiSBIOSSetModeCRT2(SiS_Pr, pSiSEnt->pScrn_1, 3694 - pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom); 3695 - 3696 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30); 3697 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31); 3698 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35); 3699 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38); 3700 - if(SiS_Pr->SiS_VBType & VB_SISVB) { 3701 - SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0d, ~0x08, backupp40d); 3702 - } 3703 - SiS_Pr->UseCustomMode = backupcustom; 3704 - } 3705 - } 3706 - #endif 3707 - 3708 - /* Warning: From here, the custom mode entries in SiS_Pr are 3709 - * possibly overwritten 3710 - */ 3711 - 3712 - SiS_DisplayOn(SiS_Pr); 3713 - SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3714 - 3715 - if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 3716 - if(SiS_Pr->ChipType >= SIS_315H) { 3717 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg); 3718 - } else if((SiS_Pr->ChipType == SIS_630) || 3719 - (SiS_Pr->ChipType == SIS_730)) { 3720 - SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3721 - } 3722 - } 3723 - 3724 - SiS_Handle760(SiS_Pr); 3725 - 3726 - /* Backup/Set ModeNo in BIOS scratch area */ 3727 - SiS_GetSetModeID(pScrn,ModeNo); 3728 - 3729 - return true; 3730 - } 3731 - #endif /* Linux_XF86 */ 3732 3733 #ifndef GETBITSTR 3734 #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) ··· 3407 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE; 3408 3409 if(SiS_Pr->ChipType < SIS_315H) { 3410 - #ifdef SIS300 3411 tempbx = SiS_Pr->SiS_VGAHT; 3412 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3413 tempbx = SiS_Pr->PanelHT; ··· 3416 remaining = tempbx % 8; 3417 #endif 3418 } else { 3419 - #ifdef SIS315H 3420 /* OK for LCDA, LVDS */ 3421 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes; 3422 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */ ··· 3430 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx; 3431 3432 if(SiS_Pr->ChipType < SIS_315H) { 3433 - #ifdef SIS300 3434 if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) { 3435 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1); 3436 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE; ··· 3462 } 3463 #endif 3464 } else { 3465 - #ifdef SIS315H 3466 tempax = VGAHDE; 3467 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3468 tempbx = SiS_Pr->PanelXRes; ··· 3481 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3482 tempax = SiS_Pr->PanelYRes; 3483 } else if(SiS_Pr->ChipType < SIS_315H) { 3484 - #ifdef SIS300 3485 /* Stupid hack for 640x400/320x200 */ 3486 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 3487 if((tempax + tempbx) == 438) tempbx += 16; ··· 3534 if(modeflag & DoubleScanMode) tempax |= 0x80; 3535 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax); 3536 3537 - #ifdef SIS_XORG_XF86 3538 - #ifdef TWDEBUG 3539 - xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n", 3540 - SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal, 3541 - SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal, 3542 - SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd); 3543 - xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 3544 - SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1], 3545 - SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3], 3546 - SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5], 3547 - SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]); 3548 - xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 3549 - SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9], 3550 - SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11], 3551 - SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13], 3552 - SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]); 3553 - xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]); 3554 - #endif 3555 - #endif 3556 } 3557 3558 void 3559 SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, 3560 int xres, int yres, 3561 - #ifdef SIS_XORG_XF86 3562 - DisplayModePtr current 3563 - #endif 3564 - #ifdef SIS_LINUX_KERNEL 3565 struct fb_var_screeninfo *var, bool writeres 3566 - #endif 3567 ) 3568 { 3569 unsigned short HRE, HBE, HRS, HBS, HDE, HT; ··· 3583 3584 D = B - F - C; 3585 3586 - #ifdef SIS_XORG_XF86 3587 - current->HDisplay = (E * 8); 3588 - current->HSyncStart = (E * 8) + (F * 8); 3589 - current->HSyncEnd = (E * 8) + (F * 8) + (C * 8); 3590 - current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8); 3591 - #ifdef TWDEBUG 3592 - xf86DrvMsg(0, X_INFO, 3593 - "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n", 3594 - A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE); 3595 - #else 3596 - (void)VBS; (void)HBS; (void)A; 3597 - #endif 3598 - #endif 3599 - #ifdef SIS_LINUX_KERNEL 3600 if(writeres) var->xres = xres = E * 8; 3601 var->left_margin = D * 8; 3602 var->right_margin = F * 8; 3603 var->hsync_len = C * 8; 3604 - #endif 3605 3606 /* Vertical */ 3607 sr_data = crdata[13]; ··· 3633 3634 D = B - F - C; 3635 3636 - #ifdef SIS_XORG_XF86 3637 - current->VDisplay = VDE + 1; 3638 - current->VSyncStart = VRS + 1; 3639 - current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1; 3640 - if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32; 3641 - current->VTotal = E + D + C + F; 3642 - #if 0 3643 - current->VDisplay = E; 3644 - current->VSyncStart = E + D; 3645 - current->VSyncEnd = E + D + C; 3646 - current->VTotal = E + D + C + F; 3647 - #endif 3648 - #ifdef TWDEBUG 3649 - xf86DrvMsg(0, X_INFO, 3650 - "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n", 3651 - A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE); 3652 - #endif 3653 - #endif 3654 - #ifdef SIS_LINUX_KERNEL 3655 if(writeres) var->yres = yres = E; 3656 var->upper_margin = D; 3657 var->lower_margin = F; 3658 var->vsync_len = C; 3659 - #endif 3660 3661 if((xres == 320) && ((yres == 200) || (yres == 240))) { 3662 /* Terrible hack, but correct CRTC data for ··· 3645 * a negative D. The CRT controller does not 3646 * seem to like correcting HRE to 50) 3647 */ 3648 - #ifdef SIS_XORG_XF86 3649 - current->HDisplay = 320; 3650 - current->HSyncStart = 328; 3651 - current->HSyncEnd = 376; 3652 - current->HTotal = 400; 3653 - #endif 3654 - #ifdef SIS_LINUX_KERNEL 3655 var->left_margin = (400 - 376); 3656 var->right_margin = (328 - 320); 3657 var->hsync_len = (376 - 328); 3658 - #endif 3659 3660 } 3661
··· 62 63 #include "init.h" 64 65 + #ifdef CONFIG_FB_SIS_300 66 #include "300vtbl.h" 67 #endif 68 69 + #ifdef CONFIG_FB_SIS_315 70 #include "310vtbl.h" 71 #endif 72 ··· 78 /* POINTER INITIALIZATION */ 79 /*********************************************/ 80 81 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 82 static void 83 InitCommonPointer(struct SiS_Private *SiS_Pr) 84 { ··· 160 } 161 #endif 162 163 + #ifdef CONFIG_FB_SIS_300 164 static void 165 InitTo300Pointer(struct SiS_Private *SiS_Pr) 166 { ··· 237 } 238 #endif 239 240 + #ifdef CONFIG_FB_SIS_315 241 static void 242 InitTo310Pointer(struct SiS_Private *SiS_Pr) 243 { ··· 321 SiSInitPtr(struct SiS_Private *SiS_Pr) 322 { 323 if(SiS_Pr->ChipType < SIS_315H) { 324 + #ifdef CONFIG_FB_SIS_300 325 InitTo300Pointer(SiS_Pr); 326 #else 327 return false; 328 #endif 329 } else { 330 + #ifdef CONFIG_FB_SIS_315 331 InitTo310Pointer(SiS_Pr); 332 #else 333 return false; ··· 340 /* HELPER: Get ModeID */ 341 /*********************************************/ 342 343 static 344 unsigned short 345 SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, 346 int Depth, bool FSTN, int LCDwidth, int LCDheight) ··· 884 void 885 SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data) 886 { 887 + outb((u8)index, port); 888 + outb((u8)data, port + 1); 889 } 890 891 void 892 SiS_SetRegByte(SISIOADDRESS port, unsigned short data) 893 { 894 + outb((u8)data, port); 895 } 896 897 void 898 SiS_SetRegShort(SISIOADDRESS port, unsigned short data) 899 { 900 + outw((u16)data, port); 901 } 902 903 void 904 SiS_SetRegLong(SISIOADDRESS port, unsigned int data) 905 { 906 + outl((u32)data, port); 907 } 908 909 unsigned char 910 SiS_GetReg(SISIOADDRESS port, unsigned short index) 911 { 912 + outb((u8)index, port); 913 + return inb(port + 1); 914 } 915 916 unsigned char 917 SiS_GetRegByte(SISIOADDRESS port) 918 { 919 + return inb(port); 920 } 921 922 unsigned short 923 SiS_GetRegShort(SISIOADDRESS port) 924 { 925 + return inw(port); 926 } 927 928 unsigned int 929 SiS_GetRegLong(SISIOADDRESS port) 930 { 931 + return inl(port); 932 } 933 934 void ··· 1089 SiSInitPCIetc(struct SiS_Private *SiS_Pr) 1090 { 1091 switch(SiS_Pr->ChipType) { 1092 + #ifdef CONFIG_FB_SIS_300 1093 case SIS_300: 1094 case SIS_540: 1095 case SIS_630: ··· 1108 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A); 1109 break; 1110 #endif 1111 + #ifdef CONFIG_FB_SIS_315 1112 case SIS_315H: 1113 case SIS_315: 1114 case SIS_315PRO: ··· 1152 /* HELPER: SetLVDSetc */ 1153 /*********************************************/ 1154 1155 static 1156 void 1157 SiSSetLVDSetc(struct SiS_Private *SiS_Pr) 1158 { ··· 1174 if((temp == 1) || (temp == 2)) return; 1175 1176 switch(SiS_Pr->ChipType) { 1177 + #ifdef CONFIG_FB_SIS_300 1178 case SIS_540: 1179 case SIS_630: 1180 case SIS_730: ··· 1188 } 1189 break; 1190 #endif 1191 + #ifdef CONFIG_FB_SIS_315 1192 case SIS_550: 1193 case SIS_650: 1194 case SIS_740: ··· 1420 /* HELPER: GetVBType */ 1421 /*********************************************/ 1422 1423 static 1424 void 1425 SiS_GetVBType(struct SiS_Private *SiS_Pr) 1426 { ··· 1487 /* HELPER: Check RAM size */ 1488 /*********************************************/ 1489 1490 static bool 1491 SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 1492 unsigned short ModeIdIndex) ··· 1501 if(AdapterMemSize < memorysize) return false; 1502 return true; 1503 } 1504 1505 /*********************************************/ 1506 /* HELPER: Get DRAM type */ 1507 /*********************************************/ 1508 1509 + #ifdef CONFIG_FB_SIS_315 1510 static unsigned char 1511 SiS_Get310DRAMType(struct SiS_Private *SiS_Pr) 1512 { ··· 1574 /* HELPER: ClearBuffer */ 1575 /*********************************************/ 1576 1577 static void 1578 SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo) 1579 { ··· 1587 1588 if(SiS_Pr->SiS_ModeType >= ModeEGA) { 1589 if(ModeNo > 0x13) { 1590 + memset_io(memaddr, 0, memsize); 1591 } else { 1592 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr; 1593 for(i = 0; i < 0x4000; i++) writew(0x0000, &pBuffer[i]); ··· 1596 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr; 1597 for(i = 0; i < 0x4000; i++) writew(0x0720, &pBuffer[i]); 1598 } else { 1599 + memset_io(memaddr, 0, 0x8000); 1600 } 1601 } 1602 1603 /*********************************************/ 1604 /* HELPER: SearchModeID */ ··· 2132 SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F); 2133 } 2134 2135 + #ifdef CONFIG_FB_SIS_315 2136 if(SiS_Pr->ChipType == XGI_20) { 2137 SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1); 2138 if(!(temp = crt1data[5] & 0x1f)) { ··· 2215 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb); 2216 2217 if(SiS_Pr->ChipType >= SIS_315H) { 2218 + #ifdef CONFIG_FB_SIS_315 2219 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01); 2220 if(SiS_Pr->ChipType == XGI_20) { 2221 unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex); ··· 2236 /* FIFO */ 2237 /*********************************************/ 2238 2239 + #ifdef CONFIG_FB_SIS_300 2240 void 2241 SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1, 2242 unsigned short *idx2) ··· 2506 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data); 2507 2508 /* Write foreground and background queue */ 2509 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50); 2510 2511 if(SiS_Pr->ChipType == SIS_730) { 2512 ··· 2530 2531 } 2532 2533 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ); 2534 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0); 2535 2536 /* GUI grant timer (PCI config 0xA3) */ 2537 if(SiS_Pr->ChipType == SIS_730) { ··· 2552 2553 } 2554 2555 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ); 2556 } 2557 + #endif /* CONFIG_FB_SIS_300 */ 2558 2559 + #ifdef CONFIG_FB_SIS_315 2560 static void 2561 SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex) 2562 { ··· 2612 } 2613 2614 if(SiS_Pr->ChipType < SIS_315H) { 2615 + #ifdef CONFIG_FB_SIS_300 2616 if(VCLK > 150) data |= 0x80; 2617 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data); 2618 ··· 2621 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data); 2622 #endif 2623 } else if(SiS_Pr->ChipType < XGI_20) { 2624 + #ifdef CONFIG_FB_SIS_315 2625 if(VCLK >= 166) data |= 0x0c; 2626 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data); 2627 ··· 2630 } 2631 #endif 2632 } else { 2633 + #ifdef CONFIG_FB_SIS_315 2634 if(VCLK >= 200) data |= 0x0c; 2635 if(SiS_Pr->ChipType == XGI_20) data &= ~0x04; 2636 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data); ··· 2675 unsigned short ModeIdIndex, unsigned short RRTI) 2676 { 2677 unsigned short data, infoflag = 0, modeflag, resindex; 2678 + #ifdef CONFIG_FB_SIS_315 2679 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 2680 unsigned short data2, data3; 2681 #endif ··· 2736 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data); 2737 } 2738 2739 + #ifdef CONFIG_FB_SIS_315 2740 if(SiS_Pr->ChipType >= SIS_315H) { 2741 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb); 2742 } ··· 2826 2827 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex); 2828 2829 + #ifdef CONFIG_FB_SIS_315 2830 if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) || 2831 (SiS_Pr->ChipType == XGI_40)) { 2832 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) { ··· 2845 #endif 2846 } 2847 2848 + #ifdef CONFIG_FB_SIS_315 2849 static void 2850 SiS_SetupDualChip(struct SiS_Private *SiS_Pr) 2851 { ··· 2999 SiS_Pr->SiS_SelectCRT2Rate = 0; 3000 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); 3001 3002 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) { 3003 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 3004 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; ··· 3028 } 3029 3030 switch(SiS_Pr->ChipType) { 3031 + #ifdef CONFIG_FB_SIS_300 3032 case SIS_300: 3033 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex); 3034 break; ··· 3039 break; 3040 #endif 3041 default: 3042 + #ifdef CONFIG_FB_SIS_315 3043 if(SiS_Pr->ChipType == XGI_20) { 3044 unsigned char sr2b = 0, sr2c = 0; 3045 switch(ModeNo) { ··· 3062 3063 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 3064 3065 + #ifdef CONFIG_FB_SIS_315 3066 if(SiS_Pr->ChipType == XGI_40) { 3067 SiS_SetupDualChip(SiS_Pr); 3068 } ··· 3070 3071 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex); 3072 3073 if(SiS_Pr->SiS_flag_clearbuffer) { 3074 SiS_ClearBuffer(SiS_Pr, ModeNo); 3075 } 3076 3077 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) { 3078 SiS_WaitRetrace1(SiS_Pr); ··· 3104 static void 3105 SiS_ResetVB(struct SiS_Private *SiS_Pr) 3106 { 3107 + #ifdef CONFIG_FB_SIS_315 3108 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 3109 unsigned short temp; 3110 ··· 3139 * which locks CRT2 in some way to CRT1 timing. Disable 3140 * this here. 3141 */ 3142 + #ifdef CONFIG_FB_SIS_315 3143 if((IS_SIS651) || (IS_SISM650) || 3144 SiS_Pr->ChipType == SIS_340 || 3145 SiS_Pr->ChipType == XGI_40) { ··· 3160 static void 3161 SiS_Handle760(struct SiS_Private *SiS_Pr) 3162 { 3163 + #ifdef CONFIG_FB_SIS_315 3164 unsigned int somebase; 3165 unsigned char temp1, temp2, temp3; 3166 ··· 3170 (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) ) 3171 return; 3172 3173 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74); 3174 somebase &= 0xffff; 3175 3176 if(somebase == 0) return; ··· 3190 temp2 = 0x0b; 3191 } 3192 3193 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1); 3194 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2); 3195 3196 SiS_SetRegByte((somebase + 0x85), temp3); 3197 #endif 3198 } 3199 3200 /*********************************************/ 3201 /* SiSSetMode() */ 3202 /*********************************************/ 3203 3204 bool 3205 SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) 3206 { 3207 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; 3208 unsigned short RealModeNo, ModeIdIndex; 3209 unsigned char backupreg = 0; 3210 unsigned short KeepLockReg; 3211 3212 SiS_Pr->UseCustomMode = false; 3213 SiS_Pr->CRT1UsesCustomMode = false; 3214 3215 SiS_Pr->SiS_flag_clearbuffer = 0; 3216 3217 if(SiS_Pr->UseCustomMode) { 3218 ModeNo = 0xfe; 3219 } else { 3220 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1; 3221 ModeNo &= 0x7f; 3222 } 3223 ··· 3301 SiS_GetSysFlags(SiS_Pr); 3302 3303 SiS_Pr->SiS_VGAINFO = 0x11; 3304 3305 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05); 3306 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3307 3308 SiSInitPCIetc(SiS_Pr); ··· 3344 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex); 3345 SiS_SetLowModeTest(SiS_Pr, ModeNo); 3346 3347 /* Check memory size (kernel framebuffer driver only) */ 3348 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) { 3349 return false; 3350 } 3351 3352 SiS_OpenCRTC(SiS_Pr); 3353 ··· 3384 SiS_DisplayOn(SiS_Pr); 3385 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3386 3387 + #ifdef CONFIG_FB_SIS_315 3388 if(SiS_Pr->ChipType >= SIS_315H) { 3389 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3390 if(!(SiS_IsDualEdge(SiS_Pr))) { ··· 3396 3397 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 3398 if(SiS_Pr->ChipType >= SIS_315H) { 3399 + #ifdef CONFIG_FB_SIS_315 3400 if(!SiS_Pr->SiS_ROMNew) { 3401 if(SiS_IsVAMode(SiS_Pr)) { 3402 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); ··· 3424 } 3425 } 3426 3427 SiS_CloseCRTC(SiS_Pr); 3428 3429 SiS_Handle760(SiS_Pr); 3430 3431 /* We never lock registers in XF86 */ 3432 if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); 3433 3434 return true; 3435 } 3436 3437 #ifndef GETBITSTR 3438 #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) ··· 3927 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE; 3928 3929 if(SiS_Pr->ChipType < SIS_315H) { 3930 + #ifdef CONFIG_FB_SIS_300 3931 tempbx = SiS_Pr->SiS_VGAHT; 3932 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3933 tempbx = SiS_Pr->PanelHT; ··· 3936 remaining = tempbx % 8; 3937 #endif 3938 } else { 3939 + #ifdef CONFIG_FB_SIS_315 3940 /* OK for LCDA, LVDS */ 3941 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes; 3942 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */ ··· 3950 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx; 3951 3952 if(SiS_Pr->ChipType < SIS_315H) { 3953 + #ifdef CONFIG_FB_SIS_300 3954 if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) { 3955 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1); 3956 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE; ··· 3982 } 3983 #endif 3984 } else { 3985 + #ifdef CONFIG_FB_SIS_315 3986 tempax = VGAHDE; 3987 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3988 tempbx = SiS_Pr->PanelXRes; ··· 4001 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 4002 tempax = SiS_Pr->PanelYRes; 4003 } else if(SiS_Pr->ChipType < SIS_315H) { 4004 + #ifdef CONFIG_FB_SIS_300 4005 /* Stupid hack for 640x400/320x200 */ 4006 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 4007 if((tempax + tempbx) == 438) tempbx += 16; ··· 4054 if(modeflag & DoubleScanMode) tempax |= 0x80; 4055 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax); 4056 4057 } 4058 4059 void 4060 SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, 4061 int xres, int yres, 4062 struct fb_var_screeninfo *var, bool writeres 4063 ) 4064 { 4065 unsigned short HRE, HBE, HRS, HBS, HDE, HT; ··· 4127 4128 D = B - F - C; 4129 4130 if(writeres) var->xres = xres = E * 8; 4131 var->left_margin = D * 8; 4132 var->right_margin = F * 8; 4133 var->hsync_len = C * 8; 4134 4135 /* Vertical */ 4136 sr_data = crdata[13]; ··· 4192 4193 D = B - F - C; 4194 4195 if(writeres) var->yres = yres = E; 4196 var->upper_margin = D; 4197 var->lower_margin = F; 4198 var->vsync_len = C; 4199 4200 if((xres == 320) && ((yres == 200) || (yres == 240))) { 4201 /* Terrible hack, but correct CRTC data for ··· 4224 * a negative D. The CRT controller does not 4225 * seem to like correcting HRE to 50) 4226 */ 4227 var->left_margin = (400 - 376); 4228 var->right_margin = (328 - 320); 4229 var->hsync_len = (376 - 328); 4230 4231 } 4232
+4 -59
drivers/video/sis/init.h
··· 53 #ifndef _INIT_H_ 54 #define _INIT_H_ 55 56 - #include "osdef.h" 57 #include "initdef.h" 58 59 - #ifdef SIS_XORG_XF86 60 - #include "sis.h" 61 - #define SIS_NEED_inSISREG 62 - #define SIS_NEED_inSISREGW 63 - #define SIS_NEED_inSISREGL 64 - #define SIS_NEED_outSISREG 65 - #define SIS_NEED_outSISREGW 66 - #define SIS_NEED_outSISREGL 67 - #include "sis_regs.h" 68 - #endif 69 - 70 - #ifdef SIS_LINUX_KERNEL 71 #include "vgatypes.h" 72 #include "vstruct.h" 73 #ifdef SIS_CP ··· 65 #include <linux/fb.h> 66 #include "sis.h" 67 #include <video/sisfb.h> 68 - #endif 69 70 /* Mode numbers */ 71 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f}; ··· 272 { 1280, 854, 8,16} /* 0x22 */ 273 }; 274 275 - #if defined(SIS300) || defined(SIS315H) 276 static const struct SiS_StandTable_S SiS_StandTable[]= 277 { 278 /* 0x00: MD_0_200 */ ··· 1507 }; 1508 1509 bool SiSInitPtr(struct SiS_Private *SiS_Pr); 1510 - #ifdef SIS_XORG_XF86 1511 - unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, 1512 - int Depth, bool FSTN, int LCDwith, int LCDheight); 1513 - #endif 1514 unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, 1515 int VDisplay, int Depth, bool FSTN, 1516 unsigned short CustomT, int LCDwith, int LCDheight, ··· 1532 void SiS_DisplayOn(struct SiS_Private *SiS_Pr); 1533 void SiS_DisplayOff(struct SiS_Private *SiS_Pr); 1534 void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); 1535 - #ifndef SIS_LINUX_KERNEL 1536 - void SiSSetLVDSetc(struct SiS_Private *SiS_Pr); 1537 - #endif 1538 void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); 1539 void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); 1540 unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 1541 unsigned short ModeIdIndex); 1542 bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); 1543 - #ifndef SIS_LINUX_KERNEL 1544 - void SiS_GetVBType(struct SiS_Private *SiS_Pr); 1545 - #endif 1546 1547 bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, 1548 unsigned short *ModeIdIndex); ··· 1548 unsigned short ModeIdIndex); 1549 unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo, 1550 unsigned short ModeIdIndex, unsigned short RRTI); 1551 - #ifdef SIS300 1552 void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1, 1553 unsigned short *idx2); 1554 unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2); 1555 unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index); 1556 #endif 1557 void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); 1558 - #ifdef SIS_XORG_XF86 1559 - bool SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, 1560 - bool dosetpitch); 1561 - bool SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, 1562 - DisplayModePtr mode, bool IsCustom); 1563 - bool SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, 1564 - DisplayModePtr mode, bool IsCustom); 1565 - bool SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, 1566 - DisplayModePtr mode, bool IsCustom); 1567 - #endif 1568 - #ifdef SIS_LINUX_KERNEL 1569 bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); 1570 - #endif 1571 void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); 1572 void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 1573 unsigned short ModeIdIndex); 1574 - #ifdef SIS_XORG_XF86 1575 - void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, 1576 - int yres, DisplayModePtr current); 1577 - #endif 1578 - #ifdef SIS_LINUX_KERNEL 1579 void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, 1580 int yres, struct fb_var_screeninfo *var, bool writeres); 1581 - #endif 1582 1583 /* From init301.c: */ 1584 extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, ··· 1584 extern bool SiS_IsVAMode(struct SiS_Private *); 1585 extern bool SiS_IsDualEdge(struct SiS_Private *); 1586 1587 - #ifdef SIS_XORG_XF86 1588 - /* From other modules: */ 1589 - extern unsigned short SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, 1590 - unsigned int VBFlags); 1591 - extern unsigned char SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, unsigned short offset, 1592 - unsigned char value); 1593 - extern unsigned char SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id); 1594 - extern unsigned short SiS_GetModeNumber(ScrnInfoPtr pScrn, DisplayModePtr mode, 1595 - unsigned int VBFlags); 1596 - #endif 1597 - 1598 - #ifdef SIS_LINUX_KERNEL 1599 - #ifdef SIS300 1600 extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); 1601 extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, 1602 unsigned int val); 1603 #endif 1604 - #ifdef SIS315H 1605 extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, 1606 unsigned char val); 1607 extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg); 1608 - #endif 1609 #endif 1610 1611 #endif
··· 53 #ifndef _INIT_H_ 54 #define _INIT_H_ 55 56 #include "initdef.h" 57 58 #include "vgatypes.h" 59 #include "vstruct.h" 60 #ifdef SIS_CP ··· 78 #include <linux/fb.h> 79 #include "sis.h" 80 #include <video/sisfb.h> 81 82 /* Mode numbers */ 83 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f}; ··· 286 { 1280, 854, 8,16} /* 0x22 */ 287 }; 288 289 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 290 static const struct SiS_StandTable_S SiS_StandTable[]= 291 { 292 /* 0x00: MD_0_200 */ ··· 1521 }; 1522 1523 bool SiSInitPtr(struct SiS_Private *SiS_Pr); 1524 unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, 1525 int VDisplay, int Depth, bool FSTN, 1526 unsigned short CustomT, int LCDwith, int LCDheight, ··· 1550 void SiS_DisplayOn(struct SiS_Private *SiS_Pr); 1551 void SiS_DisplayOff(struct SiS_Private *SiS_Pr); 1552 void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); 1553 void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); 1554 void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); 1555 unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 1556 unsigned short ModeIdIndex); 1557 bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); 1558 1559 bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, 1560 unsigned short *ModeIdIndex); ··· 1572 unsigned short ModeIdIndex); 1573 unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo, 1574 unsigned short ModeIdIndex, unsigned short RRTI); 1575 + #ifdef CONFIG_FB_SIS_300 1576 void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1, 1577 unsigned short *idx2); 1578 unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2); 1579 unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index); 1580 #endif 1581 void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); 1582 bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); 1583 void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); 1584 void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, 1585 unsigned short ModeIdIndex); 1586 void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, 1587 int yres, struct fb_var_screeninfo *var, bool writeres); 1588 1589 /* From init301.c: */ 1590 extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, ··· 1626 extern bool SiS_IsVAMode(struct SiS_Private *); 1627 extern bool SiS_IsDualEdge(struct SiS_Private *); 1628 1629 + #ifdef CONFIG_FB_SIS_300 1630 extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); 1631 extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, 1632 unsigned int val); 1633 #endif 1634 + #ifdef CONFIG_FB_SIS_315 1635 extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, 1636 unsigned char val); 1637 extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg); 1638 #endif 1639 1640 #endif
+141 -326
drivers/video/sis/init301.c
··· 75 76 #include "init301.h" 77 78 - #ifdef SIS300 79 #include "oem300.h" 80 #endif 81 82 - #ifdef SIS315H 83 #include "oem310.h" 84 #endif 85 ··· 87 #define SiS_I2CDELAYSHORT 150 88 89 static unsigned short SiS_GetBIOSLCDResInfo(struct SiS_Private *SiS_Pr); 90 - #ifdef SIS_LINUX_KERNEL 91 static void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); 92 - #endif 93 94 /*********************************************/ 95 /* HELPER: Lock/Unlock CRT2 */ ··· 104 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24,0x01); 105 } 106 107 - #ifdef SIS_LINUX_KERNEL 108 static 109 - #endif 110 void 111 SiS_LockCRT2(struct SiS_Private *SiS_Pr) 112 { ··· 134 /* HELPER: Get Pointer to LCD structure */ 135 /*********************************************/ 136 137 - #ifdef SIS315H 138 static unsigned char * 139 GetLCDStructPtr661(struct SiS_Private *SiS_Pr) 140 { ··· 400 /* HELPER: GET SOME DATA FROM BIOS ROM */ 401 /*********************************************/ 402 403 - #ifdef SIS300 404 static bool 405 SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) 406 { ··· 445 SiS_GetReg(SiS_Pr->SiS_P3c4, 0x05); 446 } 447 448 - #if defined(SIS300) || defined(SIS315H) 449 static void 450 SiS_GenericDelay(struct SiS_Private *SiS_Pr, unsigned short delay) 451 { ··· 453 } 454 #endif 455 456 - #ifdef SIS315H 457 static void 458 SiS_LongDelay(struct SiS_Private *SiS_Pr, unsigned short delay) 459 { ··· 463 } 464 #endif 465 466 - #if defined(SIS300) || defined(SIS315H) 467 static void 468 SiS_ShortDelay(struct SiS_Private *SiS_Pr, unsigned short delay) 469 { ··· 476 static void 477 SiS_PanelDelay(struct SiS_Private *SiS_Pr, unsigned short DelayTime) 478 { 479 - #if defined(SIS300) || defined(SIS315H) 480 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 481 unsigned short PanelID, DelayIndex, Delay=0; 482 #endif 483 484 if(SiS_Pr->ChipType < SIS_315H) { 485 486 - #ifdef SIS300 487 488 PanelID = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36); 489 if(SiS_Pr->SiS_VBType & VB_SISVB) { ··· 509 } 510 SiS_ShortDelay(SiS_Pr, Delay); 511 512 - #endif /* SIS300 */ 513 514 } else { 515 516 - #ifdef SIS315H 517 518 if((SiS_Pr->ChipType >= SIS_661) || 519 (SiS_Pr->ChipType <= SIS_315PRO) || ··· 575 576 } 577 578 - #endif /* SIS315H */ 579 580 } 581 } 582 583 - #ifdef SIS315H 584 static void 585 SiS_PanelDelayLoop(struct SiS_Private *SiS_Pr, unsigned short DelayTime, unsigned short DelayLoop) 586 { ··· 609 while((!(SiS_GetRegByte(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog); 610 } 611 612 - #if defined(SIS300) || defined(SIS315H) 613 static void 614 SiS_WaitRetrace2(struct SiS_Private *SiS_Pr, unsigned short reg) 615 { ··· 626 SiS_WaitVBRetrace(struct SiS_Private *SiS_Pr) 627 { 628 if(SiS_Pr->ChipType < SIS_315H) { 629 - #ifdef SIS300 630 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 631 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x20)) return; 632 } ··· 637 } 638 #endif 639 } else { 640 - #ifdef SIS315H 641 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x40)) { 642 SiS_WaitRetrace1(SiS_Pr); 643 } else { ··· 682 /* HELPER: MISC */ 683 /*********************************************/ 684 685 - #ifdef SIS300 686 static bool 687 SiS_Is301B(struct SiS_Private *SiS_Pr) 688 { ··· 704 bool 705 SiS_IsDualEdge(struct SiS_Private *SiS_Pr) 706 { 707 - #ifdef SIS315H 708 if(SiS_Pr->ChipType >= SIS_315H) { 709 if((SiS_Pr->ChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { 710 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return true; ··· 717 bool 718 SiS_IsVAMode(struct SiS_Private *SiS_Pr) 719 { 720 - #ifdef SIS315H 721 unsigned short flag; 722 723 if(SiS_Pr->ChipType >= SIS_315H) { ··· 728 return false; 729 } 730 731 - #ifdef SIS315H 732 static bool 733 SiS_IsVAorLCD(struct SiS_Private *SiS_Pr) 734 { ··· 741 static bool 742 SiS_IsDualLink(struct SiS_Private *SiS_Pr) 743 { 744 - #ifdef SIS315H 745 if(SiS_Pr->ChipType >= SIS_315H) { 746 if((SiS_CRT2IsLCD(SiS_Pr)) || 747 (SiS_IsVAMode(SiS_Pr))) { ··· 752 return false; 753 } 754 755 - #ifdef SIS315H 756 static bool 757 SiS_TVEnabled(struct SiS_Private *SiS_Pr) 758 { ··· 764 } 765 #endif 766 767 - #ifdef SIS315H 768 static bool 769 SiS_LCDAEnabled(struct SiS_Private *SiS_Pr) 770 { ··· 773 } 774 #endif 775 776 - #ifdef SIS315H 777 static bool 778 SiS_WeHaveBacklightCtrl(struct SiS_Private *SiS_Pr) 779 { ··· 784 } 785 #endif 786 787 - #ifdef SIS315H 788 static bool 789 SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) 790 { ··· 800 } 801 #endif 802 803 - #ifdef SIS315H 804 static bool 805 SiS_IsYPbPr(struct SiS_Private *SiS_Pr) 806 { ··· 812 } 813 #endif 814 815 - #ifdef SIS315H 816 static bool 817 SiS_IsChScart(struct SiS_Private *SiS_Pr) 818 { ··· 824 } 825 #endif 826 827 - #ifdef SIS315H 828 static bool 829 SiS_IsTVOrYPbPrOrScart(struct SiS_Private *SiS_Pr) 830 { ··· 844 } 845 #endif 846 847 - #ifdef SIS315H 848 static bool 849 SiS_IsLCDOrLCDA(struct SiS_Private *SiS_Pr) 850 { ··· 910 /*********************************************/ 911 912 /* Setup general purpose IO for Chrontel communication */ 913 - #ifdef SIS300 914 void 915 SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo) 916 { ··· 919 920 if(!(SiS_Pr->SiS_ChSW)) return; 921 922 - #ifdef SIS_LINUX_KERNEL 923 acpibase = sisfb_read_lpc_pci_dword(SiS_Pr, 0x74); 924 - #else 925 - acpibase = pciReadLong(0x00000800, 0x74); 926 - #endif 927 acpibase &= 0xFFFF; 928 if(!acpibase) return; 929 temp = SiS_GetRegShort((acpibase + 0x3c)); /* ACPI register 0x3c: GP Event 1 I/O mode select */ ··· 961 tempax &= (DriverMode | LoadDACFlag | SetNotSimuMode | SetPALTV); 962 tempbx |= tempax; 963 964 - #ifdef SIS315H 965 if(SiS_Pr->ChipType >= SIS_315H) { 966 if(SiS_Pr->SiS_VBType & VB_SISLCDA) { 967 if(ModeNo == 0x03) { ··· 1011 } 1012 } 1013 1014 - #endif /* SIS315H */ 1015 1016 if(!(SiS_Pr->SiS_VBType & VB_SISVGA2)) { 1017 tempbx &= ~(SetCRT2ToRAMDAC); ··· 1146 1147 SiS_Pr->SiS_VBInfo = tempbx; 1148 1149 - #ifdef SIS300 1150 if(SiS_Pr->ChipType == SIS_630) { 1151 SiS_SetChrontelGPIO(SiS_Pr, SiS_Pr->SiS_VBInfo); 1152 } 1153 #endif 1154 1155 - #ifdef SIS_LINUX_KERNEL 1156 #if 0 1157 printk(KERN_DEBUG "sisfb: (init301: VBInfo= 0x%04x, SetFlag=0x%04x)\n", 1158 SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); 1159 - #endif 1160 - #endif 1161 - #ifdef SIS_XORG_XF86 1162 - #ifdef TWDEBUG 1163 - xf86DrvMsg(0, X_PROBED, "(init301: VBInfo=0x%04x, SetFlag=0x%04x)\n", 1164 - SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); 1165 - #endif 1166 #endif 1167 } 1168 ··· 1399 } 1400 1401 SiS_Pr->SiS_VBInfo &= ~SetPALTV; 1402 - 1403 - #ifdef SIS_XORG_XF86 1404 - #ifdef TWDEBUG 1405 - xf86DrvMsg(0, X_INFO, "(init301: TVMode %x, VBInfo %x)\n", SiS_Pr->SiS_TVMode, SiS_Pr->SiS_VBInfo); 1406 - #endif 1407 - #endif 1408 } 1409 1410 /*********************************************/ ··· 1421 static void 1422 SiS_GetLCDInfoBIOS(struct SiS_Private *SiS_Pr) 1423 { 1424 - #ifdef SIS315H 1425 unsigned char *ROMAddr; 1426 unsigned short temp; 1427 - 1428 - #ifdef SIS_XORG_XF86 1429 - #ifdef TWDEBUG 1430 - xf86DrvMsg(0, X_INFO, "Paneldata driver: [%d %d] [H %d %d] [V %d %d] [C %d 0x%02x 0x%02x]\n", 1431 - SiS_Pr->PanelHT, SiS_Pr->PanelVT, 1432 - SiS_Pr->PanelHRS, SiS_Pr->PanelHRE, 1433 - SiS_Pr->PanelVRS, SiS_Pr->PanelVRE, 1434 - SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK, 1435 - SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_A, 1436 - SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_B); 1437 - #endif 1438 - #endif 1439 1440 if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) { 1441 if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { ··· 1445 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_A = ROMAddr[19]; 1446 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].SR2C = 1447 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_B = ROMAddr[20]; 1448 - 1449 - #ifdef SIS_XORG_XF86 1450 - #ifdef TWDEBUG 1451 - xf86DrvMsg(0, X_INFO, "Paneldata BIOS: [%d %d] [H %d %d] [V %d %d] [C %d 0x%02x 0x%02x]\n", 1452 - SiS_Pr->PanelHT, SiS_Pr->PanelVT, 1453 - SiS_Pr->PanelHRS, SiS_Pr->PanelHRE, 1454 - SiS_Pr->PanelVRS, SiS_Pr->PanelVRE, 1455 - SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK, 1456 - SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_A, 1457 - SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_B); 1458 - #endif 1459 - #endif 1460 1461 } 1462 #endif ··· 1471 { 1472 unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0; 1473 bool panelcanscale = false; 1474 - #ifdef SIS300 1475 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 1476 static const unsigned char SiS300SeriesLCDRes[] = 1477 { 0, 1, 2, 3, 7, 4, 5, 8, 1478 0, 0, 10, 0, 0, 0, 0, 15 }; 1479 #endif 1480 - #ifdef SIS315H 1481 unsigned char *myptr = NULL; 1482 #endif 1483 ··· 1516 SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1; 1517 } 1518 temp &= 0x0f; 1519 - #ifdef SIS300 1520 if(SiS_Pr->ChipType < SIS_315H) { 1521 /* Very old BIOSes only know 7 sizes (NetVista 2179, 1.01g) */ 1522 if(SiS_Pr->SiS_VBType & VB_SIS301) { ··· 1528 #endif 1529 1530 /* Translate to our internal types */ 1531 - #ifdef SIS315H 1532 if(SiS_Pr->ChipType == SIS_550) { 1533 if (temp == Panel310_1152x768) temp = Panel_320x240_2; /* Verified working */ 1534 else if(temp == Panel310_320x240_2) temp = Panel_320x240_2; ··· 1551 1552 SiS_Pr->SiS_LCDResInfo = temp; 1553 1554 - #ifdef SIS300 1555 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1556 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) { 1557 SiS_Pr->SiS_LCDResInfo = Panel_Barco1366; ··· 1593 else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 1594 1595 /* Dual link, Pass 1:1 BIOS default, etc. */ 1596 - #ifdef SIS315H 1597 if(SiS_Pr->ChipType >= SIS_661) { 1598 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 1599 if(temp & 0x08) SiS_Pr->SiS_LCDInfo |= LCDPass11; ··· 2030 } 2031 } 2032 2033 - #ifdef SIS300 2034 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2035 if(SiS_Pr->SiS_CustomT == CUT_PANEL848 || SiS_Pr->SiS_CustomT == CUT_PANEL856) { 2036 SiS_Pr->SiS_LCDInfo = 0x80 | 0x40 | 0x20; /* neg h/v sync, RGB24(D0 = 0) */ ··· 2140 SiS_Pr->SiS_SetFlag |= LCDVESATiming; 2141 } 2142 2143 - #ifdef SIS_LINUX_KERNEL 2144 #if 0 2145 printk(KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n", 2146 SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo); 2147 - #endif 2148 - #endif 2149 - #ifdef SIS_XORG_XF86 2150 - xf86DrvMsgVerb(0, X_PROBED, 4, 2151 - "(init301: LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x SetFlag=0x%04x)\n", 2152 - SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo, SiS_Pr->SiS_SetFlag); 2153 #endif 2154 } 2155 ··· 2306 VCLKIndex = SiS_Pr->PanelVCLKIdx315; 2307 } 2308 2309 - #ifdef SIS300 2310 /* Special Timing: Barco iQ Pro R series */ 2311 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) VCLKIndex = 0x44; 2312 ··· 2357 2358 } 2359 2360 - #ifdef SIS_XORG_XF86 2361 - #ifdef TWDEBUG 2362 - xf86DrvMsg(0, X_INFO, "VCLKIndex %d (0x%x)\n", VCLKIndex, VCLKIndex); 2363 - #endif 2364 - #endif 2365 - 2366 return VCLKIndex; 2367 } 2368 ··· 2369 { 2370 unsigned short i, j, modeflag, tempah=0; 2371 short tempcl; 2372 - #if defined(SIS300) || defined(SIS315H) 2373 unsigned short tempbl; 2374 #endif 2375 - #ifdef SIS315H 2376 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 2377 unsigned short tempah2, tempbl2; 2378 #endif ··· 2395 2396 if(SiS_Pr->ChipType < SIS_315H) { 2397 2398 - #ifdef SIS300 /* ---- 300 series ---- */ 2399 2400 /* For 301BDH: (with LCD via LVDS) */ 2401 if(SiS_Pr->SiS_VBType & VB_NoLCD) { ··· 2418 2419 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0xA0; 2420 2421 - #endif /* SIS300 */ 2422 2423 } else { 2424 2425 - #ifdef SIS315H /* ------- 315/330 series ------ */ 2426 2427 if(ModeNo > 0x13) { 2428 tempcl -= ModeVGA; ··· 2435 2436 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0x50; 2437 2438 - #endif /* SIS315H */ 2439 2440 } 2441 ··· 2444 if(SiS_Pr->ChipType < SIS_315H) { 2445 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,tempah); 2446 } else { 2447 - #ifdef SIS315H 2448 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2449 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); 2450 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { ··· 2525 2526 if(SiS_Pr->ChipType >= SIS_315H) { 2527 2528 - #ifdef SIS315H 2529 /* LVDS can only be slave in 8bpp modes */ 2530 tempah = 0x80; 2531 if((modeflag & CRT2Mode) && (SiS_Pr->SiS_ModeType > ModeVGA)) { ··· 2545 2546 } else { 2547 2548 - #ifdef SIS300 2549 tempah = 0; 2550 if( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) && (SiS_Pr->SiS_ModeType > ModeVGA) ) { 2551 tempah |= 0x02; ··· 2567 2568 if(SiS_Pr->ChipType >= SIS_315H) { 2569 2570 - #ifdef SIS315H 2571 /* unsigned char bridgerev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01); */ 2572 2573 /* The following is nearly unpreditable and varies from machine ··· 2659 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah); 2660 } 2661 2662 - #endif /* SIS315H */ 2663 2664 } else if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 2665 2666 - #ifdef SIS300 2667 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f); 2668 2669 if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) || ··· 2686 2687 } else { /* LVDS */ 2688 2689 - #ifdef SIS315H 2690 if(SiS_Pr->ChipType >= SIS_315H) { 2691 2692 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { ··· 2872 } 2873 } 2874 2875 - #ifdef SIS315H 2876 if(SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) { 2877 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { 2878 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { ··· 2977 case Panel_1280x1024: tempbx = 24; break; 2978 case Panel_1400x1050: tempbx = 26; break; 2979 case Panel_1600x1200: tempbx = 28; break; 2980 - #ifdef SIS300 2981 case Panel_Barco1366: tempbx = 80; break; 2982 #endif 2983 } ··· 2994 2995 if(SiS_Pr->SiS_LCDInfo & LCDPass11) tempbx = 30; 2996 2997 - #ifdef SIS300 2998 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) { 2999 tempbx = 82; 3000 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; ··· 3130 3131 if((SiS_Pr->SiS_VBType & VB_SISVB) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3132 3133 - #ifdef SIS315H 3134 SiS_CalcPanelLinkTiming(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 3135 SiS_CalcLCDACRT1Timing(SiS_Pr, ModeNo, ModeIdIndex); 3136 #endif ··· 3155 case 16: LVDSData = SiS_Pr->SiS_LVDS800x600Data_1; break; 3156 case 18: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1; break; 3157 case 20: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break; 3158 - #ifdef SIS300 3159 case 80: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_1; break; 3160 case 81: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_2; break; 3161 case 82: LVDSData = SiS_Pr->SiS_LVDSBARCO1024Data_1; break; ··· 3189 (SiS_Pr->SiS_SetFlag & SetDOSMode) ) { 3190 SiS_Pr->SiS_HDE = SiS_Pr->PanelXRes; 3191 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes; 3192 - #ifdef SIS300 3193 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) { 3194 if(ResIndex < 0x08) { 3195 SiS_Pr->SiS_HDE = 1280; ··· 3211 unsigned short resinfo, CRT2Index, ResIndex; 3212 const struct SiS_LCDData *LCDPtr = NULL; 3213 const struct SiS_TVData *TVPtr = NULL; 3214 - #ifdef SIS315H 3215 short resinfo661; 3216 #endif 3217 ··· 3224 } else { 3225 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3226 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 3227 - #ifdef SIS315H 3228 resinfo661 = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].ROMMODEIDX661; 3229 if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && 3230 (SiS_Pr->SiS_SetFlag & LCDVESATiming) && ··· 3401 3402 } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) { 3403 3404 - #ifdef SIS315H 3405 SiS_Pr->SiS_RVBHCMAX = ROMAddr[romptr]; 3406 SiS_Pr->SiS_RVBHCFACT = ROMAddr[romptr+1]; 3407 SiS_Pr->SiS_VGAHT = ROMAddr[romptr+2] | ((ROMAddr[romptr+3] & 0x0f) << 8); ··· 3461 case Panel_1680x1050 : 3462 case Panel_1680x1050 + 32: LCDPtr = SiS_Pr->SiS_LCD1680x1050Data; break; 3463 case 100 : LCDPtr = SiS_Pr->SiS_NoScaleData; break; 3464 - #ifdef SIS315H 3465 case 200 : LCDPtr = SiS310_ExtCompaq1280x1024Data; break; 3466 case 201 : LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data; break; 3467 #endif 3468 default : LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break; 3469 } 3470 - 3471 - #ifdef SIS_XORG_XF86 3472 - #ifdef TWDEBUG 3473 - xf86DrvMsg(0, X_INFO, "GetCRT2Data: Index %d ResIndex %d\n", CRT2Index, ResIndex); 3474 - #endif 3475 - #endif 3476 3477 SiS_Pr->SiS_RVBHCMAX = (LCDPtr+ResIndex)->RVBHCMAX; 3478 SiS_Pr->SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT; ··· 3559 { 3560 const struct SiS_LVDSDes *PanelDesPtr = NULL; 3561 3562 - #ifdef SIS300 3563 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 3564 3565 if(SiS_Pr->ChipType < SIS_315H) { ··· 3631 3632 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3633 3634 - #ifdef SIS315H 3635 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3636 /* non-pass 1:1 only, see above */ 3637 if(SiS_Pr->SiS_VGAHDE != SiS_Pr->PanelXRes) { ··· 3706 } else { 3707 3708 if(SiS_Pr->ChipType < SIS_315H) { 3709 - #ifdef SIS300 3710 switch(SiS_Pr->SiS_LCDResInfo) { 3711 case Panel_800x600: 3712 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) { ··· 3751 } 3752 #endif 3753 } else { 3754 - #ifdef SIS315H 3755 switch(SiS_Pr->SiS_LCDResInfo) { 3756 case Panel_1024x768: 3757 case Panel_1280x1024: ··· 3779 if(SiS_Pr->ChipType < SIS_315H) { 3780 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320; 3781 } else { 3782 - #ifdef SIS315H 3783 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) SiS_Pr->SiS_LCDHDES = 480; 3784 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) SiS_Pr->SiS_LCDHDES = 804; 3785 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) SiS_Pr->SiS_LCDHDES = 704; ··· 3801 /* DISABLE VIDEO BRIDGE */ 3802 /*********************************************/ 3803 3804 - #ifdef SIS315H 3805 static int 3806 SiS_HandlePWD(struct SiS_Private *SiS_Pr) 3807 { ··· 3826 ret = 1; 3827 } 3828 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x27,0x7f,temp); 3829 - #ifdef SIS_XORG_XF86 3830 - #ifdef TWDEBUG 3831 - xf86DrvMsg(0, 0, "Setting PWD %x\n", temp); 3832 - #endif 3833 - #endif 3834 } 3835 #endif 3836 return ret; ··· 3839 void 3840 SiS_DisableBridge(struct SiS_Private *SiS_Pr) 3841 { 3842 - #ifdef SIS315H 3843 unsigned short tempah, pushax=0, modenum; 3844 #endif 3845 unsigned short temp=0; ··· 3850 3851 if(SiS_Pr->ChipType < SIS_315H) { 3852 3853 - #ifdef SIS300 /* 300 series */ 3854 3855 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) { 3856 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { ··· 3883 } 3884 } 3885 3886 - #endif /* SIS300 */ 3887 3888 } else { 3889 3890 - #ifdef SIS315H /* 315 series */ 3891 3892 int didpwd = 0; 3893 bool custom1 = (SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || ··· 4011 4012 } 4013 4014 - #endif /* SIS315H */ 4015 4016 } 4017 4018 } else { /* ============ For 301 ================ */ 4019 4020 if(SiS_Pr->ChipType < SIS_315H) { 4021 - #ifdef SIS300 4022 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) { 4023 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08); 4024 SiS_PanelDelay(SiS_Pr, 3); ··· 4041 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 4042 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp); 4043 } else { 4044 - #ifdef SIS300 4045 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); /* disable CRT2 */ 4046 if( (!(SiS_CRT2IsLCD(SiS_Pr))) || 4047 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) { ··· 4057 4058 if(SiS_Pr->ChipType < SIS_315H) { 4059 4060 - #ifdef SIS300 /* 300 series */ 4061 4062 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 4063 SiS_SetCH700x(SiS_Pr,0x0E,0x09); ··· 4101 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04); 4102 } 4103 4104 - #endif /* SIS300 */ 4105 4106 } else { 4107 4108 - #ifdef SIS315H /* 315 series */ 4109 4110 if(!(SiS_IsNotM650orLater(SiS_Pr))) { 4111 /*if(SiS_Pr->ChipType < SIS_340) { */ /* XGI needs this */ ··· 4218 } 4219 } 4220 4221 - #endif /* SIS315H */ 4222 4223 } /* 315 series */ 4224 ··· 4234 * from outside the context of a mode switch! 4235 * MUST call getVBType before calling this 4236 */ 4237 - #ifdef SIS_LINUX_KERNEL 4238 static 4239 - #endif 4240 void 4241 SiS_EnableBridge(struct SiS_Private *SiS_Pr) 4242 { 4243 unsigned short temp=0, tempah; 4244 - #ifdef SIS315H 4245 unsigned short temp1, pushax=0; 4246 bool delaylong = false; 4247 #endif ··· 4250 4251 if(SiS_Pr->ChipType < SIS_315H) { 4252 4253 - #ifdef SIS300 /* 300 series */ 4254 4255 if(SiS_CRT2IsLCD(SiS_Pr)) { 4256 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { ··· 4313 } 4314 4315 4316 - #endif /* SIS300 */ 4317 4318 } else { 4319 4320 - #ifdef SIS315H /* 315 series */ 4321 4322 #ifdef SET_EMI 4323 unsigned char r30=0, r31=0, r32=0, r33=0, cr36=0; ··· 4616 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); 4617 } 4618 4619 - #endif /* SIS315H */ 4620 4621 } 4622 ··· 4667 4668 if(SiS_Pr->ChipType < SIS_315H) { 4669 4670 - #ifdef SIS300 /* 300 series */ 4671 4672 if(SiS_CRT2IsLCD(SiS_Pr)) { 4673 if(SiS_Pr->ChipType == SIS_730) { ··· 4711 } 4712 } 4713 4714 - #endif /* SIS300 */ 4715 4716 } else { 4717 4718 - #ifdef SIS315H /* 315 series */ 4719 4720 if(!(SiS_IsNotM650orLater(SiS_Pr))) { 4721 /*if(SiS_Pr->ChipType < SIS_340) {*/ /* XGI needs this */ ··· 4809 } 4810 } 4811 4812 - #endif /* SIS315H */ 4813 4814 } /* 310 series */ 4815 ··· 4899 4900 if(SiS_Pr->ChipType < SIS_315H) { 4901 4902 - #ifdef SIS300 /* ---- 300 series --- */ 4903 4904 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { /* 630 - 301B(-DH) */ 4905 ··· 4928 4929 } 4930 4931 - #endif /* SIS300 */ 4932 4933 } else { 4934 4935 - #ifdef SIS315H /* ------- 315 series ------ */ 4936 4937 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { /* 315 - LVDS */ 4938 ··· 5004 } 5005 5006 } 5007 - #endif /* SIS315H */ 5008 } 5009 } 5010 } 5011 5012 /* Set CRT2 FIFO on 300/540/630/730 */ 5013 - #ifdef SIS300 5014 static void 5015 SiS_SetCRT2FIFO_300(struct SiS_Private *SiS_Pr,unsigned short ModeNo) 5016 { ··· 5082 5083 } else { 5084 5085 - #ifdef SIS_LINUX_KERNEL 5086 pci50 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50); 5087 pciA0 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xa0); 5088 - #else 5089 - pci50 = pciReadLong(0x00000000, 0x50); 5090 - pciA0 = pciReadLong(0x00000000, 0xA0); 5091 - #endif 5092 5093 if(SiS_Pr->ChipType == SIS_730) { 5094 ··· 5185 #endif 5186 5187 /* Set CRT2 FIFO on 315/330 series */ 5188 - #ifdef SIS315H 5189 static void 5190 SiS_SetCRT2FIFO_310(struct SiS_Private *SiS_Pr) 5191 { ··· 5343 5344 temp = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)); 5345 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1b,temp); /* ? */ 5346 - 5347 - #ifdef SIS_XORG_XF86 5348 - #ifdef TWDEBUG 5349 - xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n", 5350 - SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal, 5351 - SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal, 5352 - SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd); 5353 - 5354 - xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 5355 - SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1], 5356 - SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3], 5357 - SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5], 5358 - SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]); 5359 - xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 5360 - SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9], 5361 - SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11], 5362 - SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13], 5363 - SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]); 5364 - xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]); 5365 - #endif 5366 - #endif 5367 } 5368 5369 /* Setup panel link ··· 5357 unsigned short push2, tempax, tempbx, tempcx, temp; 5358 unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0; 5359 bool islvds = false, issis = false, chkdclkfirst = false; 5360 - #ifdef SIS300 5361 unsigned short crt2crtc = 0; 5362 #endif 5363 - #ifdef SIS315H 5364 unsigned short pushcx; 5365 #endif 5366 5367 if(ModeNo <= 0x13) { 5368 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 5369 resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; 5370 - #ifdef SIS300 5371 crt2crtc = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 5372 #endif 5373 } else if(SiS_Pr->UseCustomMode) { ··· 5375 } else { 5376 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 5377 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 5378 - #ifdef SIS300 5379 crt2crtc = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 5380 #endif 5381 } ··· 5396 } 5397 } 5398 5399 - #ifdef SIS315H 5400 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 5401 if(IS_SIS330) { 5402 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10); ··· 5646 5647 if(SiS_Pr->ChipType < SIS_315H) { 5648 5649 - #ifdef SIS300 /* 300 series */ 5650 tempeax = SiS_Pr->SiS_VGAVDE << 6; 5651 temp = (tempeax % (unsigned int)SiS_Pr->SiS_VDE); 5652 tempeax = tempeax / (unsigned int)SiS_Pr->SiS_VDE; ··· 5657 temp = (unsigned short)(tempeax & 0x00FF); 5658 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1E,temp); /* BPLVCFACT */ 5659 tempvcfact = temp; 5660 - #endif /* SIS300 */ 5661 5662 } else { 5663 5664 - #ifdef SIS315H /* 315 series */ 5665 tempeax = SiS_Pr->SiS_VGAVDE << 18; 5666 tempebx = SiS_Pr->SiS_VDE; 5667 temp = (tempeax % tempebx); ··· 5747 temp = (unsigned short)(tempecx & 0x00FF); 5748 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x23,temp); 5749 5750 - #ifdef SIS315H 5751 if(SiS_Pr->ChipType >= SIS_315H) { 5752 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 5753 if((islvds) || (SiS_Pr->SiS_VBInfo & VB_SISLVDS)) { ··· 5765 } 5766 #endif 5767 5768 - #ifdef SIS300 5769 if(SiS_Pr->SiS_IF_DEF_TRUMPION) { 5770 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 5771 unsigned char *trumpdata; ··· 5801 } 5802 #endif 5803 5804 - #ifdef SIS315H 5805 if(SiS_Pr->SiS_IF_DEF_FSTN || SiS_Pr->SiS_IF_DEF_DSTN) { 5806 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x25,0x00); 5807 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x26,0x00); ··· 5901 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x45,0x0a); 5902 } 5903 } 5904 - #endif /* SIS315H */ 5905 } 5906 5907 /* Set Part 1 */ ··· 5909 SiS_SetGroup1(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, 5910 unsigned short RefreshRateTableIndex) 5911 { 5912 - #if defined(SIS300) || defined(SIS315H) 5913 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 5914 #endif 5915 unsigned short temp=0, tempax=0, tempbx=0, tempcx=0, bridgeadd=0; 5916 unsigned short pushbx=0, CRT1Index=0, modeflag, resinfo=0; 5917 - #ifdef SIS315H 5918 unsigned short tempbl=0; 5919 #endif 5920 ··· 5940 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ) { 5941 5942 if(SiS_Pr->ChipType < SIS_315H ) { 5943 - #ifdef SIS300 5944 SiS_SetCRT2FIFO_300(SiS_Pr, ModeNo); 5945 #endif 5946 } else { 5947 - #ifdef SIS315H 5948 SiS_SetCRT2FIFO_310(SiS_Pr); 5949 #endif 5950 } ··· 5953 5954 if(SiS_Pr->ChipType < SIS_315H ) { 5955 5956 - #ifdef SIS300 /* ------------- 300 series --------------*/ 5957 5958 temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ 5959 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x08,temp); /* CRT2 Horizontal Total */ ··· 5972 5973 bridgeadd = 12; 5974 5975 - #endif /* SIS300 */ 5976 5977 } else { 5978 5979 - #ifdef SIS315H /* ------------------- 315/330 series --------------- */ 5980 5981 tempcx = SiS_Pr->SiS_VGAHT; /* BTVGA2HT 0x08,0x09 */ 5982 if(modeflag & HalfDCLK) { ··· 6027 } 6028 } 6029 6030 - #endif /* SIS315H */ 6031 6032 } /* 315/330 series */ 6033 ··· 6158 6159 if(SiS_Pr->ChipType < SIS_315H) { 6160 6161 - #ifdef SIS300 /* ---------- 300 series -------------- */ 6162 6163 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6164 temp = 0x20; ··· 6212 6213 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* Panel Link Delay Compensation; (Software Command Reset; Power Saving) */ 6214 6215 - #endif /* SIS300 */ 6216 6217 } else { 6218 6219 - #ifdef SIS315H /* --------------- 315/330 series ---------------*/ 6220 6221 if(SiS_Pr->ChipType < SIS_661) { 6222 ··· 6251 if(modeflag & HalfDCLK) tempax |= 0x40; 6252 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2C,0x3f,tempax); 6253 6254 - #endif /* SIS315H */ 6255 6256 } 6257 ··· 6283 /* SET PART 2 REGISTER GROUP */ 6284 /*********************************************/ 6285 6286 - #ifdef SIS315H 6287 static unsigned char * 6288 SiS_GetGroup2CLVXPtr(struct SiS_Private *SiS_Pr, int tabletype) 6289 { ··· 6380 } 6381 #endif 6382 6383 - #ifdef SIS300 6384 static void 6385 SiS_Group2LCDSpecial(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short crt2crtc) 6386 { ··· 6592 unsigned int longtemp, PhaseIndex; 6593 bool newtvphase; 6594 const unsigned char *TimingPoint; 6595 - #ifdef SIS315H 6596 unsigned short resindex, CRT2Index; 6597 const struct SiS_Part2PortTbl *CRT2Part2Ptr = NULL; 6598 ··· 6971 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x17,0xFB); 6972 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x18,0xDF); 6973 6974 - #ifdef SIS315H 6975 if(SiS_GetCRT2Part2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 6976 &CRT2Index, &resindex)) { 6977 switch(CRT2Index) { ··· 7032 7033 /* Non-expanding: lcdvdes = tempcx = VT-1; lcdvdee = tempbx = VDE-1 */ 7034 7035 - #ifdef SIS_XORG_XF86 7036 - #ifdef TWDEBUG 7037 - xf86DrvMsg(0, X_INFO, "lcdvdes 0x%x lcdvdee 0x%x\n", tempcx, tempbx); 7038 - #endif 7039 - #endif 7040 - 7041 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,tempcx); /* lcdvdes */ 7042 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,tempbx); /* lcdvdee */ 7043 ··· 7080 tempbx = SiS_Pr->CVSyncStart; 7081 } 7082 7083 - #ifdef SIS_XORG_XF86 7084 - #ifdef TWDEBUG 7085 - xf86DrvMsg(0, X_INFO, "lcdvrs 0x%x\n", tempbx); 7086 - #endif 7087 - #endif 7088 - 7089 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,tempbx); /* lcdvrs */ 7090 7091 temp = (tempbx >> 4) & 0xF0; ··· 7091 temp |= (SiS_Pr->CVSyncEnd & 0x0f); 7092 } 7093 7094 - #ifdef SIS_XORG_XF86 7095 - #ifdef TWDEBUG 7096 - xf86DrvMsg(0, X_INFO, "lcdvre[3:0] 0x%x\n", (temp & 0x0f)); 7097 - #endif 7098 - #endif 7099 - 7100 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp); 7101 7102 - #ifdef SIS300 7103 SiS_Group2LCDSpecial(SiS_Pr, ModeNo, crt2crtc); 7104 #endif 7105 ··· 7129 tempax >>= 1; 7130 } 7131 7132 - #ifdef SIS_XORG_XF86 7133 - #ifdef TWDEBUG 7134 - xf86DrvMsg(0, X_INFO, "lcdhdee 0x%x\n", tempbx); 7135 - #endif 7136 - #endif 7137 - 7138 tempbx += bridgeoffset; 7139 7140 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,tempbx); /* lcdhdee */ ··· 7154 tempbx += bridgeoffset; 7155 } 7156 7157 - #ifdef SIS_XORG_XF86 7158 - #ifdef TWDEBUG 7159 - xf86DrvMsg(0, X_INFO, "lcdhrs 0x%x\n", tempbx); 7160 - #endif 7161 - #endif 7162 - 7163 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1C,tempbx); /* lcdhrs */ 7164 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0x0F,((tempbx >> 4) & 0xf0)); 7165 ··· 7172 tempbx += bridgeoffset; 7173 } 7174 7175 - #ifdef SIS_XORG_XF86 7176 - #ifdef TWDEBUG 7177 - xf86DrvMsg(0, X_INFO, "lcdhre 0x%x\n", tempbx); 7178 - #endif 7179 - #endif 7180 - 7181 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x21,tempbx); /* lcdhre */ 7182 7183 SiS_SetGroup2_Tail(SiS_Pr, ModeNo); 7184 7185 - #ifdef SIS300 7186 SiS_Set300Part2Regs(SiS_Pr, ModeIdIndex, RefreshRateTableIndex, ModeNo); 7187 #endif 7188 - #ifdef SIS315H 7189 } /* CRT2-LCD from table */ 7190 #endif 7191 } ··· 7248 /* SET PART 4 REGISTER GROUP */ 7249 /*********************************************/ 7250 7251 - #ifdef SIS315H 7252 #if 0 7253 static void 7254 SiS_ShiftXPos(struct SiS_Private *SiS_Pr, int shift) ··· 7877 7878 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 7879 7880 - #ifdef SIS300 7881 7882 /* Chrontel 7005 - I assume that it does not come with a 315 series chip */ 7883 ··· 7990 7991 /* Chrontel 7019 - assumed that it does not come with a 300 series chip */ 7992 7993 - #ifdef SIS315H 7994 7995 unsigned short temp; 7996 ··· 8041 8042 } 8043 8044 - #ifdef SIS315H /* ----------- 315 series only ---------- */ 8045 8046 void 8047 SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr) ··· 8523 bool 8524 SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) 8525 { 8526 - #ifdef SIS300 8527 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 8528 #endif 8529 unsigned short ModeIdIndex, RefreshRateTableIndex; ··· 8569 SiS_GetLVDSDesData(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8570 } 8571 8572 - #ifdef SIS_XORG_XF86 8573 - #ifdef TWDEBUG 8574 - xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_Pr->SiS_LCDHDES, SiS_Pr->SiS_LCDVDES); 8575 - xf86DrvMsg(0, X_INFO, "(init301: HDE 0x%03x VDE 0x%03x)\n", SiS_Pr->SiS_HDE, SiS_Pr->SiS_VDE); 8576 - xf86DrvMsg(0, X_INFO, "(init301: VGAHDE 0x%03x VGAVDE 0x%03x)\n", SiS_Pr->SiS_VGAHDE, SiS_Pr->SiS_VGAVDE); 8577 - xf86DrvMsg(0, X_INFO, "(init301: HT 0x%03x VT 0x%03x)\n", SiS_Pr->SiS_HT, SiS_Pr->SiS_VT); 8578 - xf86DrvMsg(0, X_INFO, "(init301: VGAHT 0x%03x VGAVT 0x%03x)\n", SiS_Pr->SiS_VGAHT, SiS_Pr->SiS_VGAVT); 8579 - #endif 8580 - #endif 8581 - 8582 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8583 SiS_SetGroup1(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8584 } ··· 8578 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8579 8580 SiS_SetGroup2(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8581 - #ifdef SIS315H 8582 SiS_SetGroup2_C_ELV(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8583 #endif 8584 SiS_SetGroup3(SiS_Pr, ModeNo, ModeIdIndex); 8585 SiS_SetGroup4(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8586 - #ifdef SIS315H 8587 SiS_SetGroup4_C_ELV(SiS_Pr, ModeNo, ModeIdIndex); 8588 #endif 8589 SiS_SetGroup5(SiS_Pr, ModeNo, ModeIdIndex); ··· 8614 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 8615 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 8616 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8617 - #ifdef SIS315H 8618 SiS_SetCH701xForLCD(SiS_Pr); 8619 #endif 8620 } ··· 8627 8628 } 8629 8630 - #ifdef SIS300 8631 if(SiS_Pr->ChipType < SIS_315H) { 8632 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8633 if(SiS_Pr->SiS_UseOEM) { ··· 8650 } 8651 #endif 8652 8653 - #ifdef SIS315H 8654 if(SiS_Pr->ChipType >= SIS_315H) { 8655 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8656 if(SiS_Pr->ChipType < SIS_661) { ··· 8729 } 8730 } 8731 8732 - #ifdef SIS300 8733 static unsigned char * 8734 SiS_SetTrumpBlockLoop(struct SiS_Private *SiS_Pr, unsigned char *dataptr) 8735 { ··· 8779 dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr); 8780 if(!dataptr) return false; 8781 } 8782 - #ifdef SIS_XORG_XF86 8783 - #ifdef TWDEBUG 8784 - xf86DrvMsg(0, X_INFO, "Trumpion block success\n"); 8785 - #endif 8786 - #endif 8787 return true; 8788 } 8789 #endif ··· 8853 SiS_SetChReg(SiS_Pr, reg, val, 0); 8854 } 8855 8856 - #ifdef SIS_LINUX_KERNEL 8857 static 8858 - #endif 8859 void 8860 SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val) 8861 { ··· 8940 8941 /* Read from Chrontel 70xx */ 8942 /* Parameter is [Register no (S7-S0)] */ 8943 - #ifdef SIS_LINUX_KERNEL 8944 static 8945 - #endif 8946 unsigned short 8947 SiS_GetCH70xx(struct SiS_Private *SiS_Pr, unsigned short tempbx) 8948 { ··· 8961 } 8962 8963 /* Our own DDC functions */ 8964 - #ifndef SIS_XORG_XF86 8965 static 8966 - #endif 8967 unsigned short 8968 SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, 8969 unsigned short adaptnum, unsigned short DDCdatatype, bool checkcr32, ··· 9069 9070 SiS_SetupDDCN(SiS_Pr); 9071 9072 - #ifdef SIS_XORG_XF86 9073 - #ifdef TWDEBUG 9074 - xf86DrvMsg(0, X_INFO, "DDC Port %x Index %x Shift %d\n", 9075 - SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index, temp); 9076 - #endif 9077 - #endif 9078 return 0; 9079 } 9080 ··· 9131 SiS_SetSwitchDDC2(SiS_Pr); 9132 if(SiS_PrepareDDC(SiS_Pr)) { 9133 SiS_SetStop(SiS_Pr); 9134 - #ifdef SIS_XORG_XF86 9135 - #ifdef TWDEBUG 9136 - xf86DrvMsg(0, X_INFO, "Probe: Prepare failed\n"); 9137 - #endif 9138 - #endif 9139 return 0xFFFF; 9140 } 9141 mask = 0xf0; ··· 9144 } else { 9145 failed = true; 9146 ret = 0xFFFF; 9147 - #ifdef SIS_XORG_XF86 9148 - #ifdef TWDEBUG 9149 - xf86DrvMsg(0, X_INFO, "Probe: Read 1 failed\n"); 9150 - #endif 9151 - #endif 9152 } 9153 } 9154 if(!failed) { ··· 9153 if(temp == value) ret = 0; 9154 else { 9155 ret = 0xFFFF; 9156 - #ifdef SIS_XORG_XF86 9157 - #ifdef TWDEBUG 9158 - xf86DrvMsg(0, X_INFO, "Probe: Read 2 failed\n"); 9159 - #endif 9160 - #endif 9161 if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { 9162 if(temp == 0x30) ret = 0; 9163 } ··· 9162 return ret; 9163 } 9164 9165 - #ifndef SIS_XORG_XF86 9166 static 9167 - #endif 9168 unsigned short 9169 SiS_ProbeDDC(struct SiS_Private *SiS_Pr) 9170 { ··· 9179 return flag; 9180 } 9181 9182 - #ifndef SIS_XORG_XF86 9183 static 9184 - #endif 9185 unsigned short 9186 SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, unsigned char *buffer) 9187 { ··· 9426 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); 9427 } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog); 9428 if (!watchdog) { 9429 - #ifdef SIS_XORG_XF86 9430 - #ifdef TWDEBUG 9431 - xf86DrvMsg(0, X_INFO, "SetClkHigh failed\n"); 9432 - #endif 9433 - #endif 9434 return 0xFFFF; 9435 } 9436 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); ··· 9456 9457 /* =============== SiS 315/330 O.E.M. ================= */ 9458 9459 - #ifdef SIS315H 9460 9461 static unsigned short 9462 GetRAMDACromptr(struct SiS_Private *SiS_Pr) ··· 10644 10645 /* ================= SiS 300 O.E.M. ================== */ 10646 10647 - #ifdef SIS300 10648 10649 static void 10650 SetOEMLCDData2(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex,
··· 75 76 #include "init301.h" 77 78 + #ifdef CONFIG_FB_SIS_300 79 #include "oem300.h" 80 #endif 81 82 + #ifdef CONFIG_FB_SIS_315 83 #include "oem310.h" 84 #endif 85 ··· 87 #define SiS_I2CDELAYSHORT 150 88 89 static unsigned short SiS_GetBIOSLCDResInfo(struct SiS_Private *SiS_Pr); 90 static void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); 91 92 /*********************************************/ 93 /* HELPER: Lock/Unlock CRT2 */ ··· 106 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24,0x01); 107 } 108 109 static 110 void 111 SiS_LockCRT2(struct SiS_Private *SiS_Pr) 112 { ··· 138 /* HELPER: Get Pointer to LCD structure */ 139 /*********************************************/ 140 141 + #ifdef CONFIG_FB_SIS_315 142 static unsigned char * 143 GetLCDStructPtr661(struct SiS_Private *SiS_Pr) 144 { ··· 404 /* HELPER: GET SOME DATA FROM BIOS ROM */ 405 /*********************************************/ 406 407 + #ifdef CONFIG_FB_SIS_300 408 static bool 409 SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) 410 { ··· 449 SiS_GetReg(SiS_Pr->SiS_P3c4, 0x05); 450 } 451 452 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 453 static void 454 SiS_GenericDelay(struct SiS_Private *SiS_Pr, unsigned short delay) 455 { ··· 457 } 458 #endif 459 460 + #ifdef CONFIG_FB_SIS_315 461 static void 462 SiS_LongDelay(struct SiS_Private *SiS_Pr, unsigned short delay) 463 { ··· 467 } 468 #endif 469 470 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 471 static void 472 SiS_ShortDelay(struct SiS_Private *SiS_Pr, unsigned short delay) 473 { ··· 480 static void 481 SiS_PanelDelay(struct SiS_Private *SiS_Pr, unsigned short DelayTime) 482 { 483 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 484 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 485 unsigned short PanelID, DelayIndex, Delay=0; 486 #endif 487 488 if(SiS_Pr->ChipType < SIS_315H) { 489 490 + #ifdef CONFIG_FB_SIS_300 491 492 PanelID = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36); 493 if(SiS_Pr->SiS_VBType & VB_SISVB) { ··· 513 } 514 SiS_ShortDelay(SiS_Pr, Delay); 515 516 + #endif /* CONFIG_FB_SIS_300 */ 517 518 } else { 519 520 + #ifdef CONFIG_FB_SIS_315 521 522 if((SiS_Pr->ChipType >= SIS_661) || 523 (SiS_Pr->ChipType <= SIS_315PRO) || ··· 579 580 } 581 582 + #endif /* CONFIG_FB_SIS_315 */ 583 584 } 585 } 586 587 + #ifdef CONFIG_FB_SIS_315 588 static void 589 SiS_PanelDelayLoop(struct SiS_Private *SiS_Pr, unsigned short DelayTime, unsigned short DelayLoop) 590 { ··· 613 while((!(SiS_GetRegByte(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog); 614 } 615 616 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 617 static void 618 SiS_WaitRetrace2(struct SiS_Private *SiS_Pr, unsigned short reg) 619 { ··· 630 SiS_WaitVBRetrace(struct SiS_Private *SiS_Pr) 631 { 632 if(SiS_Pr->ChipType < SIS_315H) { 633 + #ifdef CONFIG_FB_SIS_300 634 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 635 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x20)) return; 636 } ··· 641 } 642 #endif 643 } else { 644 + #ifdef CONFIG_FB_SIS_315 645 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x40)) { 646 SiS_WaitRetrace1(SiS_Pr); 647 } else { ··· 686 /* HELPER: MISC */ 687 /*********************************************/ 688 689 + #ifdef CONFIG_FB_SIS_300 690 static bool 691 SiS_Is301B(struct SiS_Private *SiS_Pr) 692 { ··· 708 bool 709 SiS_IsDualEdge(struct SiS_Private *SiS_Pr) 710 { 711 + #ifdef CONFIG_FB_SIS_315 712 if(SiS_Pr->ChipType >= SIS_315H) { 713 if((SiS_Pr->ChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { 714 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return true; ··· 721 bool 722 SiS_IsVAMode(struct SiS_Private *SiS_Pr) 723 { 724 + #ifdef CONFIG_FB_SIS_315 725 unsigned short flag; 726 727 if(SiS_Pr->ChipType >= SIS_315H) { ··· 732 return false; 733 } 734 735 + #ifdef CONFIG_FB_SIS_315 736 static bool 737 SiS_IsVAorLCD(struct SiS_Private *SiS_Pr) 738 { ··· 745 static bool 746 SiS_IsDualLink(struct SiS_Private *SiS_Pr) 747 { 748 + #ifdef CONFIG_FB_SIS_315 749 if(SiS_Pr->ChipType >= SIS_315H) { 750 if((SiS_CRT2IsLCD(SiS_Pr)) || 751 (SiS_IsVAMode(SiS_Pr))) { ··· 756 return false; 757 } 758 759 + #ifdef CONFIG_FB_SIS_315 760 static bool 761 SiS_TVEnabled(struct SiS_Private *SiS_Pr) 762 { ··· 768 } 769 #endif 770 771 + #ifdef CONFIG_FB_SIS_315 772 static bool 773 SiS_LCDAEnabled(struct SiS_Private *SiS_Pr) 774 { ··· 777 } 778 #endif 779 780 + #ifdef CONFIG_FB_SIS_315 781 static bool 782 SiS_WeHaveBacklightCtrl(struct SiS_Private *SiS_Pr) 783 { ··· 788 } 789 #endif 790 791 + #ifdef CONFIG_FB_SIS_315 792 static bool 793 SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) 794 { ··· 804 } 805 #endif 806 807 + #ifdef CONFIG_FB_SIS_315 808 static bool 809 SiS_IsYPbPr(struct SiS_Private *SiS_Pr) 810 { ··· 816 } 817 #endif 818 819 + #ifdef CONFIG_FB_SIS_315 820 static bool 821 SiS_IsChScart(struct SiS_Private *SiS_Pr) 822 { ··· 828 } 829 #endif 830 831 + #ifdef CONFIG_FB_SIS_315 832 static bool 833 SiS_IsTVOrYPbPrOrScart(struct SiS_Private *SiS_Pr) 834 { ··· 848 } 849 #endif 850 851 + #ifdef CONFIG_FB_SIS_315 852 static bool 853 SiS_IsLCDOrLCDA(struct SiS_Private *SiS_Pr) 854 { ··· 914 /*********************************************/ 915 916 /* Setup general purpose IO for Chrontel communication */ 917 + #ifdef CONFIG_FB_SIS_300 918 void 919 SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo) 920 { ··· 923 924 if(!(SiS_Pr->SiS_ChSW)) return; 925 926 acpibase = sisfb_read_lpc_pci_dword(SiS_Pr, 0x74); 927 acpibase &= 0xFFFF; 928 if(!acpibase) return; 929 temp = SiS_GetRegShort((acpibase + 0x3c)); /* ACPI register 0x3c: GP Event 1 I/O mode select */ ··· 969 tempax &= (DriverMode | LoadDACFlag | SetNotSimuMode | SetPALTV); 970 tempbx |= tempax; 971 972 + #ifdef CONFIG_FB_SIS_315 973 if(SiS_Pr->ChipType >= SIS_315H) { 974 if(SiS_Pr->SiS_VBType & VB_SISLCDA) { 975 if(ModeNo == 0x03) { ··· 1019 } 1020 } 1021 1022 + #endif /* CONFIG_FB_SIS_315 */ 1023 1024 if(!(SiS_Pr->SiS_VBType & VB_SISVGA2)) { 1025 tempbx &= ~(SetCRT2ToRAMDAC); ··· 1154 1155 SiS_Pr->SiS_VBInfo = tempbx; 1156 1157 + #ifdef CONFIG_FB_SIS_300 1158 if(SiS_Pr->ChipType == SIS_630) { 1159 SiS_SetChrontelGPIO(SiS_Pr, SiS_Pr->SiS_VBInfo); 1160 } 1161 #endif 1162 1163 #if 0 1164 printk(KERN_DEBUG "sisfb: (init301: VBInfo= 0x%04x, SetFlag=0x%04x)\n", 1165 SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); 1166 #endif 1167 } 1168 ··· 1415 } 1416 1417 SiS_Pr->SiS_VBInfo &= ~SetPALTV; 1418 } 1419 1420 /*********************************************/ ··· 1443 static void 1444 SiS_GetLCDInfoBIOS(struct SiS_Private *SiS_Pr) 1445 { 1446 + #ifdef CONFIG_FB_SIS_315 1447 unsigned char *ROMAddr; 1448 unsigned short temp; 1449 1450 if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) { 1451 if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { ··· 1479 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_A = ROMAddr[19]; 1480 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].SR2C = 1481 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_B = ROMAddr[20]; 1482 1483 } 1484 #endif ··· 1517 { 1518 unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0; 1519 bool panelcanscale = false; 1520 + #ifdef CONFIG_FB_SIS_300 1521 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 1522 static const unsigned char SiS300SeriesLCDRes[] = 1523 { 0, 1, 2, 3, 7, 4, 5, 8, 1524 0, 0, 10, 0, 0, 0, 0, 15 }; 1525 #endif 1526 + #ifdef CONFIG_FB_SIS_315 1527 unsigned char *myptr = NULL; 1528 #endif 1529 ··· 1562 SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1; 1563 } 1564 temp &= 0x0f; 1565 + #ifdef CONFIG_FB_SIS_300 1566 if(SiS_Pr->ChipType < SIS_315H) { 1567 /* Very old BIOSes only know 7 sizes (NetVista 2179, 1.01g) */ 1568 if(SiS_Pr->SiS_VBType & VB_SIS301) { ··· 1574 #endif 1575 1576 /* Translate to our internal types */ 1577 + #ifdef CONFIG_FB_SIS_315 1578 if(SiS_Pr->ChipType == SIS_550) { 1579 if (temp == Panel310_1152x768) temp = Panel_320x240_2; /* Verified working */ 1580 else if(temp == Panel310_320x240_2) temp = Panel_320x240_2; ··· 1597 1598 SiS_Pr->SiS_LCDResInfo = temp; 1599 1600 + #ifdef CONFIG_FB_SIS_300 1601 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1602 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) { 1603 SiS_Pr->SiS_LCDResInfo = Panel_Barco1366; ··· 1639 else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 1640 1641 /* Dual link, Pass 1:1 BIOS default, etc. */ 1642 + #ifdef CONFIG_FB_SIS_315 1643 if(SiS_Pr->ChipType >= SIS_661) { 1644 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 1645 if(temp & 0x08) SiS_Pr->SiS_LCDInfo |= LCDPass11; ··· 2076 } 2077 } 2078 2079 + #ifdef CONFIG_FB_SIS_300 2080 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2081 if(SiS_Pr->SiS_CustomT == CUT_PANEL848 || SiS_Pr->SiS_CustomT == CUT_PANEL856) { 2082 SiS_Pr->SiS_LCDInfo = 0x80 | 0x40 | 0x20; /* neg h/v sync, RGB24(D0 = 0) */ ··· 2186 SiS_Pr->SiS_SetFlag |= LCDVESATiming; 2187 } 2188 2189 #if 0 2190 printk(KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n", 2191 SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo); 2192 #endif 2193 } 2194 ··· 2359 VCLKIndex = SiS_Pr->PanelVCLKIdx315; 2360 } 2361 2362 + #ifdef CONFIG_FB_SIS_300 2363 /* Special Timing: Barco iQ Pro R series */ 2364 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) VCLKIndex = 0x44; 2365 ··· 2410 2411 } 2412 2413 return VCLKIndex; 2414 } 2415 ··· 2428 { 2429 unsigned short i, j, modeflag, tempah=0; 2430 short tempcl; 2431 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 2432 unsigned short tempbl; 2433 #endif 2434 + #ifdef CONFIG_FB_SIS_315 2435 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 2436 unsigned short tempah2, tempbl2; 2437 #endif ··· 2454 2455 if(SiS_Pr->ChipType < SIS_315H) { 2456 2457 + #ifdef CONFIG_FB_SIS_300 /* ---- 300 series ---- */ 2458 2459 /* For 301BDH: (with LCD via LVDS) */ 2460 if(SiS_Pr->SiS_VBType & VB_NoLCD) { ··· 2477 2478 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0xA0; 2479 2480 + #endif /* CONFIG_FB_SIS_300 */ 2481 2482 } else { 2483 2484 + #ifdef CONFIG_FB_SIS_315 /* ------- 315/330 series ------ */ 2485 2486 if(ModeNo > 0x13) { 2487 tempcl -= ModeVGA; ··· 2494 2495 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0x50; 2496 2497 + #endif /* CONFIG_FB_SIS_315 */ 2498 2499 } 2500 ··· 2503 if(SiS_Pr->ChipType < SIS_315H) { 2504 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,tempah); 2505 } else { 2506 + #ifdef CONFIG_FB_SIS_315 2507 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2508 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); 2509 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { ··· 2584 2585 if(SiS_Pr->ChipType >= SIS_315H) { 2586 2587 + #ifdef CONFIG_FB_SIS_315 2588 /* LVDS can only be slave in 8bpp modes */ 2589 tempah = 0x80; 2590 if((modeflag & CRT2Mode) && (SiS_Pr->SiS_ModeType > ModeVGA)) { ··· 2604 2605 } else { 2606 2607 + #ifdef CONFIG_FB_SIS_300 2608 tempah = 0; 2609 if( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) && (SiS_Pr->SiS_ModeType > ModeVGA) ) { 2610 tempah |= 0x02; ··· 2626 2627 if(SiS_Pr->ChipType >= SIS_315H) { 2628 2629 + #ifdef CONFIG_FB_SIS_315 2630 /* unsigned char bridgerev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01); */ 2631 2632 /* The following is nearly unpreditable and varies from machine ··· 2718 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah); 2719 } 2720 2721 + #endif /* CONFIG_FB_SIS_315 */ 2722 2723 } else if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { 2724 2725 + #ifdef CONFIG_FB_SIS_300 2726 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f); 2727 2728 if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) || ··· 2745 2746 } else { /* LVDS */ 2747 2748 + #ifdef CONFIG_FB_SIS_315 2749 if(SiS_Pr->ChipType >= SIS_315H) { 2750 2751 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { ··· 2931 } 2932 } 2933 2934 + #ifdef CONFIG_FB_SIS_315 2935 if(SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) { 2936 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { 2937 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { ··· 3036 case Panel_1280x1024: tempbx = 24; break; 3037 case Panel_1400x1050: tempbx = 26; break; 3038 case Panel_1600x1200: tempbx = 28; break; 3039 + #ifdef CONFIG_FB_SIS_300 3040 case Panel_Barco1366: tempbx = 80; break; 3041 #endif 3042 } ··· 3053 3054 if(SiS_Pr->SiS_LCDInfo & LCDPass11) tempbx = 30; 3055 3056 + #ifdef CONFIG_FB_SIS_300 3057 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) { 3058 tempbx = 82; 3059 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; ··· 3189 3190 if((SiS_Pr->SiS_VBType & VB_SISVB) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3191 3192 + #ifdef CONFIG_FB_SIS_315 3193 SiS_CalcPanelLinkTiming(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 3194 SiS_CalcLCDACRT1Timing(SiS_Pr, ModeNo, ModeIdIndex); 3195 #endif ··· 3214 case 16: LVDSData = SiS_Pr->SiS_LVDS800x600Data_1; break; 3215 case 18: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1; break; 3216 case 20: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break; 3217 + #ifdef CONFIG_FB_SIS_300 3218 case 80: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_1; break; 3219 case 81: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_2; break; 3220 case 82: LVDSData = SiS_Pr->SiS_LVDSBARCO1024Data_1; break; ··· 3248 (SiS_Pr->SiS_SetFlag & SetDOSMode) ) { 3249 SiS_Pr->SiS_HDE = SiS_Pr->PanelXRes; 3250 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes; 3251 + #ifdef CONFIG_FB_SIS_300 3252 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) { 3253 if(ResIndex < 0x08) { 3254 SiS_Pr->SiS_HDE = 1280; ··· 3270 unsigned short resinfo, CRT2Index, ResIndex; 3271 const struct SiS_LCDData *LCDPtr = NULL; 3272 const struct SiS_TVData *TVPtr = NULL; 3273 + #ifdef CONFIG_FB_SIS_315 3274 short resinfo661; 3275 #endif 3276 ··· 3283 } else { 3284 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3285 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 3286 + #ifdef CONFIG_FB_SIS_315 3287 resinfo661 = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].ROMMODEIDX661; 3288 if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && 3289 (SiS_Pr->SiS_SetFlag & LCDVESATiming) && ··· 3460 3461 } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) { 3462 3463 + #ifdef CONFIG_FB_SIS_315 3464 SiS_Pr->SiS_RVBHCMAX = ROMAddr[romptr]; 3465 SiS_Pr->SiS_RVBHCFACT = ROMAddr[romptr+1]; 3466 SiS_Pr->SiS_VGAHT = ROMAddr[romptr+2] | ((ROMAddr[romptr+3] & 0x0f) << 8); ··· 3520 case Panel_1680x1050 : 3521 case Panel_1680x1050 + 32: LCDPtr = SiS_Pr->SiS_LCD1680x1050Data; break; 3522 case 100 : LCDPtr = SiS_Pr->SiS_NoScaleData; break; 3523 + #ifdef CONFIG_FB_SIS_315 3524 case 200 : LCDPtr = SiS310_ExtCompaq1280x1024Data; break; 3525 case 201 : LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data; break; 3526 #endif 3527 default : LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break; 3528 } 3529 3530 SiS_Pr->SiS_RVBHCMAX = (LCDPtr+ResIndex)->RVBHCMAX; 3531 SiS_Pr->SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT; ··· 3624 { 3625 const struct SiS_LVDSDes *PanelDesPtr = NULL; 3626 3627 + #ifdef CONFIG_FB_SIS_300 3628 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 3629 3630 if(SiS_Pr->ChipType < SIS_315H) { ··· 3696 3697 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3698 3699 + #ifdef CONFIG_FB_SIS_315 3700 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3701 /* non-pass 1:1 only, see above */ 3702 if(SiS_Pr->SiS_VGAHDE != SiS_Pr->PanelXRes) { ··· 3771 } else { 3772 3773 if(SiS_Pr->ChipType < SIS_315H) { 3774 + #ifdef CONFIG_FB_SIS_300 3775 switch(SiS_Pr->SiS_LCDResInfo) { 3776 case Panel_800x600: 3777 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) { ··· 3816 } 3817 #endif 3818 } else { 3819 + #ifdef CONFIG_FB_SIS_315 3820 switch(SiS_Pr->SiS_LCDResInfo) { 3821 case Panel_1024x768: 3822 case Panel_1280x1024: ··· 3844 if(SiS_Pr->ChipType < SIS_315H) { 3845 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320; 3846 } else { 3847 + #ifdef CONFIG_FB_SIS_315 3848 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) SiS_Pr->SiS_LCDHDES = 480; 3849 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) SiS_Pr->SiS_LCDHDES = 804; 3850 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) SiS_Pr->SiS_LCDHDES = 704; ··· 3866 /* DISABLE VIDEO BRIDGE */ 3867 /*********************************************/ 3868 3869 + #ifdef CONFIG_FB_SIS_315 3870 static int 3871 SiS_HandlePWD(struct SiS_Private *SiS_Pr) 3872 { ··· 3891 ret = 1; 3892 } 3893 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x27,0x7f,temp); 3894 } 3895 #endif 3896 return ret; ··· 3909 void 3910 SiS_DisableBridge(struct SiS_Private *SiS_Pr) 3911 { 3912 + #ifdef CONFIG_FB_SIS_315 3913 unsigned short tempah, pushax=0, modenum; 3914 #endif 3915 unsigned short temp=0; ··· 3920 3921 if(SiS_Pr->ChipType < SIS_315H) { 3922 3923 + #ifdef CONFIG_FB_SIS_300 /* 300 series */ 3924 3925 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) { 3926 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { ··· 3953 } 3954 } 3955 3956 + #endif /* CONFIG_FB_SIS_300 */ 3957 3958 } else { 3959 3960 + #ifdef CONFIG_FB_SIS_315 /* 315 series */ 3961 3962 int didpwd = 0; 3963 bool custom1 = (SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || ··· 4081 4082 } 4083 4084 + #endif /* CONFIG_FB_SIS_315 */ 4085 4086 } 4087 4088 } else { /* ============ For 301 ================ */ 4089 4090 if(SiS_Pr->ChipType < SIS_315H) { 4091 + #ifdef CONFIG_FB_SIS_300 4092 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) { 4093 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08); 4094 SiS_PanelDelay(SiS_Pr, 3); ··· 4111 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 4112 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp); 4113 } else { 4114 + #ifdef CONFIG_FB_SIS_300 4115 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); /* disable CRT2 */ 4116 if( (!(SiS_CRT2IsLCD(SiS_Pr))) || 4117 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) { ··· 4127 4128 if(SiS_Pr->ChipType < SIS_315H) { 4129 4130 + #ifdef CONFIG_FB_SIS_300 /* 300 series */ 4131 4132 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 4133 SiS_SetCH700x(SiS_Pr,0x0E,0x09); ··· 4171 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04); 4172 } 4173 4174 + #endif /* CONFIG_FB_SIS_300 */ 4175 4176 } else { 4177 4178 + #ifdef CONFIG_FB_SIS_315 /* 315 series */ 4179 4180 if(!(SiS_IsNotM650orLater(SiS_Pr))) { 4181 /*if(SiS_Pr->ChipType < SIS_340) { */ /* XGI needs this */ ··· 4288 } 4289 } 4290 4291 + #endif /* CONFIG_FB_SIS_315 */ 4292 4293 } /* 315 series */ 4294 ··· 4304 * from outside the context of a mode switch! 4305 * MUST call getVBType before calling this 4306 */ 4307 static 4308 void 4309 SiS_EnableBridge(struct SiS_Private *SiS_Pr) 4310 { 4311 unsigned short temp=0, tempah; 4312 + #ifdef CONFIG_FB_SIS_315 4313 unsigned short temp1, pushax=0; 4314 bool delaylong = false; 4315 #endif ··· 4322 4323 if(SiS_Pr->ChipType < SIS_315H) { 4324 4325 + #ifdef CONFIG_FB_SIS_300 /* 300 series */ 4326 4327 if(SiS_CRT2IsLCD(SiS_Pr)) { 4328 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { ··· 4385 } 4386 4387 4388 + #endif /* CONFIG_FB_SIS_300 */ 4389 4390 } else { 4391 4392 + #ifdef CONFIG_FB_SIS_315 /* 315 series */ 4393 4394 #ifdef SET_EMI 4395 unsigned char r30=0, r31=0, r32=0, r33=0, cr36=0; ··· 4688 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); 4689 } 4690 4691 + #endif /* CONFIG_FB_SIS_315 */ 4692 4693 } 4694 ··· 4739 4740 if(SiS_Pr->ChipType < SIS_315H) { 4741 4742 + #ifdef CONFIG_FB_SIS_300 /* 300 series */ 4743 4744 if(SiS_CRT2IsLCD(SiS_Pr)) { 4745 if(SiS_Pr->ChipType == SIS_730) { ··· 4783 } 4784 } 4785 4786 + #endif /* CONFIG_FB_SIS_300 */ 4787 4788 } else { 4789 4790 + #ifdef CONFIG_FB_SIS_315 /* 315 series */ 4791 4792 if(!(SiS_IsNotM650orLater(SiS_Pr))) { 4793 /*if(SiS_Pr->ChipType < SIS_340) {*/ /* XGI needs this */ ··· 4881 } 4882 } 4883 4884 + #endif /* CONFIG_FB_SIS_315 */ 4885 4886 } /* 310 series */ 4887 ··· 4971 4972 if(SiS_Pr->ChipType < SIS_315H) { 4973 4974 + #ifdef CONFIG_FB_SIS_300 /* ---- 300 series --- */ 4975 4976 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { /* 630 - 301B(-DH) */ 4977 ··· 5000 5001 } 5002 5003 + #endif /* CONFIG_FB_SIS_300 */ 5004 5005 } else { 5006 5007 + #ifdef CONFIG_FB_SIS_315 /* ------- 315 series ------ */ 5008 5009 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { /* 315 - LVDS */ 5010 ··· 5076 } 5077 5078 } 5079 + #endif /* CONFIG_FB_SIS_315 */ 5080 } 5081 } 5082 } 5083 5084 /* Set CRT2 FIFO on 300/540/630/730 */ 5085 + #ifdef CONFIG_FB_SIS_300 5086 static void 5087 SiS_SetCRT2FIFO_300(struct SiS_Private *SiS_Pr,unsigned short ModeNo) 5088 { ··· 5154 5155 } else { 5156 5157 pci50 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50); 5158 pciA0 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xa0); 5159 5160 if(SiS_Pr->ChipType == SIS_730) { 5161 ··· 5262 #endif 5263 5264 /* Set CRT2 FIFO on 315/330 series */ 5265 + #ifdef CONFIG_FB_SIS_315 5266 static void 5267 SiS_SetCRT2FIFO_310(struct SiS_Private *SiS_Pr) 5268 { ··· 5420 5421 temp = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)); 5422 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1b,temp); /* ? */ 5423 } 5424 5425 /* Setup panel link ··· 5455 unsigned short push2, tempax, tempbx, tempcx, temp; 5456 unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0; 5457 bool islvds = false, issis = false, chkdclkfirst = false; 5458 + #ifdef CONFIG_FB_SIS_300 5459 unsigned short crt2crtc = 0; 5460 #endif 5461 + #ifdef CONFIG_FB_SIS_315 5462 unsigned short pushcx; 5463 #endif 5464 5465 if(ModeNo <= 0x13) { 5466 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 5467 resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; 5468 + #ifdef CONFIG_FB_SIS_300 5469 crt2crtc = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 5470 #endif 5471 } else if(SiS_Pr->UseCustomMode) { ··· 5473 } else { 5474 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 5475 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 5476 + #ifdef CONFIG_FB_SIS_300 5477 crt2crtc = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 5478 #endif 5479 } ··· 5494 } 5495 } 5496 5497 + #ifdef CONFIG_FB_SIS_315 5498 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 5499 if(IS_SIS330) { 5500 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10); ··· 5744 5745 if(SiS_Pr->ChipType < SIS_315H) { 5746 5747 + #ifdef CONFIG_FB_SIS_300 /* 300 series */ 5748 tempeax = SiS_Pr->SiS_VGAVDE << 6; 5749 temp = (tempeax % (unsigned int)SiS_Pr->SiS_VDE); 5750 tempeax = tempeax / (unsigned int)SiS_Pr->SiS_VDE; ··· 5755 temp = (unsigned short)(tempeax & 0x00FF); 5756 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1E,temp); /* BPLVCFACT */ 5757 tempvcfact = temp; 5758 + #endif /* CONFIG_FB_SIS_300 */ 5759 5760 } else { 5761 5762 + #ifdef CONFIG_FB_SIS_315 /* 315 series */ 5763 tempeax = SiS_Pr->SiS_VGAVDE << 18; 5764 tempebx = SiS_Pr->SiS_VDE; 5765 temp = (tempeax % tempebx); ··· 5845 temp = (unsigned short)(tempecx & 0x00FF); 5846 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x23,temp); 5847 5848 + #ifdef CONFIG_FB_SIS_315 5849 if(SiS_Pr->ChipType >= SIS_315H) { 5850 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 5851 if((islvds) || (SiS_Pr->SiS_VBInfo & VB_SISLVDS)) { ··· 5863 } 5864 #endif 5865 5866 + #ifdef CONFIG_FB_SIS_300 5867 if(SiS_Pr->SiS_IF_DEF_TRUMPION) { 5868 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 5869 unsigned char *trumpdata; ··· 5899 } 5900 #endif 5901 5902 + #ifdef CONFIG_FB_SIS_315 5903 if(SiS_Pr->SiS_IF_DEF_FSTN || SiS_Pr->SiS_IF_DEF_DSTN) { 5904 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x25,0x00); 5905 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x26,0x00); ··· 5999 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x45,0x0a); 6000 } 6001 } 6002 + #endif /* CONFIG_FB_SIS_315 */ 6003 } 6004 6005 /* Set Part 1 */ ··· 6007 SiS_SetGroup1(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, 6008 unsigned short RefreshRateTableIndex) 6009 { 6010 + #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 6011 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 6012 #endif 6013 unsigned short temp=0, tempax=0, tempbx=0, tempcx=0, bridgeadd=0; 6014 unsigned short pushbx=0, CRT1Index=0, modeflag, resinfo=0; 6015 + #ifdef CONFIG_FB_SIS_315 6016 unsigned short tempbl=0; 6017 #endif 6018 ··· 6038 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ) { 6039 6040 if(SiS_Pr->ChipType < SIS_315H ) { 6041 + #ifdef CONFIG_FB_SIS_300 6042 SiS_SetCRT2FIFO_300(SiS_Pr, ModeNo); 6043 #endif 6044 } else { 6045 + #ifdef CONFIG_FB_SIS_315 6046 SiS_SetCRT2FIFO_310(SiS_Pr); 6047 #endif 6048 } ··· 6051 6052 if(SiS_Pr->ChipType < SIS_315H ) { 6053 6054 + #ifdef CONFIG_FB_SIS_300 /* ------------- 300 series --------------*/ 6055 6056 temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ 6057 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x08,temp); /* CRT2 Horizontal Total */ ··· 6070 6071 bridgeadd = 12; 6072 6073 + #endif /* CONFIG_FB_SIS_300 */ 6074 6075 } else { 6076 6077 + #ifdef CONFIG_FB_SIS_315 /* ------------------- 315/330 series --------------- */ 6078 6079 tempcx = SiS_Pr->SiS_VGAHT; /* BTVGA2HT 0x08,0x09 */ 6080 if(modeflag & HalfDCLK) { ··· 6125 } 6126 } 6127 6128 + #endif /* CONFIG_FB_SIS_315 */ 6129 6130 } /* 315/330 series */ 6131 ··· 6256 6257 if(SiS_Pr->ChipType < SIS_315H) { 6258 6259 + #ifdef CONFIG_FB_SIS_300 /* ---------- 300 series -------------- */ 6260 6261 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6262 temp = 0x20; ··· 6310 6311 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* Panel Link Delay Compensation; (Software Command Reset; Power Saving) */ 6312 6313 + #endif /* CONFIG_FB_SIS_300 */ 6314 6315 } else { 6316 6317 + #ifdef CONFIG_FB_SIS_315 /* --------------- 315/330 series ---------------*/ 6318 6319 if(SiS_Pr->ChipType < SIS_661) { 6320 ··· 6349 if(modeflag & HalfDCLK) tempax |= 0x40; 6350 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2C,0x3f,tempax); 6351 6352 + #endif /* CONFIG_FB_SIS_315 */ 6353 6354 } 6355 ··· 6381 /* SET PART 2 REGISTER GROUP */ 6382 /*********************************************/ 6383 6384 + #ifdef CONFIG_FB_SIS_315 6385 static unsigned char * 6386 SiS_GetGroup2CLVXPtr(struct SiS_Private *SiS_Pr, int tabletype) 6387 { ··· 6478 } 6479 #endif 6480 6481 + #ifdef CONFIG_FB_SIS_300 6482 static void 6483 SiS_Group2LCDSpecial(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short crt2crtc) 6484 { ··· 6690 unsigned int longtemp, PhaseIndex; 6691 bool newtvphase; 6692 const unsigned char *TimingPoint; 6693 + #ifdef CONFIG_FB_SIS_315 6694 unsigned short resindex, CRT2Index; 6695 const struct SiS_Part2PortTbl *CRT2Part2Ptr = NULL; 6696 ··· 7069 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x17,0xFB); 7070 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x18,0xDF); 7071 7072 + #ifdef CONFIG_FB_SIS_315 7073 if(SiS_GetCRT2Part2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 7074 &CRT2Index, &resindex)) { 7075 switch(CRT2Index) { ··· 7130 7131 /* Non-expanding: lcdvdes = tempcx = VT-1; lcdvdee = tempbx = VDE-1 */ 7132 7133 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,tempcx); /* lcdvdes */ 7134 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,tempbx); /* lcdvdee */ 7135 ··· 7184 tempbx = SiS_Pr->CVSyncStart; 7185 } 7186 7187 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,tempbx); /* lcdvrs */ 7188 7189 temp = (tempbx >> 4) & 0xF0; ··· 7201 temp |= (SiS_Pr->CVSyncEnd & 0x0f); 7202 } 7203 7204 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp); 7205 7206 + #ifdef CONFIG_FB_SIS_300 7207 SiS_Group2LCDSpecial(SiS_Pr, ModeNo, crt2crtc); 7208 #endif 7209 ··· 7245 tempax >>= 1; 7246 } 7247 7248 tempbx += bridgeoffset; 7249 7250 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,tempbx); /* lcdhdee */ ··· 7276 tempbx += bridgeoffset; 7277 } 7278 7279 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1C,tempbx); /* lcdhrs */ 7280 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0x0F,((tempbx >> 4) & 0xf0)); 7281 ··· 7300 tempbx += bridgeoffset; 7301 } 7302 7303 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x21,tempbx); /* lcdhre */ 7304 7305 SiS_SetGroup2_Tail(SiS_Pr, ModeNo); 7306 7307 + #ifdef CONFIG_FB_SIS_300 7308 SiS_Set300Part2Regs(SiS_Pr, ModeIdIndex, RefreshRateTableIndex, ModeNo); 7309 #endif 7310 + #ifdef CONFIG_FB_SIS_315 7311 } /* CRT2-LCD from table */ 7312 #endif 7313 } ··· 7382 /* SET PART 4 REGISTER GROUP */ 7383 /*********************************************/ 7384 7385 + #ifdef CONFIG_FB_SIS_315 7386 #if 0 7387 static void 7388 SiS_ShiftXPos(struct SiS_Private *SiS_Pr, int shift) ··· 8011 8012 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 8013 8014 + #ifdef CONFIG_FB_SIS_300 8015 8016 /* Chrontel 7005 - I assume that it does not come with a 315 series chip */ 8017 ··· 8124 8125 /* Chrontel 7019 - assumed that it does not come with a 300 series chip */ 8126 8127 + #ifdef CONFIG_FB_SIS_315 8128 8129 unsigned short temp; 8130 ··· 8175 8176 } 8177 8178 + #ifdef CONFIG_FB_SIS_315 /* ----------- 315 series only ---------- */ 8179 8180 void 8181 SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr) ··· 8657 bool 8658 SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) 8659 { 8660 + #ifdef CONFIG_FB_SIS_300 8661 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; 8662 #endif 8663 unsigned short ModeIdIndex, RefreshRateTableIndex; ··· 8703 SiS_GetLVDSDesData(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8704 } 8705 8706 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8707 SiS_SetGroup1(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8708 } ··· 8722 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8723 8724 SiS_SetGroup2(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8725 + #ifdef CONFIG_FB_SIS_315 8726 SiS_SetGroup2_C_ELV(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8727 #endif 8728 SiS_SetGroup3(SiS_Pr, ModeNo, ModeIdIndex); 8729 SiS_SetGroup4(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8730 + #ifdef CONFIG_FB_SIS_315 8731 SiS_SetGroup4_C_ELV(SiS_Pr, ModeNo, ModeIdIndex); 8732 #endif 8733 SiS_SetGroup5(SiS_Pr, ModeNo, ModeIdIndex); ··· 8758 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 8759 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 8760 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8761 + #ifdef CONFIG_FB_SIS_315 8762 SiS_SetCH701xForLCD(SiS_Pr); 8763 #endif 8764 } ··· 8771 8772 } 8773 8774 + #ifdef CONFIG_FB_SIS_300 8775 if(SiS_Pr->ChipType < SIS_315H) { 8776 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8777 if(SiS_Pr->SiS_UseOEM) { ··· 8794 } 8795 #endif 8796 8797 + #ifdef CONFIG_FB_SIS_315 8798 if(SiS_Pr->ChipType >= SIS_315H) { 8799 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8800 if(SiS_Pr->ChipType < SIS_661) { ··· 8873 } 8874 } 8875 8876 + #ifdef CONFIG_FB_SIS_300 8877 static unsigned char * 8878 SiS_SetTrumpBlockLoop(struct SiS_Private *SiS_Pr, unsigned char *dataptr) 8879 { ··· 8923 dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr); 8924 if(!dataptr) return false; 8925 } 8926 return true; 8927 } 8928 #endif ··· 9002 SiS_SetChReg(SiS_Pr, reg, val, 0); 9003 } 9004 9005 static 9006 void 9007 SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val) 9008 { ··· 9091 9092 /* Read from Chrontel 70xx */ 9093 /* Parameter is [Register no (S7-S0)] */ 9094 static 9095 unsigned short 9096 SiS_GetCH70xx(struct SiS_Private *SiS_Pr, unsigned short tempbx) 9097 { ··· 9114 } 9115 9116 /* Our own DDC functions */ 9117 static 9118 unsigned short 9119 SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, 9120 unsigned short adaptnum, unsigned short DDCdatatype, bool checkcr32, ··· 9224 9225 SiS_SetupDDCN(SiS_Pr); 9226 9227 return 0; 9228 } 9229 ··· 9292 SiS_SetSwitchDDC2(SiS_Pr); 9293 if(SiS_PrepareDDC(SiS_Pr)) { 9294 SiS_SetStop(SiS_Pr); 9295 return 0xFFFF; 9296 } 9297 mask = 0xf0; ··· 9310 } else { 9311 failed = true; 9312 ret = 0xFFFF; 9313 } 9314 } 9315 if(!failed) { ··· 9324 if(temp == value) ret = 0; 9325 else { 9326 ret = 0xFFFF; 9327 if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { 9328 if(temp == 0x30) ret = 0; 9329 } ··· 9338 return ret; 9339 } 9340 9341 static 9342 unsigned short 9343 SiS_ProbeDDC(struct SiS_Private *SiS_Pr) 9344 { ··· 9357 return flag; 9358 } 9359 9360 static 9361 unsigned short 9362 SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, unsigned char *buffer) 9363 { ··· 9606 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); 9607 } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog); 9608 if (!watchdog) { 9609 return 0xFFFF; 9610 } 9611 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); ··· 9641 9642 /* =============== SiS 315/330 O.E.M. ================= */ 9643 9644 + #ifdef CONFIG_FB_SIS_315 9645 9646 static unsigned short 9647 GetRAMDACromptr(struct SiS_Private *SiS_Pr) ··· 10829 10830 /* ================= SiS 300 O.E.M. ================== */ 10831 10832 + #ifdef CONFIG_FB_SIS_300 10833 10834 static void 10835 SetOEMLCDData2(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex,
+7 -36
drivers/video/sis/init301.h
··· 53 #ifndef _INIT301_H_ 54 #define _INIT301_H_ 55 56 - #include "osdef.h" 57 #include "initdef.h" 58 59 - #ifdef SIS_XORG_XF86 60 - #include "sis.h" 61 - #include "sis_regs.h" 62 - #endif 63 - 64 - #ifdef SIS_LINUX_KERNEL 65 #include "vgatypes.h" 66 #include "vstruct.h" 67 #ifdef SIS_CP ··· 65 #include <linux/fb.h> 66 #include "sis.h" 67 #include <video/sisfb.h> 68 - #endif 69 70 static const unsigned char SiS_YPbPrTable[3][64] = { 71 { ··· 229 0xFF,0xFF, 230 }; 231 232 - #ifdef SIS315H 233 /* 661 et al LCD data structure (2.03.00) */ 234 static const unsigned char SiS_LCDStruct661[] = { 235 /* 1024x768 */ ··· 271 }; 272 #endif 273 274 - #ifdef SIS300 275 static unsigned char SiS300_TrumpionData[14][80] = { 276 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, 277 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23, ··· 348 #endif 349 350 void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); 351 - #ifndef SIS_LINUX_KERNEL 352 - void SiS_LockCRT2(struct SiS_Private *SiS_Pr); 353 - #endif 354 void SiS_EnableCRT2(struct SiS_Private *SiS_Pr); 355 unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); 356 void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); ··· 364 unsigned short RefreshRateTableIndex); 365 unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex); 366 void SiS_DisableBridge(struct SiS_Private *SiS_Pr); 367 - #ifndef SIS_LINUX_KERNEL 368 - void SiS_EnableBridge(struct SiS_Private *SiS_Pr); 369 - #endif 370 bool SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo); 371 void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); 372 void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); ··· 372 unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); 373 void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); 374 unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax); 375 - #ifndef SIS_LINUX_KERNEL 376 - void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); 377 - unsigned short SiS_GetCH70xx(struct SiS_Private *SiS_Pr, unsigned short tempax); 378 - #endif 379 void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg, 380 unsigned char orval,unsigned short andval); 381 - #ifdef SIS315H 382 static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr); 383 static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr); 384 static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr); ··· 383 void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); 384 #endif /* 315 */ 385 386 - #ifdef SIS300 387 static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); 388 void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); 389 #endif ··· 394 unsigned short adaptnum, unsigned short DDCdatatype, 395 unsigned char *buffer, unsigned int VBFlags2); 396 397 - #ifdef SIS_XORG_XF86 398 - unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, 399 - int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, 400 - bool checkcr32, unsigned int VBFlags2); 401 - unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); 402 - unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, 403 - unsigned char *buffer); 404 - #else 405 static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, 406 int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, 407 bool checkcr32, unsigned int VBFlags2); 408 static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); 409 static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, 410 unsigned char *buffer); 411 - #endif 412 static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr); 413 static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr); 414 static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr); ··· 414 static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno); 415 static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr); 416 417 - #ifdef SIS300 418 static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr, 419 unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex); 420 static void SetOEMLCDData2(struct SiS_Private *SiS_Pr, 421 unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex); 422 #endif 423 - #ifdef SIS315H 424 static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr, 425 unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI); 426 static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr, ··· 455 extern void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); 456 extern unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); 457 extern unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); 458 - #ifdef SIS300 459 extern void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *tempbx, 460 unsigned short *tempcl); 461 extern unsigned short SiS_GetFIFOThresholdB300(unsigned short tempbx, unsigned short tempcl); 462 extern unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index); 463 - #ifdef SIS_LINUX_KERNEL 464 extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); 465 extern unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg); 466 - #endif 467 #endif 468 469 #endif
··· 53 #ifndef _INIT301_H_ 54 #define _INIT301_H_ 55 56 #include "initdef.h" 57 58 #include "vgatypes.h" 59 #include "vstruct.h" 60 #ifdef SIS_CP ··· 72 #include <linux/fb.h> 73 #include "sis.h" 74 #include <video/sisfb.h> 75 76 static const unsigned char SiS_YPbPrTable[3][64] = { 77 { ··· 237 0xFF,0xFF, 238 }; 239 240 + #ifdef CONFIG_FB_SIS_315 241 /* 661 et al LCD data structure (2.03.00) */ 242 static const unsigned char SiS_LCDStruct661[] = { 243 /* 1024x768 */ ··· 279 }; 280 #endif 281 282 + #ifdef CONFIG_FB_SIS_300 283 static unsigned char SiS300_TrumpionData[14][80] = { 284 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, 285 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23, ··· 356 #endif 357 358 void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); 359 void SiS_EnableCRT2(struct SiS_Private *SiS_Pr); 360 unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); 361 void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); ··· 375 unsigned short RefreshRateTableIndex); 376 unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex); 377 void SiS_DisableBridge(struct SiS_Private *SiS_Pr); 378 bool SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo); 379 void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); 380 void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); ··· 386 unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); 387 void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); 388 unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax); 389 void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg, 390 unsigned char orval,unsigned short andval); 391 + #ifdef CONFIG_FB_SIS_315 392 static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr); 393 static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr); 394 static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr); ··· 401 void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); 402 #endif /* 315 */ 403 404 + #ifdef CONFIG_FB_SIS_300 405 static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); 406 void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); 407 #endif ··· 412 unsigned short adaptnum, unsigned short DDCdatatype, 413 unsigned char *buffer, unsigned int VBFlags2); 414 415 static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, 416 int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, 417 bool checkcr32, unsigned int VBFlags2); 418 static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); 419 static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, 420 unsigned char *buffer); 421 static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr); 422 static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr); 423 static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr); ··· 441 static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno); 442 static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr); 443 444 + #ifdef CONFIG_FB_SIS_300 445 static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr, 446 unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex); 447 static void SetOEMLCDData2(struct SiS_Private *SiS_Pr, 448 unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex); 449 #endif 450 + #ifdef CONFIG_FB_SIS_315 451 static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr, 452 unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI); 453 static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr, ··· 482 extern void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); 483 extern unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); 484 extern unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); 485 + #ifdef CONFIG_FB_SIS_300 486 extern void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *tempbx, 487 unsigned short *tempcl); 488 extern unsigned short SiS_GetFIFOThresholdB300(unsigned short tempbx, unsigned short tempcl); 489 extern unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index); 490 extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); 491 extern unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg); 492 #endif 493 494 #endif
+3 -4
drivers/video/sis/initextlfb.c
··· 25 * Author: Thomas Winischhofer <thomas@winischhofer.net> 26 */ 27 28 - #include "osdef.h" 29 #include "initdef.h" 30 #include "vgatypes.h" 31 #include "vstruct.h" ··· 58 59 if(rateindex > 0) rateindex--; 60 61 - #ifdef SIS315H 62 switch(ModeNo) { 63 case 0x5a: ModeNo = 0x50; break; 64 case 0x5b: ModeNo = 0x56; ··· 102 103 if(rateindex > 0) rateindex--; 104 105 - #ifdef SIS315H 106 switch(ModeNo) { 107 case 0x5a: ModeNo = 0x50; break; 108 case 0x5b: ModeNo = 0x56; ··· 186 187 if(rateindex > 0) rateindex--; 188 189 - #ifdef SIS315H 190 switch(ModeNo) { 191 case 0x5a: ModeNo = 0x50; break; 192 case 0x5b: ModeNo = 0x56;
··· 25 * Author: Thomas Winischhofer <thomas@winischhofer.net> 26 */ 27 28 #include "initdef.h" 29 #include "vgatypes.h" 30 #include "vstruct.h" ··· 59 60 if(rateindex > 0) rateindex--; 61 62 + #ifdef CONFIG_FB_SIS_315 63 switch(ModeNo) { 64 case 0x5a: ModeNo = 0x50; break; 65 case 0x5b: ModeNo = 0x56; ··· 103 104 if(rateindex > 0) rateindex--; 105 106 + #ifdef CONFIG_FB_SIS_315 107 switch(ModeNo) { 108 case 0x5a: ModeNo = 0x50; break; 109 case 0x5b: ModeNo = 0x56; ··· 187 188 if(rateindex > 0) rateindex--; 189 190 + #ifdef CONFIG_FB_SIS_315 191 switch(ModeNo) { 192 case 0x5a: ModeNo = 0x50; break; 193 case 0x5b: ModeNo = 0x56;
-133
drivers/video/sis/osdef.h
··· 1 - /* $XFree86$ */ 2 - /* $XdotOrg$ */ 3 - /* 4 - * OS depending defines 5 - * 6 - * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria 7 - * 8 - * If distributed as part of the Linux kernel, the following license terms 9 - * apply: 10 - * 11 - * * This program is free software; you can redistribute it and/or modify 12 - * * it under the terms of the GNU General Public License as published by 13 - * * the Free Software Foundation; either version 2 of the named License, 14 - * * or any later version. 15 - * * 16 - * * This program is distributed in the hope that it will be useful, 17 - * * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 - * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 - * * GNU General Public License for more details. 20 - * * 21 - * * You should have received a copy of the GNU General Public License 22 - * * along with this program; if not, write to the Free Software 23 - * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 24 - * 25 - * Otherwise, the following license terms apply: 26 - * 27 - * * Redistribution and use in source and binary forms, with or without 28 - * * modification, are permitted provided that the following conditions 29 - * * are met: 30 - * * 1) Redistributions of source code must retain the above copyright 31 - * * notice, this list of conditions and the following disclaimer. 32 - * * 2) Redistributions in binary form must reproduce the above copyright 33 - * * notice, this list of conditions and the following disclaimer in the 34 - * * documentation and/or other materials provided with the distribution. 35 - * * 3) The name of the author may not be used to endorse or promote products 36 - * * derived from this software without specific prior written permission. 37 - * * 38 - * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 39 - * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 - * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 - * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 42 - * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 43 - * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 44 - * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 45 - * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 46 - * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 47 - * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 - * 49 - * Author: Thomas Winischhofer <thomas@winischhofer.net> 50 - * Silicon Integrated Systems, Inc. (used by permission) 51 - * 52 - */ 53 - 54 - #ifndef _SIS_OSDEF_H_ 55 - #define _SIS_OSDEF_H_ 56 - 57 - /* The choices are: */ 58 - #define SIS_LINUX_KERNEL /* Linux kernel framebuffer */ 59 - #undef SIS_XORG_XF86 /* XFree86/X.org */ 60 - 61 - #ifdef OutPortByte 62 - #undef OutPortByte 63 - #endif 64 - 65 - #ifdef OutPortWord 66 - #undef OutPortWord 67 - #endif 68 - 69 - #ifdef OutPortLong 70 - #undef OutPortLong 71 - #endif 72 - 73 - #ifdef InPortByte 74 - #undef InPortByte 75 - #endif 76 - 77 - #ifdef InPortWord 78 - #undef InPortWord 79 - #endif 80 - 81 - #ifdef InPortLong 82 - #undef InPortLong 83 - #endif 84 - 85 - /**********************************************************************/ 86 - /* LINUX KERNEL */ 87 - /**********************************************************************/ 88 - 89 - #ifdef SIS_LINUX_KERNEL 90 - 91 - #ifdef CONFIG_FB_SIS_300 92 - #define SIS300 93 - #endif 94 - 95 - #ifdef CONFIG_FB_SIS_315 96 - #define SIS315H 97 - #endif 98 - 99 - #if !defined(SIS300) && !defined(SIS315H) 100 - #warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set 101 - #warning sisfb will not work! 102 - #endif 103 - 104 - #define OutPortByte(p,v) outb((u8)(v),(SISIOADDRESS)(p)) 105 - #define OutPortWord(p,v) outw((u16)(v),(SISIOADDRESS)(p)) 106 - #define OutPortLong(p,v) outl((u32)(v),(SISIOADDRESS)(p)) 107 - #define InPortByte(p) inb((SISIOADDRESS)(p)) 108 - #define InPortWord(p) inw((SISIOADDRESS)(p)) 109 - #define InPortLong(p) inl((SISIOADDRESS)(p)) 110 - #define SiS_SetMemory(MemoryAddress,MemorySize,value) memset_io(MemoryAddress, value, MemorySize) 111 - 112 - #endif /* LINUX_KERNEL */ 113 - 114 - /**********************************************************************/ 115 - /* XFree86/X.org */ 116 - /**********************************************************************/ 117 - 118 - #ifdef SIS_XORG_XF86 119 - 120 - #define SIS300 121 - #define SIS315H 122 - 123 - #define OutPortByte(p,v) outSISREG((IOADDRESS)(p),(CARD8)(v)) 124 - #define OutPortWord(p,v) outSISREGW((IOADDRESS)(p),(CARD16)(v)) 125 - #define OutPortLong(p,v) outSISREGL((IOADDRESS)(p),(CARD32)(v)) 126 - #define InPortByte(p) inSISREG((IOADDRESS)(p)) 127 - #define InPortWord(p) inSISREGW((IOADDRESS)(p)) 128 - #define InPortLong(p) inSISREGL((IOADDRESS)(p)) 129 - #define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize) 130 - 131 - #endif /* XF86 */ 132 - 133 - #endif /* _OSDEF_H_ */
···
-1
drivers/video/sis/sis.h
··· 24 #ifndef _SIS_H_ 25 #define _SIS_H_ 26 27 - #include "osdef.h" 28 #include <video/sisfb.h> 29 30 #include "vgatypes.h"
··· 24 #ifndef _SIS_H_ 25 #define _SIS_H_ 26 27 #include <video/sisfb.h> 28 29 #include "vgatypes.h"
+5 -25
drivers/video/sis/sis_main.c
··· 60 #include "sis.h" 61 #include "sis_main.h" 62 63 static void sisfb_handle_command(struct sis_video_info *ivideo, 64 struct sisfb_cmd *sisfb_command); 65 ··· 4119 if(sisfb_check_rom(rom_base, ivideo)) { 4120 4121 if((myrombase = vmalloc(65536))) { 4122 - 4123 - /* Work around bug in pci/rom.c: Folks forgot to check 4124 - * whether the size retrieved from the BIOS image eventually 4125 - * is larger than the mapped size 4126 - */ 4127 - if(pci_resource_len(pdev, PCI_ROM_RESOURCE) < romsize) 4128 - romsize = pci_resource_len(pdev, PCI_ROM_RESOURCE); 4129 - 4130 memcpy_fromio(myrombase, rom_base, 4131 (romsize > 65536) ? 65536 : romsize); 4132 } ··· 4151 break; 4152 4153 } 4154 - 4155 - #else 4156 - 4157 - pci_read_config_dword(pdev, PCI_ROM_ADDRESS, &temp); 4158 - pci_write_config_dword(pdev, PCI_ROM_ADDRESS, 4159 - (ivideo->video_base & PCI_ROM_ADDRESS_MASK) | PCI_ROM_ADDRESS_ENABLE); 4160 - 4161 - rom_base = ioremap(ivideo->video_base, 65536); 4162 - if(rom_base) { 4163 - if(sisfb_check_rom(rom_base, ivideo)) { 4164 - if((myrombase = vmalloc(65536))) 4165 - memcpy_fromio(myrombase, rom_base, 65536); 4166 - } 4167 - iounmap(rom_base); 4168 - } 4169 - 4170 - pci_write_config_dword(pdev, PCI_ROM_ADDRESS, temp); 4171 4172 #endif 4173
··· 60 #include "sis.h" 61 #include "sis_main.h" 62 63 + #if !defined(CONFIG_FB_SIS_300) && !defined(CONFIG_FB_SIS_315) 64 + #warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set 65 + #warning sisfb will not work! 66 + #endif 67 + 68 static void sisfb_handle_command(struct sis_video_info *ivideo, 69 struct sisfb_cmd *sisfb_command); 70 ··· 4114 if(sisfb_check_rom(rom_base, ivideo)) { 4115 4116 if((myrombase = vmalloc(65536))) { 4117 memcpy_fromio(myrombase, rom_base, 4118 (romsize > 65536) ? 65536 : romsize); 4119 } ··· 4154 break; 4155 4156 } 4157 4158 #endif 4159
-11
drivers/video/sis/vgatypes.h
··· 55 56 #define SISIOMEMTYPE 57 58 - #ifdef SIS_LINUX_KERNEL 59 typedef unsigned long SISIOADDRESS; 60 #include <linux/types.h> /* Need __iomem */ 61 #undef SISIOMEMTYPE 62 #define SISIOMEMTYPE __iomem 63 - #endif 64 - 65 - #ifdef SIS_XORG_XF86 66 - #if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,0,0,0) 67 - typedef unsigned long IOADDRESS; 68 - typedef unsigned long SISIOADDRESS; 69 - #else 70 - typedef IOADDRESS SISIOADDRESS; 71 - #endif 72 - #endif 73 74 typedef enum _SIS_CHIP_TYPE { 75 SIS_VGALegacy = 0,
··· 55 56 #define SISIOMEMTYPE 57 58 typedef unsigned long SISIOADDRESS; 59 #include <linux/types.h> /* Need __iomem */ 60 #undef SISIOMEMTYPE 61 #define SISIOMEMTYPE __iomem 62 63 typedef enum _SIS_CHIP_TYPE { 64 SIS_VGALegacy = 0,
-12
drivers/video/sis/vstruct.h
··· 233 { 234 unsigned char ChipType; 235 unsigned char ChipRevision; 236 - #ifdef SIS_XORG_XF86 237 - PCITAG PciTag; 238 - #endif 239 - #ifdef SIS_LINUX_KERNEL 240 void *ivideo; 241 - #endif 242 unsigned char *VirtualRomBase; 243 bool UseROM; 244 - #ifdef SIS_LINUX_KERNEL 245 unsigned char SISIOMEMTYPE *VideoMemoryAddress; 246 unsigned int VideoMemorySize; 247 - #endif 248 SISIOADDRESS IOAddress; 249 SISIOADDRESS IOAddress2; /* For dual chip XGI volari */ 250 251 - #ifdef SIS_LINUX_KERNEL 252 SISIOADDRESS RelIO; 253 - #endif 254 SISIOADDRESS SiS_P3c4; 255 SISIOADDRESS SiS_P3d4; 256 SISIOADDRESS SiS_P3c0; ··· 271 unsigned short SiS_IF_DEF_FSTN; 272 unsigned short SiS_SysFlags; 273 unsigned char SiS_VGAINFO; 274 - #ifdef SIS_XORG_XF86 275 - unsigned short SiS_CP1, SiS_CP2, SiS_CP3, SiS_CP4; 276 - #endif 277 bool SiS_UseROM; 278 bool SiS_ROMNew; 279 bool SiS_XGIROM;
··· 233 { 234 unsigned char ChipType; 235 unsigned char ChipRevision; 236 void *ivideo; 237 unsigned char *VirtualRomBase; 238 bool UseROM; 239 unsigned char SISIOMEMTYPE *VideoMemoryAddress; 240 unsigned int VideoMemorySize; 241 SISIOADDRESS IOAddress; 242 SISIOADDRESS IOAddress2; /* For dual chip XGI volari */ 243 244 SISIOADDRESS RelIO; 245 SISIOADDRESS SiS_P3c4; 246 SISIOADDRESS SiS_P3d4; 247 SISIOADDRESS SiS_P3c0; ··· 280 unsigned short SiS_IF_DEF_FSTN; 281 unsigned short SiS_SysFlags; 282 unsigned char SiS_VGAINFO; 283 bool SiS_UseROM; 284 bool SiS_ROMNew; 285 bool SiS_XGIROM;
+1
include/linux/fb.h
··· 1122 1123 /* drivers/video/fbcmap.c */ 1124 extern int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp); 1125 extern void fb_dealloc_cmap(struct fb_cmap *cmap); 1126 extern int fb_copy_cmap(const struct fb_cmap *from, struct fb_cmap *to); 1127 extern int fb_cmap_to_user(const struct fb_cmap *from, struct fb_cmap_user *to);
··· 1122 1123 /* drivers/video/fbcmap.c */ 1124 extern int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp); 1125 + extern int fb_alloc_cmap_gfp(struct fb_cmap *cmap, int len, int transp, gfp_t flags); 1126 extern void fb_dealloc_cmap(struct fb_cmap *cmap); 1127 extern int fb_copy_cmap(const struct fb_cmap *from, struct fb_cmap *to); 1128 extern int fb_cmap_to_user(const struct fb_cmap *from, struct fb_cmap_user *to);
-1
include/video/da8xx-fb.h
··· 99 #define FBIPUT_COLOR _IOW('F', 6, int) 100 #define FBIPUT_HSYNC _IOW('F', 9, int) 101 #define FBIPUT_VSYNC _IOW('F', 10, int) 102 - #define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t) 103 104 #endif /* ifndef DA8XX_FB_H */ 105
··· 99 #define FBIPUT_COLOR _IOW('F', 6, int) 100 #define FBIPUT_HSYNC _IOW('F', 9, int) 101 #define FBIPUT_VSYNC _IOW('F', 10, int) 102 103 #endif /* ifndef DA8XX_FB_H */ 104