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kernel os linux

net: stmmac: add imx93 platform support

Add imx93 platform support for dwmac-imx driver.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Clark Wang and committed by
David S. Miller
e5bf35ca c4791b31

+50 -5
+50 -5
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
··· 31 31 #define GPR_ENET_QOS_CLK_TX_CLK_SEL (0x1 << 20) 32 32 #define GPR_ENET_QOS_RGMII_EN (0x1 << 21) 33 33 34 + #define MX93_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 0) 35 + #define MX93_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1) 36 + #define MX93_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1) 37 + #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1) 38 + #define MX93_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0) 39 + 34 40 struct imx_dwmac_ops { 35 41 u32 addr_width; 36 42 bool mac_rgmii_txclk_auto_adj; ··· 95 89 /* TBD: depends on imx8dxl scu interfaces to be upstreamed */ 96 90 return ret; 97 91 } 92 + 93 + static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat) 94 + { 95 + struct imx_priv_data *dwmac = plat_dat->bsp_priv; 96 + int val; 97 + 98 + switch (plat_dat->interface) { 99 + case PHY_INTERFACE_MODE_MII: 100 + val = MX93_GPR_ENET_QOS_INTF_SEL_MII; 101 + break; 102 + case PHY_INTERFACE_MODE_RMII: 103 + val = MX93_GPR_ENET_QOS_INTF_SEL_RMII; 104 + break; 105 + case PHY_INTERFACE_MODE_RGMII: 106 + case PHY_INTERFACE_MODE_RGMII_ID: 107 + case PHY_INTERFACE_MODE_RGMII_RXID: 108 + case PHY_INTERFACE_MODE_RGMII_TXID: 109 + val = MX93_GPR_ENET_QOS_INTF_SEL_RGMII; 110 + break; 111 + default: 112 + dev_dbg(dwmac->dev, "imx dwmac doesn't support %d interface\n", 113 + plat_dat->interface); 114 + return -EINVAL; 115 + } 116 + 117 + val |= MX93_GPR_ENET_QOS_CLK_GEN_EN; 118 + return regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off, 119 + MX93_GPR_ENET_QOS_INTF_MODE_MASK, val); 120 + }; 98 121 99 122 static int imx_dwmac_clks_config(void *priv, bool enabled) 100 123 { ··· 223 188 } 224 189 225 190 dwmac->clk_mem = NULL; 226 - if (of_machine_is_compatible("fsl,imx8dxl")) { 191 + 192 + if (of_machine_is_compatible("fsl,imx8dxl") || 193 + of_machine_is_compatible("fsl,imx93")) { 227 194 dwmac->clk_mem = devm_clk_get(dev, "mem"); 228 195 if (IS_ERR(dwmac->clk_mem)) { 229 196 dev_err(dev, "failed to get mem clock\n"); ··· 233 196 } 234 197 } 235 198 236 - if (of_machine_is_compatible("fsl,imx8mp")) { 237 - /* Binding doc describes the property: 238 - is required by i.MX8MP. 239 - is optional for i.MX8DXL. 199 + if (of_machine_is_compatible("fsl,imx8mp") || 200 + of_machine_is_compatible("fsl,imx93")) { 201 + /* Binding doc describes the propety: 202 + * is required by i.MX8MP, i.MX93. 203 + * is optinoal for i.MX8DXL. 240 204 */ 241 205 dwmac->intf_regmap = syscon_regmap_lookup_by_phandle(np, "intf_mode"); 242 206 if (IS_ERR(dwmac->intf_regmap)) ··· 334 296 .set_intf_mode = imx8dxl_set_intf_mode, 335 297 }; 336 298 299 + static struct imx_dwmac_ops imx93_dwmac_data = { 300 + .addr_width = 32, 301 + .mac_rgmii_txclk_auto_adj = true, 302 + .set_intf_mode = imx93_set_intf_mode, 303 + }; 304 + 337 305 static const struct of_device_id imx_dwmac_match[] = { 338 306 { .compatible = "nxp,imx8mp-dwmac-eqos", .data = &imx8mp_dwmac_data }, 339 307 { .compatible = "nxp,imx8dxl-dwmac-eqos", .data = &imx8dxl_dwmac_data }, 308 + { .compatible = "nxp,imx93-dwmac-eqos", .data = &imx93_dwmac_data }, 340 309 { } 341 310 }; 342 311 MODULE_DEVICE_TABLE(of, imx_dwmac_match);