Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ALSA: es1688: Use guard() for spin locks

Clean up the code using guard() for spin locks.

Merely code refactoring, and no behavior change.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250829145300.5460-6-tiwai@suse.de

+128 -148
+128 -148
sound/isa/es1688/es1688_lib.c
··· 105 105 106 106 static int snd_es1688_probe(struct snd_es1688 *chip) 107 107 { 108 - unsigned long flags; 109 108 unsigned short major, minor; 110 109 int i; 111 110 ··· 112 113 * initialization sequence 113 114 */ 114 115 115 - spin_lock_irqsave(&chip->reg_lock, flags); /* Some ESS1688 cards need this */ 116 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 117 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 118 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 119 - inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ 120 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 121 - inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ 122 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 123 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 124 - inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ 125 - inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 126 - inb(ES1688P(chip, ENABLE0)); /* ENABLE0 */ 116 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { /* Some ESS1688 cards need this */ 117 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 118 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 119 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 120 + inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ 121 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 122 + inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ 123 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 124 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 125 + inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ 126 + inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ 127 + inb(ES1688P(chip, ENABLE0)); /* ENABLE0 */ 127 128 128 - if (snd_es1688_reset(chip) < 0) { 129 - dev_dbg(chip->card->dev, "ESS: [0x%lx] reset failed... 0x%x\n", 130 - chip->port, inb(ES1688P(chip, READ))); 131 - spin_unlock_irqrestore(&chip->reg_lock, flags); 132 - return -ENODEV; 133 - } 134 - snd_es1688_dsp_command(chip, 0xe7); /* return identification */ 129 + if (snd_es1688_reset(chip) < 0) { 130 + dev_dbg(chip->card->dev, "ESS: [0x%lx] reset failed... 0x%x\n", 131 + chip->port, inb(ES1688P(chip, READ))); 132 + return -ENODEV; 133 + } 134 + snd_es1688_dsp_command(chip, 0xe7); /* return identification */ 135 135 136 - for (i = 1000, major = minor = 0; i; i--) { 137 - if (inb(ES1688P(chip, DATA_AVAIL)) & 0x80) { 138 - if (major == 0) { 139 - major = inb(ES1688P(chip, READ)); 140 - } else { 141 - minor = inb(ES1688P(chip, READ)); 136 + for (i = 1000, major = minor = 0; i; i--) { 137 + if (inb(ES1688P(chip, DATA_AVAIL)) & 0x80) { 138 + if (major == 0) 139 + major = inb(ES1688P(chip, READ)); 140 + else 141 + minor = inb(ES1688P(chip, READ)); 142 142 } 143 143 } 144 144 } 145 - 146 - spin_unlock_irqrestore(&chip->reg_lock, flags); 147 145 148 146 dev_dbg(chip->card->dev, 149 147 "ESS: [0x%lx] found.. major = 0x%x, minor = 0x%x\n", ··· 165 169 return -ENODEV; 166 170 } 167 171 168 - spin_lock_irqsave(&chip->reg_lock, flags); 169 - snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */ 170 - snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */ 171 - spin_unlock_irqrestore(&chip->reg_lock, flags); 172 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 173 + snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */ 174 + snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */ 175 + } 172 176 173 177 /* enable joystick, but disable OPL3 */ 174 - spin_lock_irqsave(&chip->mixer_lock, flags); 175 - snd_es1688_mixer_write(chip, 0x40, 0x01); 176 - spin_unlock_irqrestore(&chip->mixer_lock, flags); 178 + scoped_guard(spinlock_irqsave, &chip->mixer_lock) { 179 + snd_es1688_mixer_write(chip, 0x40, 0x01); 180 + } 177 181 178 182 return 0; 179 183 } ··· 181 185 static int snd_es1688_init(struct snd_es1688 * chip, int enable) 182 186 { 183 187 static const int irqs[16] = {-1, -1, 0, -1, -1, 1, -1, 2, -1, 0, 3, -1, -1, -1, -1, -1}; 184 - unsigned long flags; 185 188 int cfg, irq_bits, dma, dma_bits, tmp, tmp1; 186 189 187 190 /* ok.. setup MPU-401 port and joystick and OPL3 */ ··· 209 214 } 210 215 } 211 216 } 212 - spin_lock_irqsave(&chip->reg_lock, flags); 213 - snd_es1688_mixer_write(chip, 0x40, cfg); 214 - spin_unlock_irqrestore(&chip->reg_lock, flags); 217 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 218 + snd_es1688_mixer_write(chip, 0x40, cfg); 219 + } 215 220 /* --- */ 216 - spin_lock_irqsave(&chip->reg_lock, flags); 217 - snd_es1688_read(chip, 0xb1); 218 - snd_es1688_read(chip, 0xb2); 219 - spin_unlock_irqrestore(&chip->reg_lock, flags); 221 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 222 + snd_es1688_read(chip, 0xb1); 223 + snd_es1688_read(chip, 0xb2); 224 + } 220 225 if (enable) { 221 226 cfg = 0xf0; /* enable only DMA counter interrupt */ 222 227 irq_bits = irqs[chip->irq & 0x0f]; ··· 230 235 #endif 231 236 return -EINVAL; 232 237 } 233 - spin_lock_irqsave(&chip->reg_lock, flags); 234 - snd_es1688_write(chip, 0xb1, cfg | (irq_bits << 2)); 235 - spin_unlock_irqrestore(&chip->reg_lock, flags); 238 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 239 + snd_es1688_write(chip, 0xb1, cfg | (irq_bits << 2)); 240 + } 236 241 cfg = 0xf0; /* extended mode DMA enable */ 237 242 dma = chip->dma8; 238 243 if (dma > 3 || dma == 2) { ··· 249 254 if (dma != 3) 250 255 dma_bits++; 251 256 } 252 - spin_lock_irqsave(&chip->reg_lock, flags); 253 - snd_es1688_write(chip, 0xb2, cfg | (dma_bits << 2)); 254 - spin_unlock_irqrestore(&chip->reg_lock, flags); 257 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 258 + snd_es1688_write(chip, 0xb2, cfg | (dma_bits << 2)); 259 + } 255 260 } else { 256 - spin_lock_irqsave(&chip->reg_lock, flags); 257 - snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */ 258 - snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */ 259 - spin_unlock_irqrestore(&chip->reg_lock, flags); 261 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 262 + snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */ 263 + snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */ 264 + } 260 265 } 261 - spin_lock_irqsave(&chip->reg_lock, flags); 262 - snd_es1688_read(chip, 0xb1); 263 - snd_es1688_read(chip, 0xb2); 264 - snd_es1688_reset(chip); 265 - spin_unlock_irqrestore(&chip->reg_lock, flags); 266 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 267 + snd_es1688_read(chip, 0xb1); 268 + snd_es1688_read(chip, 0xb2); 269 + snd_es1688_reset(chip); 270 + } 266 271 return 0; 267 272 } 268 273 ··· 315 320 } else if (cmd != SNDRV_PCM_TRIGGER_START) { 316 321 return -EINVAL; 317 322 } 318 - spin_lock(&chip->reg_lock); 323 + guard(spinlock)(&chip->reg_lock); 319 324 chip->trigger_value = value; 320 325 val = snd_es1688_read(chip, 0xb8); 321 - if ((val < 0) || (val & 0x0f) == value) { 322 - spin_unlock(&chip->reg_lock); 326 + if ((val < 0) || (val & 0x0f) == value) 323 327 return -EINVAL; /* something is wrong */ 324 - } 325 328 #if 0 326 329 dev_dbg(chip->card->dev, "trigger: val = 0x%x, value = 0x%x\n", val, value); 327 330 dev_dbg(chip->card->dev, "trigger: pointer = 0x%x\n", 328 331 snd_dma_pointer(chip->dma8, chip->dma_size)); 329 332 #endif 330 333 snd_es1688_write(chip, 0xb8, (val & 0xf0) | value); 331 - spin_unlock(&chip->reg_lock); 332 334 return 0; 333 335 } 334 336 335 337 static int snd_es1688_playback_prepare(struct snd_pcm_substream *substream) 336 338 { 337 - unsigned long flags; 338 339 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); 339 340 struct snd_pcm_runtime *runtime = substream->runtime; 340 341 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 341 342 unsigned int count = snd_pcm_lib_period_bytes(substream); 342 343 343 344 chip->dma_size = size; 344 - spin_lock_irqsave(&chip->reg_lock, flags); 345 - snd_es1688_reset(chip); 346 - snd_es1688_set_rate(chip, substream); 347 - snd_es1688_write(chip, 0xb8, 4); /* auto init DMA mode */ 348 - snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels)); 349 - snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */ 350 - if (runtime->channels == 1) { 351 - if (snd_pcm_format_width(runtime->format) == 8) { 352 - /* 8. bit mono */ 353 - snd_es1688_write(chip, 0xb6, 0x80); 354 - snd_es1688_write(chip, 0xb7, 0x51); 355 - snd_es1688_write(chip, 0xb7, 0xd0); 345 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 346 + snd_es1688_reset(chip); 347 + snd_es1688_set_rate(chip, substream); 348 + snd_es1688_write(chip, 0xb8, 4); /* auto init DMA mode */ 349 + snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels)); 350 + snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */ 351 + if (runtime->channels == 1) { 352 + if (snd_pcm_format_width(runtime->format) == 8) { 353 + /* 8. bit mono */ 354 + snd_es1688_write(chip, 0xb6, 0x80); 355 + snd_es1688_write(chip, 0xb7, 0x51); 356 + snd_es1688_write(chip, 0xb7, 0xd0); 357 + } else { 358 + /* 16. bit mono */ 359 + snd_es1688_write(chip, 0xb6, 0x00); 360 + snd_es1688_write(chip, 0xb7, 0x71); 361 + snd_es1688_write(chip, 0xb7, 0xf4); 362 + } 356 363 } else { 357 - /* 16. bit mono */ 358 - snd_es1688_write(chip, 0xb6, 0x00); 359 - snd_es1688_write(chip, 0xb7, 0x71); 360 - snd_es1688_write(chip, 0xb7, 0xf4); 364 + if (snd_pcm_format_width(runtime->format) == 8) { 365 + /* 8. bit stereo */ 366 + snd_es1688_write(chip, 0xb6, 0x80); 367 + snd_es1688_write(chip, 0xb7, 0x51); 368 + snd_es1688_write(chip, 0xb7, 0x98); 369 + } else { 370 + /* 16. bit stereo */ 371 + snd_es1688_write(chip, 0xb6, 0x00); 372 + snd_es1688_write(chip, 0xb7, 0x71); 373 + snd_es1688_write(chip, 0xb7, 0xbc); 374 + } 361 375 } 362 - } else { 363 - if (snd_pcm_format_width(runtime->format) == 8) { 364 - /* 8. bit stereo */ 365 - snd_es1688_write(chip, 0xb6, 0x80); 366 - snd_es1688_write(chip, 0xb7, 0x51); 367 - snd_es1688_write(chip, 0xb7, 0x98); 368 - } else { 369 - /* 16. bit stereo */ 370 - snd_es1688_write(chip, 0xb6, 0x00); 371 - snd_es1688_write(chip, 0xb7, 0x71); 372 - snd_es1688_write(chip, 0xb7, 0xbc); 373 - } 376 + snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50); 377 + snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50); 378 + snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKON); 374 379 } 375 - snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50); 376 - snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50); 377 - snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKON); 378 - spin_unlock_irqrestore(&chip->reg_lock, flags); 379 380 /* --- */ 380 381 count = -count; 381 382 snd_dma_program(chip->dma8, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT); 382 - spin_lock_irqsave(&chip->reg_lock, flags); 383 - snd_es1688_write(chip, 0xa4, (unsigned char) count); 384 - snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8)); 385 - spin_unlock_irqrestore(&chip->reg_lock, flags); 383 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 384 + snd_es1688_write(chip, 0xa4, (unsigned char) count); 385 + snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8)); 386 + } 386 387 return 0; 387 388 } 388 389 ··· 391 400 392 401 static int snd_es1688_capture_prepare(struct snd_pcm_substream *substream) 393 402 { 394 - unsigned long flags; 395 403 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); 396 404 struct snd_pcm_runtime *runtime = substream->runtime; 397 405 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 398 406 unsigned int count = snd_pcm_lib_period_bytes(substream); 399 407 400 408 chip->dma_size = size; 401 - spin_lock_irqsave(&chip->reg_lock, flags); 402 - snd_es1688_reset(chip); 403 - snd_es1688_set_rate(chip, substream); 404 - snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKOFF); 405 - snd_es1688_write(chip, 0xb8, 0x0e); /* auto init DMA mode */ 406 - snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels)); 407 - snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */ 408 - if (runtime->channels == 1) { 409 - if (snd_pcm_format_width(runtime->format) == 8) { 410 - /* 8. bit mono */ 411 - snd_es1688_write(chip, 0xb7, 0x51); 412 - snd_es1688_write(chip, 0xb7, 0xd0); 409 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 410 + snd_es1688_reset(chip); 411 + snd_es1688_set_rate(chip, substream); 412 + snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKOFF); 413 + snd_es1688_write(chip, 0xb8, 0x0e); /* auto init DMA mode */ 414 + snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels)); 415 + snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */ 416 + if (runtime->channels == 1) { 417 + if (snd_pcm_format_width(runtime->format) == 8) { 418 + /* 8. bit mono */ 419 + snd_es1688_write(chip, 0xb7, 0x51); 420 + snd_es1688_write(chip, 0xb7, 0xd0); 421 + } else { 422 + /* 16. bit mono */ 423 + snd_es1688_write(chip, 0xb7, 0x71); 424 + snd_es1688_write(chip, 0xb7, 0xf4); 425 + } 413 426 } else { 414 - /* 16. bit mono */ 415 - snd_es1688_write(chip, 0xb7, 0x71); 416 - snd_es1688_write(chip, 0xb7, 0xf4); 427 + if (snd_pcm_format_width(runtime->format) == 8) { 428 + /* 8. bit stereo */ 429 + snd_es1688_write(chip, 0xb7, 0x51); 430 + snd_es1688_write(chip, 0xb7, 0x98); 431 + } else { 432 + /* 16. bit stereo */ 433 + snd_es1688_write(chip, 0xb7, 0x71); 434 + snd_es1688_write(chip, 0xb7, 0xbc); 435 + } 417 436 } 418 - } else { 419 - if (snd_pcm_format_width(runtime->format) == 8) { 420 - /* 8. bit stereo */ 421 - snd_es1688_write(chip, 0xb7, 0x51); 422 - snd_es1688_write(chip, 0xb7, 0x98); 423 - } else { 424 - /* 16. bit stereo */ 425 - snd_es1688_write(chip, 0xb7, 0x71); 426 - snd_es1688_write(chip, 0xb7, 0xbc); 427 - } 437 + snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50); 438 + snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50); 428 439 } 429 - snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50); 430 - snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50); 431 - spin_unlock_irqrestore(&chip->reg_lock, flags); 432 440 /* --- */ 433 441 count = -count; 434 442 snd_dma_program(chip->dma8, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT); 435 - spin_lock_irqsave(&chip->reg_lock, flags); 436 - snd_es1688_write(chip, 0xa4, (unsigned char) count); 437 - snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8)); 438 - spin_unlock_irqrestore(&chip->reg_lock, flags); 443 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 444 + snd_es1688_write(chip, 0xa4, (unsigned char) count); 445 + snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8)); 446 + } 439 447 return 0; 440 448 } 441 449 ··· 728 738 static int snd_es1688_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 729 739 { 730 740 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); 731 - unsigned long flags; 732 741 unsigned char oval, nval; 733 742 int change; 734 743 735 744 if (ucontrol->value.enumerated.item[0] > 8) 736 745 return -EINVAL; 737 - spin_lock_irqsave(&chip->reg_lock, flags); 746 + guard(spinlock_irqsave)(&chip->reg_lock); 738 747 oval = snd_es1688_mixer_read(chip, ES1688_REC_DEV); 739 748 nval = (ucontrol->value.enumerated.item[0] & 7) | (oval & ~15); 740 749 change = nval != oval; 741 750 if (change) 742 751 snd_es1688_mixer_write(chip, ES1688_REC_DEV, nval); 743 - spin_unlock_irqrestore(&chip->reg_lock, flags); 744 752 return change; 745 753 } 746 754 ··· 762 774 static int snd_es1688_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 763 775 { 764 776 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); 765 - unsigned long flags; 766 777 int reg = kcontrol->private_value & 0xff; 767 778 int shift = (kcontrol->private_value >> 8) & 0xff; 768 779 int mask = (kcontrol->private_value >> 16) & 0xff; 769 780 int invert = (kcontrol->private_value >> 24) & 0xff; 770 781 771 - spin_lock_irqsave(&chip->reg_lock, flags); 782 + guard(spinlock_irqsave)(&chip->reg_lock); 772 783 ucontrol->value.integer.value[0] = (snd_es1688_mixer_read(chip, reg) >> shift) & mask; 773 - spin_unlock_irqrestore(&chip->reg_lock, flags); 774 784 if (invert) 775 785 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 776 786 return 0; ··· 777 791 static int snd_es1688_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 778 792 { 779 793 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); 780 - unsigned long flags; 781 794 int reg = kcontrol->private_value & 0xff; 782 795 int shift = (kcontrol->private_value >> 8) & 0xff; 783 796 int mask = (kcontrol->private_value >> 16) & 0xff; ··· 788 803 if (invert) 789 804 nval = mask - nval; 790 805 nval <<= shift; 791 - spin_lock_irqsave(&chip->reg_lock, flags); 806 + guard(spinlock_irqsave)(&chip->reg_lock); 792 807 oval = snd_es1688_mixer_read(chip, reg); 793 808 nval = (oval & ~(mask << shift)) | nval; 794 809 change = nval != oval; 795 810 if (change) 796 811 snd_es1688_mixer_write(chip, reg, nval); 797 - spin_unlock_irqrestore(&chip->reg_lock, flags); 798 812 return change; 799 813 } 800 814 ··· 817 833 static int snd_es1688_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 818 834 { 819 835 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); 820 - unsigned long flags; 821 836 int left_reg = kcontrol->private_value & 0xff; 822 837 int right_reg = (kcontrol->private_value >> 8) & 0xff; 823 838 int shift_left = (kcontrol->private_value >> 16) & 0x07; ··· 825 842 int invert = (kcontrol->private_value >> 22) & 1; 826 843 unsigned char left, right; 827 844 828 - spin_lock_irqsave(&chip->reg_lock, flags); 845 + guard(spinlock_irqsave)(&chip->reg_lock); 829 846 if (left_reg < 0xa0) 830 847 left = snd_es1688_mixer_read(chip, left_reg); 831 848 else ··· 837 854 right = snd_es1688_read(chip, right_reg); 838 855 } else 839 856 right = left; 840 - spin_unlock_irqrestore(&chip->reg_lock, flags); 841 857 ucontrol->value.integer.value[0] = (left >> shift_left) & mask; 842 858 ucontrol->value.integer.value[1] = (right >> shift_right) & mask; 843 859 if (invert) { ··· 849 867 static int snd_es1688_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 850 868 { 851 869 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); 852 - unsigned long flags; 853 870 int left_reg = kcontrol->private_value & 0xff; 854 871 int right_reg = (kcontrol->private_value >> 8) & 0xff; 855 872 int shift_left = (kcontrol->private_value >> 16) & 0x07; ··· 866 885 } 867 886 val1 <<= shift_left; 868 887 val2 <<= shift_right; 869 - spin_lock_irqsave(&chip->reg_lock, flags); 888 + guard(spinlock_irqsave)(&chip->reg_lock); 870 889 if (left_reg != right_reg) { 871 890 if (left_reg < 0xa0) 872 891 oval1 = snd_es1688_mixer_read(chip, left_reg); ··· 904 923 } 905 924 906 925 } 907 - spin_unlock_irqrestore(&chip->reg_lock, flags); 908 926 return change; 909 927 } 910 928