rtc: ds1307: factor out offset to struct chip_desc

Factor out offset to struct chip_desc and remove it from struct ds1307.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

authored by

Heiner Kallweit and committed by
Alexandre Belloni
e553170a 1efb98ba

+7 -11
+7 -11
drivers/rtc/rtc-ds1307.c
··· 115 116 117 struct ds1307 { 118 - u8 offset; /* register's offset */ 119 u8 regs[11]; 120 u16 nvram_offset; 121 struct nvmem_config nvmem_cfg; ··· 135 unsigned alarm:1; 136 u16 nvram_offset; 137 u16 nvram_size; 138 u8 century_reg; 139 u8 century_enable_bit; 140 u8 century_bit; ··· 208 .trickle_charger_reg = 0x08, 209 }, 210 [ds_1388] = { 211 .trickle_charger_reg = 0x0a, 212 }, 213 [ds_3231] = { ··· 222 /* this is battery backed SRAM */ 223 .nvram_offset = 0x20, 224 .nvram_size = 4, /* 32bit (4 word x 8 bit) */ 225 .irq_handler = rx8130_irq, 226 .rtc_ops = &rx8130_rtc_ops, 227 }, ··· 389 const struct chip_desc *chip = &chips[ds1307->type]; 390 391 /* read the RTC date and time registers all at once */ 392 - ret = regmap_bulk_read(ds1307->regmap, ds1307->offset, ds1307->regs, 7); 393 if (ret) { 394 dev_err(dev, "%s error %d\n", "read", ret); 395 return ret; ··· 481 482 dev_dbg(dev, "%s: %7ph\n", "write", buf); 483 484 - result = regmap_bulk_write(ds1307->regmap, ds1307->offset, buf, 7); 485 if (result) { 486 dev_err(dev, "%s error %d\n", "write", result); 487 return result; ··· 1504 DS1307_REG_HOUR << 4 | 0x08, hour); 1505 } 1506 break; 1507 - case rx_8130: 1508 - ds1307->offset = 0x10; /* Seconds starts at 0x10 */ 1509 - break; 1510 - case ds_1388: 1511 - ds1307->offset = 1; /* Seconds starts at 1 */ 1512 - break; 1513 default: 1514 break; 1515 } 1516 1517 read_rtc: 1518 /* read RTC registers */ 1519 - err = regmap_bulk_read(ds1307->regmap, ds1307->offset, buf, 8); 1520 if (err) { 1521 dev_dbg(ds1307->dev, "read error %d\n", err); 1522 goto exit; ··· 1611 tmp = 0; 1612 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 1613 tmp += 12; 1614 - regmap_write(ds1307->regmap, ds1307->offset + DS1307_REG_HOUR, 1615 bin2bcd(tmp)); 1616 } 1617
··· 115 116 117 struct ds1307 { 118 u8 regs[11]; 119 u16 nvram_offset; 120 struct nvmem_config nvmem_cfg; ··· 136 unsigned alarm:1; 137 u16 nvram_offset; 138 u16 nvram_size; 139 + u8 offset; /* register's offset */ 140 u8 century_reg; 141 u8 century_enable_bit; 142 u8 century_bit; ··· 208 .trickle_charger_reg = 0x08, 209 }, 210 [ds_1388] = { 211 + .offset = 1, 212 .trickle_charger_reg = 0x0a, 213 }, 214 [ds_3231] = { ··· 221 /* this is battery backed SRAM */ 222 .nvram_offset = 0x20, 223 .nvram_size = 4, /* 32bit (4 word x 8 bit) */ 224 + .offset = 0x10, 225 .irq_handler = rx8130_irq, 226 .rtc_ops = &rx8130_rtc_ops, 227 }, ··· 387 const struct chip_desc *chip = &chips[ds1307->type]; 388 389 /* read the RTC date and time registers all at once */ 390 + ret = regmap_bulk_read(ds1307->regmap, chip->offset, ds1307->regs, 7); 391 if (ret) { 392 dev_err(dev, "%s error %d\n", "read", ret); 393 return ret; ··· 479 480 dev_dbg(dev, "%s: %7ph\n", "write", buf); 481 482 + result = regmap_bulk_write(ds1307->regmap, chip->offset, buf, 7); 483 if (result) { 484 dev_err(dev, "%s error %d\n", "write", result); 485 return result; ··· 1502 DS1307_REG_HOUR << 4 | 0x08, hour); 1503 } 1504 break; 1505 default: 1506 break; 1507 } 1508 1509 read_rtc: 1510 /* read RTC registers */ 1511 + err = regmap_bulk_read(ds1307->regmap, chip->offset, buf, 8); 1512 if (err) { 1513 dev_dbg(ds1307->dev, "read error %d\n", err); 1514 goto exit; ··· 1615 tmp = 0; 1616 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 1617 tmp += 12; 1618 + regmap_write(ds1307->regmap, chip->offset + DS1307_REG_HOUR, 1619 bin2bcd(tmp)); 1620 } 1621