x86: fix i486 suspend to disk CR4 oops

arch/x86/power/cpu_32.c __save_processor_state calls read_cr4()
only a i486 CPU doesn't have the CR4 register. Trying to read it
produces an invalid opcode oops during suspend to disk.

Use the safe rc4 reading op instead. If the value to be written is
zero the write is skipped.

arch/x86/power/hibernate_asm_32.S
done: swapped the use of %eax and %ecx to use jecxz for
the zero test and jump over store to %cr4.
restore_image: s/%ecx/%eax/ to be consistent with done:

In addition to __save_processor_state, acpi_save_state_mem,
efi_call_phys_prelog, and efi_call_phys_epilog had checks added
(acpi restore was in assembly and already had a check for
non-zero). There were other reads and writes of CR4, but MCE and
virtualization shouldn't be executed on a i486 anyway.

Signed-off-by: David Fries <david@fries.net>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

authored by David Fries and committed by Ingo Molnar e532c06f 39e00fe2

+22 -16
+1 -1
arch/x86/kernel/acpi/sleep.c
··· 86 #endif /* !CONFIG_64BIT */ 87 88 header->pmode_cr0 = read_cr0(); 89 - header->pmode_cr4 = read_cr4(); 90 header->realmode_flags = acpi_realmode_flags; 91 header->real_magic = 0x12345678; 92
··· 86 #endif /* !CONFIG_64BIT */ 87 88 header->pmode_cr0 = read_cr0(); 89 + header->pmode_cr4 = read_cr4_safe(); 90 header->realmode_flags = acpi_realmode_flags; 91 header->real_magic = 0x12345678; 92
+2 -2
arch/x86/kernel/efi_32.c
··· 53 * directory. If I have PAE, I just need to duplicate one entry in 54 * page directory. 55 */ 56 - cr4 = read_cr4(); 57 58 if (cr4 & X86_CR4_PAE) { 59 efi_bak_pg_dir_pointer[0].pgd = ··· 91 gdt_descr.size = GDT_SIZE - 1; 92 load_gdt(&gdt_descr); 93 94 - cr4 = read_cr4(); 95 96 if (cr4 & X86_CR4_PAE) { 97 swapper_pg_dir[pgd_index(0)].pgd =
··· 53 * directory. If I have PAE, I just need to duplicate one entry in 54 * page directory. 55 */ 56 + cr4 = read_cr4_safe(); 57 58 if (cr4 & X86_CR4_PAE) { 59 efi_bak_pg_dir_pointer[0].pgd = ··· 91 gdt_descr.size = GDT_SIZE - 1; 92 load_gdt(&gdt_descr); 93 94 + cr4 = read_cr4_safe(); 95 96 if (cr4 & X86_CR4_PAE) { 97 swapper_pg_dir[pgd_index(0)].pgd =
+4 -2
arch/x86/power/cpu_32.c
··· 45 ctxt->cr0 = read_cr0(); 46 ctxt->cr2 = read_cr2(); 47 ctxt->cr3 = read_cr3(); 48 - ctxt->cr4 = read_cr4(); 49 } 50 51 /* Needed by apm.c */ ··· 98 /* 99 * control registers 100 */ 101 - write_cr4(ctxt->cr4); 102 write_cr3(ctxt->cr3); 103 write_cr2(ctxt->cr2); 104 write_cr0(ctxt->cr0);
··· 45 ctxt->cr0 = read_cr0(); 46 ctxt->cr2 = read_cr2(); 47 ctxt->cr3 = read_cr3(); 48 + ctxt->cr4 = read_cr4_safe(); 49 } 50 51 /* Needed by apm.c */ ··· 98 /* 99 * control registers 100 */ 101 + /* cr4 was introduced in the Pentium CPU */ 102 + if (ctxt->cr4) 103 + write_cr4(ctxt->cr4); 104 write_cr3(ctxt->cr3); 105 write_cr2(ctxt->cr2); 106 write_cr0(ctxt->cr0);
+15 -11
arch/x86/power/hibernate_asm_32.S
··· 28 ret 29 30 ENTRY(restore_image) 31 - movl resume_pg_dir, %ecx 32 - subl $__PAGE_OFFSET, %ecx 33 - movl %ecx, %cr3 34 35 movl restore_pblist, %edx 36 .p2align 4,,7 ··· 52 53 done: 54 /* go back to the original page tables */ 55 - movl $swapper_pg_dir, %ecx 56 - subl $__PAGE_OFFSET, %ecx 57 - movl %ecx, %cr3 58 /* Flush TLB, including "global" things (vmalloc) */ 59 - movl mmu_cr4_features, %eax 60 - movl %eax, %edx 61 andl $~(1<<7), %edx; # PGE 62 movl %edx, %cr4; # turn off PGE 63 - movl %cr3, %ecx; # flush TLB 64 - movl %ecx, %cr3 65 - movl %eax, %cr4; # turn PGE back on 66 67 movl saved_context_esp, %esp 68 movl saved_context_ebp, %ebp
··· 28 ret 29 30 ENTRY(restore_image) 31 + movl resume_pg_dir, %eax 32 + subl $__PAGE_OFFSET, %eax 33 + movl %eax, %cr3 34 35 movl restore_pblist, %edx 36 .p2align 4,,7 ··· 52 53 done: 54 /* go back to the original page tables */ 55 + movl $swapper_pg_dir, %eax 56 + subl $__PAGE_OFFSET, %eax 57 + movl %eax, %cr3 58 /* Flush TLB, including "global" things (vmalloc) */ 59 + movl mmu_cr4_features, %ecx 60 + jecxz 1f # cr4 Pentium and higher, skip if zero 61 + movl %ecx, %edx 62 andl $~(1<<7), %edx; # PGE 63 movl %edx, %cr4; # turn off PGE 64 + 1: 65 + movl %cr3, %eax; # flush TLB 66 + movl %eax, %cr3 67 + jecxz 1f # cr4 Pentium and higher, skip if zero 68 + movl %ecx, %cr4; # turn PGE back on 69 + 1: 70 71 movl saved_context_esp, %esp 72 movl saved_context_ebp, %ebp