···1010config DW_DMAC1111 tristate "Synopsys DesignWare AHB DMA platform driver"1212 select DW_DMAC_CORE1313+ select DW_DMAC_BIG_ENDIAN_IO if AVR321314 default y if CPU_AT32AP70001415 help1516 Support the Synopsys DesignWare AHB DMA controller. This···2625 Intel Medfield has integrated this GPDMA controller.27262827config DW_DMAC_BIG_ENDIAN_IO2929- bool "Use big endian I/O register access"3030- default y if AVR323131- depends on DW_DMAC_CORE3232- help3333- Say yes here to use big endian I/O access when reading and writing3434- to the DMA controller registers. This is needed on some platforms,3535- like the Atmel AVR32 architecture.3636-3737- If unsure, use the default setting.2828+ bool
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drivers/dma/dw/regs.h
···101101 u32 DW_PARAMS;102102};103103104104+/*105105+ * Big endian I/O access when reading and writing to the DMA controller106106+ * registers. This is needed on some platforms, like the Atmel AVR32107107+ * architecture.108108+ */109109+104110#ifdef CONFIG_DW_DMAC_BIG_ENDIAN_IO105111#define dma_readl_native ioread32be106112#define dma_writel_native iowrite32be