···4040 "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt4141 "mediatek,<chip>-disp-mutex" - display mutex4242 "mediatek,<chip>-disp-od" - overdrive4343+ the supported chips are mt2701 and mt8173.4344- reg: Physical base address and length of the function block register space4445- interrupts: The interrupt signal from the function block (required, except for4546 merge and split function blocks).···5554 "mediatek,<chip>-disp-ovl"5655 "mediatek,<chip>-disp-rdma"5756 "mediatek,<chip>-disp-wdma"5757+ the supported chips are mt2701 and mt8173.5858- larb: Should contain a phandle pointing to the local arbiter device as defined5959 in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt6060- iommus: Should point to the respective IOMMU block with master port as
···7788Required properties:99- compatible: "mediatek,<chip>-dsi"1010+ the supported chips are mt2701 and mt8173.1011- reg: Physical base address and length of the controller's registers1112- interrupts: The interrupt signal from the function block.1213- clocks: device clocks···26252726Required properties:2827- compatible: "mediatek,<chip>-mipi-tx"2828+ the supported chips are mt2701 and mt8173.2929- reg: Physical base address and length of the controller's registers3030- clocks: PLL reference clock3131- clock-output-names: name of the output clock line to the DSI encoder