tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
powerpc/cputable: Split cpu_specs[] out of cputable.h
cpu_specs[] is full of #ifdefs depending on the different
types of CPU.
CPUs are mutually exclusive, it is therefore possible to split
cpu_specs[] into smaller more readable pieces.
Create cpu_specs_XXX.h that will each be dedicated on one
of the following mutually exclusive families:
- 40x
- 44x
- 47x
- 8xx
- e500
- book3s/32
- book3s/64
In book3s/32, the block for 603 has been moved in front in order
to not have two 604 blocks.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
[mpe: Fix CONFIG_47x to be CONFIG_PPC_47x, tweak some formatting]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/a44b865e0318286155273b10cdf524ab697928c1.1663606875.git.christophe.leroy@csgroup.eu
authored by
Christophe Leroy
and committed by
Michael Ellerman
e320a76d
76b71988
+1930
-1876
+27
arch/powerpc/kernel/cpu_specs.h
+27
arch/powerpc/kernel/cpu_specs.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifdef CONFIG_40x
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#include "cpu_specs_40x.h"
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#endif
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+
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#ifdef CONFIG_PPC_47x
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#include "cpu_specs_47x.h"
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#elif defined(CONFIG_44x)
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#include "cpu_specs_44x.h"
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#endif
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+
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#ifdef CONFIG_PPC_8xx
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#include "cpu_specs_8xx.h"
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#endif
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+
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#ifdef CONFIG_E500
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#include "cpu_specs_e500.h"
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#endif
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#ifdef CONFIG_PPC_BOOK3S_32
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#include "cpu_specs_book3s_32.h"
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#endif
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+
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#ifdef CONFIG_PPC_BOOK3S_64
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#include "cpu_specs_book3s_64.h"
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#endif
+280
arch/powerpc/kernel/cpu_specs_40x.h
+280
arch/powerpc/kernel/cpu_specs_40x.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
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*/
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+
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static struct cpu_spec cpu_specs[] __initdata = {
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{ /* STB 04xxx */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x41810000,
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.cpu_name = "STB04xxx",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* NP405L */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x41610000,
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.cpu_name = "NP405L",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* NP4GS3 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x40B10000,
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.cpu_name = "NP4GS3",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* NP405H */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x41410000,
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.cpu_name = "NP405H",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* 405GPr */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x50910000,
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.cpu_name = "405GPr",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* STBx25xx */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x51510000,
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.cpu_name = "STBx25xx",
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.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* 405LP */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x41F10000,
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.cpu_name = "405LP",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* 405EP */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x51210000,
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.cpu_name = "405EP",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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+
.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* 405EX Rev. A/B with Security */
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.pvr_mask = 0xffff000f,
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.pvr_value = 0x12910007,
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.cpu_name = "405EX Rev. A/B",
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.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* 405EX Rev. C without Security */
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.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x1291000d,
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.cpu_name = "405EX Rev. C",
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+
.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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.icache_bsize = 32,
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+
.dcache_bsize = 32,
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.machine_check = machine_check_4xx,
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.platform = "ppc405",
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},
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{ /* 405EX Rev. C with Security */
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.pvr_mask = 0xffff000f,
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.pvr_value = 0x1291000f,
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.cpu_name = "405EX Rev. C",
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+
.cpu_features = CPU_FTRS_40X,
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.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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{ /* 405EX Rev. D without Security */
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.pvr_mask = 0xffff000f,
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.pvr_value = 0x12910003,
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.cpu_name = "405EX Rev. D",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* 405EX Rev. D with Security */
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.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x12910005,
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+
.cpu_name = "405EX Rev. D",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* 405EXr Rev. A/B without Security */
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.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x12910001,
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+
.cpu_name = "405EXr Rev. A/B",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* 405EXr Rev. C without Security */
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.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x12910009,
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+
.cpu_name = "405EXr Rev. C",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* 405EXr Rev. C with Security */
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.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x1291000b,
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+
.cpu_name = "405EXr Rev. C",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* 405EXr Rev. D without Security */
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+
.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x12910000,
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+
.cpu_name = "405EXr Rev. D",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* 405EXr Rev. D with Security */
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.pvr_mask = 0xffff000f,
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+
.pvr_value = 0x12910002,
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+
.cpu_name = "405EXr Rev. D",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{
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+
/* 405EZ */
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.pvr_mask = 0xffff0000,
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+
.pvr_value = 0x41510000,
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+
.cpu_name = "405EZ",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
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+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
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+
.platform = "ppc405",
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+
},
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+
{ /* APM8018X */
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.pvr_mask = 0xffff0000,
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+
.pvr_value = 0x7ff11432,
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+
.cpu_name = "APM8018X",
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+
.cpu_features = CPU_FTRS_40X,
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+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
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+
PPC_FEATURE_HAS_4xxMAC,
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+
.mmu_features = MMU_FTR_TYPE_40x,
262
+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
265
+
.platform = "ppc405",
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+
},
267
+
{ /* default match */
268
+
.pvr_mask = 0x00000000,
269
+
.pvr_value = 0x00000000,
270
+
.cpu_name = "(generic 40x PPC)",
271
+
.cpu_features = CPU_FTRS_40X,
272
+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
273
+
PPC_FEATURE_HAS_4xxMAC,
274
+
.mmu_features = MMU_FTR_TYPE_40x,
275
+
.icache_bsize = 32,
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+
.dcache_bsize = 32,
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+
.machine_check = machine_check_4xx,
278
+
.platform = "ppc405",
279
+
}
280
+
};
+304
arch/powerpc/kernel/cpu_specs_44x.h
+304
arch/powerpc/kernel/cpu_specs_44x.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
+
/*
3
+
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4
+
*/
5
+
6
+
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
7
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PPC_FEATURE_BOOKE)
8
+
9
+
static struct cpu_spec cpu_specs[] __initdata = {
10
+
{
11
+
.pvr_mask = 0xf0000fff,
12
+
.pvr_value = 0x40000850,
13
+
.cpu_name = "440GR Rev. A",
14
+
.cpu_features = CPU_FTRS_44X,
15
+
.cpu_user_features = COMMON_USER_BOOKE,
16
+
.mmu_features = MMU_FTR_TYPE_44x,
17
+
.icache_bsize = 32,
18
+
.dcache_bsize = 32,
19
+
.machine_check = machine_check_4xx,
20
+
.platform = "ppc440",
21
+
},
22
+
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
23
+
.pvr_mask = 0xf0000fff,
24
+
.pvr_value = 0x40000858,
25
+
.cpu_name = "440EP Rev. A",
26
+
.cpu_features = CPU_FTRS_44X,
27
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
28
+
.mmu_features = MMU_FTR_TYPE_44x,
29
+
.icache_bsize = 32,
30
+
.dcache_bsize = 32,
31
+
.cpu_setup = __setup_cpu_440ep,
32
+
.machine_check = machine_check_4xx,
33
+
.platform = "ppc440",
34
+
},
35
+
{
36
+
.pvr_mask = 0xf0000fff,
37
+
.pvr_value = 0x400008d3,
38
+
.cpu_name = "440GR Rev. B",
39
+
.cpu_features = CPU_FTRS_44X,
40
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
41
+
.mmu_features = MMU_FTR_TYPE_44x,
42
+
.icache_bsize = 32,
43
+
.dcache_bsize = 32,
44
+
.machine_check = machine_check_4xx,
45
+
.platform = "ppc440",
46
+
},
47
+
{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
48
+
.pvr_mask = 0xf0000ff7,
49
+
.pvr_value = 0x400008d4,
50
+
.cpu_name = "440EP Rev. C",
51
+
.cpu_features = CPU_FTRS_44X,
52
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
53
+
.mmu_features = MMU_FTR_TYPE_44x,
54
+
.icache_bsize = 32,
55
+
.dcache_bsize = 32,
56
+
.cpu_setup = __setup_cpu_440ep,
57
+
.machine_check = machine_check_4xx,
58
+
.platform = "ppc440",
59
+
},
60
+
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
61
+
.pvr_mask = 0xf0000fff,
62
+
.pvr_value = 0x400008db,
63
+
.cpu_name = "440EP Rev. B",
64
+
.cpu_features = CPU_FTRS_44X,
65
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
66
+
.mmu_features = MMU_FTR_TYPE_44x,
67
+
.icache_bsize = 32,
68
+
.dcache_bsize = 32,
69
+
.cpu_setup = __setup_cpu_440ep,
70
+
.machine_check = machine_check_4xx,
71
+
.platform = "ppc440",
72
+
},
73
+
{ /* 440GRX */
74
+
.pvr_mask = 0xf0000ffb,
75
+
.pvr_value = 0x200008D0,
76
+
.cpu_name = "440GRX",
77
+
.cpu_features = CPU_FTRS_44X,
78
+
.cpu_user_features = COMMON_USER_BOOKE,
79
+
.mmu_features = MMU_FTR_TYPE_44x,
80
+
.icache_bsize = 32,
81
+
.dcache_bsize = 32,
82
+
.cpu_setup = __setup_cpu_440grx,
83
+
.machine_check = machine_check_440A,
84
+
.platform = "ppc440",
85
+
},
86
+
{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
87
+
.pvr_mask = 0xf0000ffb,
88
+
.pvr_value = 0x200008D8,
89
+
.cpu_name = "440EPX",
90
+
.cpu_features = CPU_FTRS_44X,
91
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
92
+
.mmu_features = MMU_FTR_TYPE_44x,
93
+
.icache_bsize = 32,
94
+
.dcache_bsize = 32,
95
+
.cpu_setup = __setup_cpu_440epx,
96
+
.machine_check = machine_check_440A,
97
+
.platform = "ppc440",
98
+
},
99
+
{ /* 440GP Rev. B */
100
+
.pvr_mask = 0xf0000fff,
101
+
.pvr_value = 0x40000440,
102
+
.cpu_name = "440GP Rev. B",
103
+
.cpu_features = CPU_FTRS_44X,
104
+
.cpu_user_features = COMMON_USER_BOOKE,
105
+
.mmu_features = MMU_FTR_TYPE_44x,
106
+
.icache_bsize = 32,
107
+
.dcache_bsize = 32,
108
+
.machine_check = machine_check_4xx,
109
+
.platform = "ppc440gp",
110
+
},
111
+
{ /* 440GP Rev. C */
112
+
.pvr_mask = 0xf0000fff,
113
+
.pvr_value = 0x40000481,
114
+
.cpu_name = "440GP Rev. C",
115
+
.cpu_features = CPU_FTRS_44X,
116
+
.cpu_user_features = COMMON_USER_BOOKE,
117
+
.mmu_features = MMU_FTR_TYPE_44x,
118
+
.icache_bsize = 32,
119
+
.dcache_bsize = 32,
120
+
.machine_check = machine_check_4xx,
121
+
.platform = "ppc440gp",
122
+
},
123
+
{ /* 440GX Rev. A */
124
+
.pvr_mask = 0xf0000fff,
125
+
.pvr_value = 0x50000850,
126
+
.cpu_name = "440GX Rev. A",
127
+
.cpu_features = CPU_FTRS_44X,
128
+
.cpu_user_features = COMMON_USER_BOOKE,
129
+
.mmu_features = MMU_FTR_TYPE_44x,
130
+
.icache_bsize = 32,
131
+
.dcache_bsize = 32,
132
+
.cpu_setup = __setup_cpu_440gx,
133
+
.machine_check = machine_check_440A,
134
+
.platform = "ppc440",
135
+
},
136
+
{ /* 440GX Rev. B */
137
+
.pvr_mask = 0xf0000fff,
138
+
.pvr_value = 0x50000851,
139
+
.cpu_name = "440GX Rev. B",
140
+
.cpu_features = CPU_FTRS_44X,
141
+
.cpu_user_features = COMMON_USER_BOOKE,
142
+
.mmu_features = MMU_FTR_TYPE_44x,
143
+
.icache_bsize = 32,
144
+
.dcache_bsize = 32,
145
+
.cpu_setup = __setup_cpu_440gx,
146
+
.machine_check = machine_check_440A,
147
+
.platform = "ppc440",
148
+
},
149
+
{ /* 440GX Rev. C */
150
+
.pvr_mask = 0xf0000fff,
151
+
.pvr_value = 0x50000892,
152
+
.cpu_name = "440GX Rev. C",
153
+
.cpu_features = CPU_FTRS_44X,
154
+
.cpu_user_features = COMMON_USER_BOOKE,
155
+
.mmu_features = MMU_FTR_TYPE_44x,
156
+
.icache_bsize = 32,
157
+
.dcache_bsize = 32,
158
+
.cpu_setup = __setup_cpu_440gx,
159
+
.machine_check = machine_check_440A,
160
+
.platform = "ppc440",
161
+
},
162
+
{ /* 440GX Rev. F */
163
+
.pvr_mask = 0xf0000fff,
164
+
.pvr_value = 0x50000894,
165
+
.cpu_name = "440GX Rev. F",
166
+
.cpu_features = CPU_FTRS_44X,
167
+
.cpu_user_features = COMMON_USER_BOOKE,
168
+
.mmu_features = MMU_FTR_TYPE_44x,
169
+
.icache_bsize = 32,
170
+
.dcache_bsize = 32,
171
+
.cpu_setup = __setup_cpu_440gx,
172
+
.machine_check = machine_check_440A,
173
+
.platform = "ppc440",
174
+
},
175
+
{ /* 440SP Rev. A */
176
+
.pvr_mask = 0xfff00fff,
177
+
.pvr_value = 0x53200891,
178
+
.cpu_name = "440SP Rev. A",
179
+
.cpu_features = CPU_FTRS_44X,
180
+
.cpu_user_features = COMMON_USER_BOOKE,
181
+
.mmu_features = MMU_FTR_TYPE_44x,
182
+
.icache_bsize = 32,
183
+
.dcache_bsize = 32,
184
+
.machine_check = machine_check_4xx,
185
+
.platform = "ppc440",
186
+
},
187
+
{ /* 440SPe Rev. A */
188
+
.pvr_mask = 0xfff00fff,
189
+
.pvr_value = 0x53400890,
190
+
.cpu_name = "440SPe Rev. A",
191
+
.cpu_features = CPU_FTRS_44X,
192
+
.cpu_user_features = COMMON_USER_BOOKE,
193
+
.mmu_features = MMU_FTR_TYPE_44x,
194
+
.icache_bsize = 32,
195
+
.dcache_bsize = 32,
196
+
.cpu_setup = __setup_cpu_440spe,
197
+
.machine_check = machine_check_440A,
198
+
.platform = "ppc440",
199
+
},
200
+
{ /* 440SPe Rev. B */
201
+
.pvr_mask = 0xfff00fff,
202
+
.pvr_value = 0x53400891,
203
+
.cpu_name = "440SPe Rev. B",
204
+
.cpu_features = CPU_FTRS_44X,
205
+
.cpu_user_features = COMMON_USER_BOOKE,
206
+
.mmu_features = MMU_FTR_TYPE_44x,
207
+
.icache_bsize = 32,
208
+
.dcache_bsize = 32,
209
+
.cpu_setup = __setup_cpu_440spe,
210
+
.machine_check = machine_check_440A,
211
+
.platform = "ppc440",
212
+
},
213
+
{ /* 460EX */
214
+
.pvr_mask = 0xffff0006,
215
+
.pvr_value = 0x13020002,
216
+
.cpu_name = "460EX",
217
+
.cpu_features = CPU_FTRS_440x6,
218
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
219
+
.mmu_features = MMU_FTR_TYPE_44x,
220
+
.icache_bsize = 32,
221
+
.dcache_bsize = 32,
222
+
.cpu_setup = __setup_cpu_460ex,
223
+
.machine_check = machine_check_440A,
224
+
.platform = "ppc440",
225
+
},
226
+
{ /* 460EX Rev B */
227
+
.pvr_mask = 0xffff0007,
228
+
.pvr_value = 0x13020004,
229
+
.cpu_name = "460EX Rev. B",
230
+
.cpu_features = CPU_FTRS_440x6,
231
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
232
+
.mmu_features = MMU_FTR_TYPE_44x,
233
+
.icache_bsize = 32,
234
+
.dcache_bsize = 32,
235
+
.cpu_setup = __setup_cpu_460ex,
236
+
.machine_check = machine_check_440A,
237
+
.platform = "ppc440",
238
+
},
239
+
{ /* 460GT */
240
+
.pvr_mask = 0xffff0006,
241
+
.pvr_value = 0x13020000,
242
+
.cpu_name = "460GT",
243
+
.cpu_features = CPU_FTRS_440x6,
244
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
245
+
.mmu_features = MMU_FTR_TYPE_44x,
246
+
.icache_bsize = 32,
247
+
.dcache_bsize = 32,
248
+
.cpu_setup = __setup_cpu_460gt,
249
+
.machine_check = machine_check_440A,
250
+
.platform = "ppc440",
251
+
},
252
+
{ /* 460GT Rev B */
253
+
.pvr_mask = 0xffff0007,
254
+
.pvr_value = 0x13020005,
255
+
.cpu_name = "460GT Rev. B",
256
+
.cpu_features = CPU_FTRS_440x6,
257
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
258
+
.mmu_features = MMU_FTR_TYPE_44x,
259
+
.icache_bsize = 32,
260
+
.dcache_bsize = 32,
261
+
.cpu_setup = __setup_cpu_460gt,
262
+
.machine_check = machine_check_440A,
263
+
.platform = "ppc440",
264
+
},
265
+
{ /* 460SX */
266
+
.pvr_mask = 0xffffff00,
267
+
.pvr_value = 0x13541800,
268
+
.cpu_name = "460SX",
269
+
.cpu_features = CPU_FTRS_44X,
270
+
.cpu_user_features = COMMON_USER_BOOKE,
271
+
.mmu_features = MMU_FTR_TYPE_44x,
272
+
.icache_bsize = 32,
273
+
.dcache_bsize = 32,
274
+
.cpu_setup = __setup_cpu_460sx,
275
+
.machine_check = machine_check_440A,
276
+
.platform = "ppc440",
277
+
},
278
+
{ /* 464 in APM821xx */
279
+
.pvr_mask = 0xfffffff0,
280
+
.pvr_value = 0x12C41C80,
281
+
.cpu_name = "APM821XX",
282
+
.cpu_features = CPU_FTRS_44X,
283
+
.cpu_user_features = COMMON_USER_BOOKE |
284
+
PPC_FEATURE_HAS_FPU,
285
+
.mmu_features = MMU_FTR_TYPE_44x,
286
+
.icache_bsize = 32,
287
+
.dcache_bsize = 32,
288
+
.cpu_setup = __setup_cpu_apm821xx,
289
+
.machine_check = machine_check_440A,
290
+
.platform = "ppc440",
291
+
},
292
+
{ /* default match */
293
+
.pvr_mask = 0x00000000,
294
+
.pvr_value = 0x00000000,
295
+
.cpu_name = "(generic 44x PPC)",
296
+
.cpu_features = CPU_FTRS_44X,
297
+
.cpu_user_features = COMMON_USER_BOOKE,
298
+
.mmu_features = MMU_FTR_TYPE_44x,
299
+
.icache_bsize = 32,
300
+
.dcache_bsize = 32,
301
+
.machine_check = machine_check_4xx,
302
+
.platform = "ppc440",
303
+
}
304
+
};
+74
arch/powerpc/kernel/cpu_specs_47x.h
+74
arch/powerpc/kernel/cpu_specs_47x.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
+
/*
3
+
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4
+
*/
5
+
6
+
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
7
+
PPC_FEATURE_BOOKE)
8
+
9
+
static struct cpu_spec cpu_specs[] __initdata = {
10
+
{ /* 476 DD2 core */
11
+
.pvr_mask = 0xffffffff,
12
+
.pvr_value = 0x11a52080,
13
+
.cpu_name = "476",
14
+
.cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
15
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
16
+
.mmu_features = MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST |
17
+
MMU_FTR_LOCK_BCAST_INVAL,
18
+
.icache_bsize = 32,
19
+
.dcache_bsize = 128,
20
+
.machine_check = machine_check_47x,
21
+
.platform = "ppc470",
22
+
},
23
+
{ /* 476fpe */
24
+
.pvr_mask = 0xffff0000,
25
+
.pvr_value = 0x7ff50000,
26
+
.cpu_name = "476fpe",
27
+
.cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
28
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
29
+
.mmu_features = MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST |
30
+
MMU_FTR_LOCK_BCAST_INVAL,
31
+
.icache_bsize = 32,
32
+
.dcache_bsize = 128,
33
+
.machine_check = machine_check_47x,
34
+
.platform = "ppc470",
35
+
},
36
+
{ /* 476 iss */
37
+
.pvr_mask = 0xffff0000,
38
+
.pvr_value = 0x00050000,
39
+
.cpu_name = "476",
40
+
.cpu_features = CPU_FTRS_47X,
41
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
42
+
.mmu_features = MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST |
43
+
MMU_FTR_LOCK_BCAST_INVAL,
44
+
.icache_bsize = 32,
45
+
.dcache_bsize = 128,
46
+
.machine_check = machine_check_47x,
47
+
.platform = "ppc470",
48
+
},
49
+
{ /* 476 others */
50
+
.pvr_mask = 0xffff0000,
51
+
.pvr_value = 0x11a50000,
52
+
.cpu_name = "476",
53
+
.cpu_features = CPU_FTRS_47X,
54
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
55
+
.mmu_features = MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST |
56
+
MMU_FTR_LOCK_BCAST_INVAL,
57
+
.icache_bsize = 32,
58
+
.dcache_bsize = 128,
59
+
.machine_check = machine_check_47x,
60
+
.platform = "ppc470",
61
+
},
62
+
{ /* default match */
63
+
.pvr_mask = 0x00000000,
64
+
.pvr_value = 0x00000000,
65
+
.cpu_name = "(generic 47x PPC)",
66
+
.cpu_features = CPU_FTRS_47X,
67
+
.cpu_user_features = COMMON_USER_BOOKE,
68
+
.mmu_features = MMU_FTR_TYPE_47x,
69
+
.icache_bsize = 32,
70
+
.dcache_bsize = 128,
71
+
.machine_check = machine_check_47x,
72
+
.platform = "ppc470",
73
+
}
74
+
};
+23
arch/powerpc/kernel/cpu_specs_8xx.h
+23
arch/powerpc/kernel/cpu_specs_8xx.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
+
/*
3
+
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4
+
*/
5
+
6
+
static struct cpu_spec cpu_specs[] __initdata = {
7
+
{ /* 8xx */
8
+
.pvr_mask = 0xffff0000,
9
+
.pvr_value = PVR_8xx,
10
+
.cpu_name = "8xx",
11
+
/*
12
+
* CPU_FTR_MAYBE_CAN_DOZE is possible,
13
+
* if the 8xx code is there....
14
+
*/
15
+
.cpu_features = CPU_FTRS_8XX,
16
+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
17
+
.mmu_features = MMU_FTR_TYPE_8xx,
18
+
.icache_bsize = 16,
19
+
.dcache_bsize = 16,
20
+
.machine_check = machine_check_8xx,
21
+
.platform = "ppc823",
22
+
},
23
+
};
+605
arch/powerpc/kernel/cpu_specs_book3s_32.h
+605
arch/powerpc/kernel/cpu_specs_book3s_32.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
+
/*
3
+
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4
+
*/
5
+
6
+
#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
7
+
PPC_FEATURE_HAS_MMU)
8
+
9
+
static struct cpu_spec cpu_specs[] __initdata = {
10
+
#ifdef CONFIG_PPC_BOOK3S_603
11
+
{ /* 603 */
12
+
.pvr_mask = 0xffff0000,
13
+
.pvr_value = 0x00030000,
14
+
.cpu_name = "603",
15
+
.cpu_features = CPU_FTRS_603,
16
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
17
+
.mmu_features = 0,
18
+
.icache_bsize = 32,
19
+
.dcache_bsize = 32,
20
+
.cpu_setup = __setup_cpu_603,
21
+
.machine_check = machine_check_generic,
22
+
.platform = "ppc603",
23
+
},
24
+
{ /* 603e */
25
+
.pvr_mask = 0xffff0000,
26
+
.pvr_value = 0x00060000,
27
+
.cpu_name = "603e",
28
+
.cpu_features = CPU_FTRS_603,
29
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
30
+
.mmu_features = 0,
31
+
.icache_bsize = 32,
32
+
.dcache_bsize = 32,
33
+
.cpu_setup = __setup_cpu_603,
34
+
.machine_check = machine_check_generic,
35
+
.platform = "ppc603",
36
+
},
37
+
{ /* 603ev */
38
+
.pvr_mask = 0xffff0000,
39
+
.pvr_value = 0x00070000,
40
+
.cpu_name = "603ev",
41
+
.cpu_features = CPU_FTRS_603,
42
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
43
+
.mmu_features = 0,
44
+
.icache_bsize = 32,
45
+
.dcache_bsize = 32,
46
+
.cpu_setup = __setup_cpu_603,
47
+
.machine_check = machine_check_generic,
48
+
.platform = "ppc603",
49
+
},
50
+
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */
51
+
.pvr_mask = 0x7fff0000,
52
+
.pvr_value = 0x00810000,
53
+
.cpu_name = "82xx",
54
+
.cpu_features = CPU_FTRS_82XX,
55
+
.cpu_user_features = COMMON_USER,
56
+
.mmu_features = 0,
57
+
.icache_bsize = 32,
58
+
.dcache_bsize = 32,
59
+
.cpu_setup = __setup_cpu_603,
60
+
.machine_check = machine_check_generic,
61
+
.platform = "ppc603",
62
+
},
63
+
{ /* All G2_LE (603e core, plus some) have the same pvr */
64
+
.pvr_mask = 0x7fff0000,
65
+
.pvr_value = 0x00820000,
66
+
.cpu_name = "G2_LE",
67
+
.cpu_features = CPU_FTRS_G2_LE,
68
+
.cpu_user_features = COMMON_USER,
69
+
.mmu_features = MMU_FTR_USE_HIGH_BATS,
70
+
.icache_bsize = 32,
71
+
.dcache_bsize = 32,
72
+
.cpu_setup = __setup_cpu_603,
73
+
.machine_check = machine_check_generic,
74
+
.platform = "ppc603",
75
+
},
76
+
#ifdef CONFIG_PPC_83xx
77
+
{ /* e300c1 (a 603e core, plus some) on 83xx */
78
+
.pvr_mask = 0x7fff0000,
79
+
.pvr_value = 0x00830000,
80
+
.cpu_name = "e300c1",
81
+
.cpu_features = CPU_FTRS_E300,
82
+
.cpu_user_features = COMMON_USER,
83
+
.mmu_features = MMU_FTR_USE_HIGH_BATS,
84
+
.icache_bsize = 32,
85
+
.dcache_bsize = 32,
86
+
.cpu_setup = __setup_cpu_603,
87
+
.machine_check = machine_check_83xx,
88
+
.platform = "ppc603",
89
+
},
90
+
{ /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
91
+
.pvr_mask = 0x7fff0000,
92
+
.pvr_value = 0x00840000,
93
+
.cpu_name = "e300c2",
94
+
.cpu_features = CPU_FTRS_E300C2,
95
+
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
96
+
.mmu_features = MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU,
97
+
.icache_bsize = 32,
98
+
.dcache_bsize = 32,
99
+
.cpu_setup = __setup_cpu_603,
100
+
.machine_check = machine_check_83xx,
101
+
.platform = "ppc603",
102
+
},
103
+
{ /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
104
+
.pvr_mask = 0x7fff0000,
105
+
.pvr_value = 0x00850000,
106
+
.cpu_name = "e300c3",
107
+
.cpu_features = CPU_FTRS_E300,
108
+
.cpu_user_features = COMMON_USER,
109
+
.mmu_features = MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU,
110
+
.icache_bsize = 32,
111
+
.dcache_bsize = 32,
112
+
.cpu_setup = __setup_cpu_603,
113
+
.machine_check = machine_check_83xx,
114
+
.num_pmcs = 4,
115
+
.platform = "ppc603",
116
+
},
117
+
{ /* e300c4 (e300c1, plus one IU) */
118
+
.pvr_mask = 0x7fff0000,
119
+
.pvr_value = 0x00860000,
120
+
.cpu_name = "e300c4",
121
+
.cpu_features = CPU_FTRS_E300,
122
+
.cpu_user_features = COMMON_USER,
123
+
.mmu_features = MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU,
124
+
.icache_bsize = 32,
125
+
.dcache_bsize = 32,
126
+
.cpu_setup = __setup_cpu_603,
127
+
.machine_check = machine_check_83xx,
128
+
.num_pmcs = 4,
129
+
.platform = "ppc603",
130
+
},
131
+
#endif
132
+
#endif /* CONFIG_PPC_BOOK3S_603 */
133
+
#ifdef CONFIG_PPC_BOOK3S_604
134
+
{ /* 604 */
135
+
.pvr_mask = 0xffff0000,
136
+
.pvr_value = 0x00040000,
137
+
.cpu_name = "604",
138
+
.cpu_features = CPU_FTRS_604,
139
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
140
+
.mmu_features = MMU_FTR_HPTE_TABLE,
141
+
.icache_bsize = 32,
142
+
.dcache_bsize = 32,
143
+
.num_pmcs = 2,
144
+
.cpu_setup = __setup_cpu_604,
145
+
.machine_check = machine_check_generic,
146
+
.platform = "ppc604",
147
+
},
148
+
{ /* 604e */
149
+
.pvr_mask = 0xfffff000,
150
+
.pvr_value = 0x00090000,
151
+
.cpu_name = "604e",
152
+
.cpu_features = CPU_FTRS_604,
153
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
154
+
.mmu_features = MMU_FTR_HPTE_TABLE,
155
+
.icache_bsize = 32,
156
+
.dcache_bsize = 32,
157
+
.num_pmcs = 4,
158
+
.cpu_setup = __setup_cpu_604,
159
+
.machine_check = machine_check_generic,
160
+
.platform = "ppc604",
161
+
},
162
+
{ /* 604r */
163
+
.pvr_mask = 0xffff0000,
164
+
.pvr_value = 0x00090000,
165
+
.cpu_name = "604r",
166
+
.cpu_features = CPU_FTRS_604,
167
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
168
+
.mmu_features = MMU_FTR_HPTE_TABLE,
169
+
.icache_bsize = 32,
170
+
.dcache_bsize = 32,
171
+
.num_pmcs = 4,
172
+
.cpu_setup = __setup_cpu_604,
173
+
.machine_check = machine_check_generic,
174
+
.platform = "ppc604",
175
+
},
176
+
{ /* 604ev */
177
+
.pvr_mask = 0xffff0000,
178
+
.pvr_value = 0x000a0000,
179
+
.cpu_name = "604ev",
180
+
.cpu_features = CPU_FTRS_604,
181
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
182
+
.mmu_features = MMU_FTR_HPTE_TABLE,
183
+
.icache_bsize = 32,
184
+
.dcache_bsize = 32,
185
+
.num_pmcs = 4,
186
+
.cpu_setup = __setup_cpu_604,
187
+
.machine_check = machine_check_generic,
188
+
.platform = "ppc604",
189
+
},
190
+
{ /* 740/750 (0x4202, don't support TAU ?) */
191
+
.pvr_mask = 0xffffffff,
192
+
.pvr_value = 0x00084202,
193
+
.cpu_name = "740/750",
194
+
.cpu_features = CPU_FTRS_740_NOTAU,
195
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
196
+
.mmu_features = MMU_FTR_HPTE_TABLE,
197
+
.icache_bsize = 32,
198
+
.dcache_bsize = 32,
199
+
.num_pmcs = 4,
200
+
.cpu_setup = __setup_cpu_750,
201
+
.machine_check = machine_check_generic,
202
+
.platform = "ppc750",
203
+
},
204
+
{ /* 750CX (80100 and 8010x?) */
205
+
.pvr_mask = 0xfffffff0,
206
+
.pvr_value = 0x00080100,
207
+
.cpu_name = "750CX",
208
+
.cpu_features = CPU_FTRS_750,
209
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
210
+
.mmu_features = MMU_FTR_HPTE_TABLE,
211
+
.icache_bsize = 32,
212
+
.dcache_bsize = 32,
213
+
.num_pmcs = 4,
214
+
.cpu_setup = __setup_cpu_750cx,
215
+
.machine_check = machine_check_generic,
216
+
.platform = "ppc750",
217
+
},
218
+
{ /* 750CX (82201 and 82202) */
219
+
.pvr_mask = 0xfffffff0,
220
+
.pvr_value = 0x00082200,
221
+
.cpu_name = "750CX",
222
+
.cpu_features = CPU_FTRS_750,
223
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
224
+
.mmu_features = MMU_FTR_HPTE_TABLE,
225
+
.icache_bsize = 32,
226
+
.dcache_bsize = 32,
227
+
.num_pmcs = 4,
228
+
.pmc_type = PPC_PMC_IBM,
229
+
.cpu_setup = __setup_cpu_750cx,
230
+
.machine_check = machine_check_generic,
231
+
.platform = "ppc750",
232
+
},
233
+
{ /* 750CXe (82214) */
234
+
.pvr_mask = 0xfffffff0,
235
+
.pvr_value = 0x00082210,
236
+
.cpu_name = "750CXe",
237
+
.cpu_features = CPU_FTRS_750,
238
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
239
+
.mmu_features = MMU_FTR_HPTE_TABLE,
240
+
.icache_bsize = 32,
241
+
.dcache_bsize = 32,
242
+
.num_pmcs = 4,
243
+
.pmc_type = PPC_PMC_IBM,
244
+
.cpu_setup = __setup_cpu_750cx,
245
+
.machine_check = machine_check_generic,
246
+
.platform = "ppc750",
247
+
},
248
+
{ /* 750CXe "Gekko" (83214) */
249
+
.pvr_mask = 0xffffffff,
250
+
.pvr_value = 0x00083214,
251
+
.cpu_name = "750CXe",
252
+
.cpu_features = CPU_FTRS_750,
253
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
254
+
.mmu_features = MMU_FTR_HPTE_TABLE,
255
+
.icache_bsize = 32,
256
+
.dcache_bsize = 32,
257
+
.num_pmcs = 4,
258
+
.pmc_type = PPC_PMC_IBM,
259
+
.cpu_setup = __setup_cpu_750cx,
260
+
.machine_check = machine_check_generic,
261
+
.platform = "ppc750",
262
+
},
263
+
{ /* 750CL (and "Broadway") */
264
+
.pvr_mask = 0xfffff0e0,
265
+
.pvr_value = 0x00087000,
266
+
.cpu_name = "750CL",
267
+
.cpu_features = CPU_FTRS_750CL,
268
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
269
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
270
+
.icache_bsize = 32,
271
+
.dcache_bsize = 32,
272
+
.num_pmcs = 4,
273
+
.pmc_type = PPC_PMC_IBM,
274
+
.cpu_setup = __setup_cpu_750,
275
+
.machine_check = machine_check_generic,
276
+
.platform = "ppc750",
277
+
},
278
+
{ /* 745/755 */
279
+
.pvr_mask = 0xfffff000,
280
+
.pvr_value = 0x00083000,
281
+
.cpu_name = "745/755",
282
+
.cpu_features = CPU_FTRS_750,
283
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
284
+
.mmu_features = MMU_FTR_HPTE_TABLE,
285
+
.icache_bsize = 32,
286
+
.dcache_bsize = 32,
287
+
.num_pmcs = 4,
288
+
.pmc_type = PPC_PMC_IBM,
289
+
.cpu_setup = __setup_cpu_750,
290
+
.machine_check = machine_check_generic,
291
+
.platform = "ppc750",
292
+
},
293
+
{ /* 750FX rev 1.x */
294
+
.pvr_mask = 0xffffff00,
295
+
.pvr_value = 0x70000100,
296
+
.cpu_name = "750FX",
297
+
.cpu_features = CPU_FTRS_750FX1,
298
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
299
+
.mmu_features = MMU_FTR_HPTE_TABLE,
300
+
.icache_bsize = 32,
301
+
.dcache_bsize = 32,
302
+
.num_pmcs = 4,
303
+
.pmc_type = PPC_PMC_IBM,
304
+
.cpu_setup = __setup_cpu_750,
305
+
.machine_check = machine_check_generic,
306
+
.platform = "ppc750",
307
+
},
308
+
{ /* 750FX rev 2.0 must disable HID0[DPM] */
309
+
.pvr_mask = 0xffffffff,
310
+
.pvr_value = 0x70000200,
311
+
.cpu_name = "750FX",
312
+
.cpu_features = CPU_FTRS_750FX2,
313
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
314
+
.mmu_features = MMU_FTR_HPTE_TABLE,
315
+
.icache_bsize = 32,
316
+
.dcache_bsize = 32,
317
+
.num_pmcs = 4,
318
+
.pmc_type = PPC_PMC_IBM,
319
+
.cpu_setup = __setup_cpu_750,
320
+
.machine_check = machine_check_generic,
321
+
.platform = "ppc750",
322
+
},
323
+
{ /* 750FX (All revs except 2.0) */
324
+
.pvr_mask = 0xffff0000,
325
+
.pvr_value = 0x70000000,
326
+
.cpu_name = "750FX",
327
+
.cpu_features = CPU_FTRS_750FX,
328
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
329
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
330
+
.icache_bsize = 32,
331
+
.dcache_bsize = 32,
332
+
.num_pmcs = 4,
333
+
.pmc_type = PPC_PMC_IBM,
334
+
.cpu_setup = __setup_cpu_750fx,
335
+
.machine_check = machine_check_generic,
336
+
.platform = "ppc750",
337
+
},
338
+
{ /* 750GX */
339
+
.pvr_mask = 0xffff0000,
340
+
.pvr_value = 0x70020000,
341
+
.cpu_name = "750GX",
342
+
.cpu_features = CPU_FTRS_750GX,
343
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
344
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
345
+
.icache_bsize = 32,
346
+
.dcache_bsize = 32,
347
+
.num_pmcs = 4,
348
+
.pmc_type = PPC_PMC_IBM,
349
+
.cpu_setup = __setup_cpu_750fx,
350
+
.machine_check = machine_check_generic,
351
+
.platform = "ppc750",
352
+
},
353
+
{ /* 740/750 (L2CR bit need fixup for 740) */
354
+
.pvr_mask = 0xffff0000,
355
+
.pvr_value = 0x00080000,
356
+
.cpu_name = "740/750",
357
+
.cpu_features = CPU_FTRS_740,
358
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
359
+
.mmu_features = MMU_FTR_HPTE_TABLE,
360
+
.icache_bsize = 32,
361
+
.dcache_bsize = 32,
362
+
.num_pmcs = 4,
363
+
.pmc_type = PPC_PMC_IBM,
364
+
.cpu_setup = __setup_cpu_750,
365
+
.machine_check = machine_check_generic,
366
+
.platform = "ppc750",
367
+
},
368
+
{ /* 7400 rev 1.1 ? (no TAU) */
369
+
.pvr_mask = 0xffffffff,
370
+
.pvr_value = 0x000c1101,
371
+
.cpu_name = "7400 (1.1)",
372
+
.cpu_features = CPU_FTRS_7400_NOTAU,
373
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
374
+
PPC_FEATURE_PPC_LE,
375
+
.mmu_features = MMU_FTR_HPTE_TABLE,
376
+
.icache_bsize = 32,
377
+
.dcache_bsize = 32,
378
+
.num_pmcs = 4,
379
+
.pmc_type = PPC_PMC_G4,
380
+
.cpu_setup = __setup_cpu_7400,
381
+
.machine_check = machine_check_generic,
382
+
.platform = "ppc7400",
383
+
},
384
+
{ /* 7400 */
385
+
.pvr_mask = 0xffff0000,
386
+
.pvr_value = 0x000c0000,
387
+
.cpu_name = "7400",
388
+
.cpu_features = CPU_FTRS_7400,
389
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
390
+
PPC_FEATURE_PPC_LE,
391
+
.mmu_features = MMU_FTR_HPTE_TABLE,
392
+
.icache_bsize = 32,
393
+
.dcache_bsize = 32,
394
+
.num_pmcs = 4,
395
+
.pmc_type = PPC_PMC_G4,
396
+
.cpu_setup = __setup_cpu_7400,
397
+
.machine_check = machine_check_generic,
398
+
.platform = "ppc7400",
399
+
},
400
+
{ /* 7410 */
401
+
.pvr_mask = 0xffff0000,
402
+
.pvr_value = 0x800c0000,
403
+
.cpu_name = "7410",
404
+
.cpu_features = CPU_FTRS_7400,
405
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
406
+
PPC_FEATURE_PPC_LE,
407
+
.mmu_features = MMU_FTR_HPTE_TABLE,
408
+
.icache_bsize = 32,
409
+
.dcache_bsize = 32,
410
+
.num_pmcs = 4,
411
+
.pmc_type = PPC_PMC_G4,
412
+
.cpu_setup = __setup_cpu_7410,
413
+
.machine_check = machine_check_generic,
414
+
.platform = "ppc7400",
415
+
},
416
+
{ /* 7450 2.0 - no doze/nap */
417
+
.pvr_mask = 0xffffffff,
418
+
.pvr_value = 0x80000200,
419
+
.cpu_name = "7450",
420
+
.cpu_features = CPU_FTRS_7450_20,
421
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
422
+
PPC_FEATURE_PPC_LE,
423
+
.mmu_features = MMU_FTR_HPTE_TABLE,
424
+
.icache_bsize = 32,
425
+
.dcache_bsize = 32,
426
+
.num_pmcs = 6,
427
+
.pmc_type = PPC_PMC_G4,
428
+
.cpu_setup = __setup_cpu_745x,
429
+
.machine_check = machine_check_generic,
430
+
.platform = "ppc7450",
431
+
},
432
+
{ /* 7450 2.1 */
433
+
.pvr_mask = 0xffffffff,
434
+
.pvr_value = 0x80000201,
435
+
.cpu_name = "7450",
436
+
.cpu_features = CPU_FTRS_7450_21,
437
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
438
+
PPC_FEATURE_PPC_LE,
439
+
.mmu_features = MMU_FTR_HPTE_TABLE,
440
+
.icache_bsize = 32,
441
+
.dcache_bsize = 32,
442
+
.num_pmcs = 6,
443
+
.pmc_type = PPC_PMC_G4,
444
+
.cpu_setup = __setup_cpu_745x,
445
+
.machine_check = machine_check_generic,
446
+
.platform = "ppc7450",
447
+
},
448
+
{ /* 7450 2.3 and newer */
449
+
.pvr_mask = 0xffff0000,
450
+
.pvr_value = 0x80000000,
451
+
.cpu_name = "7450",
452
+
.cpu_features = CPU_FTRS_7450_23,
453
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
454
+
PPC_FEATURE_PPC_LE,
455
+
.mmu_features = MMU_FTR_HPTE_TABLE,
456
+
.icache_bsize = 32,
457
+
.dcache_bsize = 32,
458
+
.num_pmcs = 6,
459
+
.pmc_type = PPC_PMC_G4,
460
+
.cpu_setup = __setup_cpu_745x,
461
+
.machine_check = machine_check_generic,
462
+
.platform = "ppc7450",
463
+
},
464
+
{ /* 7455 rev 1.x */
465
+
.pvr_mask = 0xffffff00,
466
+
.pvr_value = 0x80010100,
467
+
.cpu_name = "7455",
468
+
.cpu_features = CPU_FTRS_7455_1,
469
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
470
+
PPC_FEATURE_PPC_LE,
471
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
472
+
.icache_bsize = 32,
473
+
.dcache_bsize = 32,
474
+
.num_pmcs = 6,
475
+
.pmc_type = PPC_PMC_G4,
476
+
.cpu_setup = __setup_cpu_745x,
477
+
.machine_check = machine_check_generic,
478
+
.platform = "ppc7450",
479
+
},
480
+
{ /* 7455 rev 2.0 */
481
+
.pvr_mask = 0xffffffff,
482
+
.pvr_value = 0x80010200,
483
+
.cpu_name = "7455",
484
+
.cpu_features = CPU_FTRS_7455_20,
485
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
486
+
PPC_FEATURE_PPC_LE,
487
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
488
+
.icache_bsize = 32,
489
+
.dcache_bsize = 32,
490
+
.num_pmcs = 6,
491
+
.pmc_type = PPC_PMC_G4,
492
+
.cpu_setup = __setup_cpu_745x,
493
+
.machine_check = machine_check_generic,
494
+
.platform = "ppc7450",
495
+
},
496
+
{ /* 7455 others */
497
+
.pvr_mask = 0xffff0000,
498
+
.pvr_value = 0x80010000,
499
+
.cpu_name = "7455",
500
+
.cpu_features = CPU_FTRS_7455,
501
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
502
+
PPC_FEATURE_PPC_LE,
503
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
504
+
.icache_bsize = 32,
505
+
.dcache_bsize = 32,
506
+
.num_pmcs = 6,
507
+
.pmc_type = PPC_PMC_G4,
508
+
.cpu_setup = __setup_cpu_745x,
509
+
.machine_check = machine_check_generic,
510
+
.platform = "ppc7450",
511
+
},
512
+
{ /* 7447/7457 Rev 1.0 */
513
+
.pvr_mask = 0xffffffff,
514
+
.pvr_value = 0x80020100,
515
+
.cpu_name = "7447/7457",
516
+
.cpu_features = CPU_FTRS_7447_10,
517
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
518
+
PPC_FEATURE_PPC_LE,
519
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
520
+
.icache_bsize = 32,
521
+
.dcache_bsize = 32,
522
+
.num_pmcs = 6,
523
+
.pmc_type = PPC_PMC_G4,
524
+
.cpu_setup = __setup_cpu_745x,
525
+
.machine_check = machine_check_generic,
526
+
.platform = "ppc7450",
527
+
},
528
+
{ /* 7447/7457 Rev 1.1 */
529
+
.pvr_mask = 0xffffffff,
530
+
.pvr_value = 0x80020101,
531
+
.cpu_name = "7447/7457",
532
+
.cpu_features = CPU_FTRS_7447_10,
533
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
534
+
PPC_FEATURE_PPC_LE,
535
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
536
+
.icache_bsize = 32,
537
+
.dcache_bsize = 32,
538
+
.num_pmcs = 6,
539
+
.pmc_type = PPC_PMC_G4,
540
+
.cpu_setup = __setup_cpu_745x,
541
+
.machine_check = machine_check_generic,
542
+
.platform = "ppc7450",
543
+
},
544
+
{ /* 7447/7457 Rev 1.2 and later */
545
+
.pvr_mask = 0xffff0000,
546
+
.pvr_value = 0x80020000,
547
+
.cpu_name = "7447/7457",
548
+
.cpu_features = CPU_FTRS_7447,
549
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
550
+
PPC_FEATURE_PPC_LE,
551
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
552
+
.icache_bsize = 32,
553
+
.dcache_bsize = 32,
554
+
.num_pmcs = 6,
555
+
.pmc_type = PPC_PMC_G4,
556
+
.cpu_setup = __setup_cpu_745x,
557
+
.machine_check = machine_check_generic,
558
+
.platform = "ppc7450",
559
+
},
560
+
{ /* 7447A */
561
+
.pvr_mask = 0xffff0000,
562
+
.pvr_value = 0x80030000,
563
+
.cpu_name = "7447A",
564
+
.cpu_features = CPU_FTRS_7447A,
565
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
566
+
PPC_FEATURE_PPC_LE,
567
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
568
+
.icache_bsize = 32,
569
+
.dcache_bsize = 32,
570
+
.num_pmcs = 6,
571
+
.pmc_type = PPC_PMC_G4,
572
+
.cpu_setup = __setup_cpu_745x,
573
+
.machine_check = machine_check_generic,
574
+
.platform = "ppc7450",
575
+
},
576
+
{ /* 7448 */
577
+
.pvr_mask = 0xffff0000,
578
+
.pvr_value = 0x80040000,
579
+
.cpu_name = "7448",
580
+
.cpu_features = CPU_FTRS_7448,
581
+
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP |
582
+
PPC_FEATURE_PPC_LE,
583
+
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
584
+
.icache_bsize = 32,
585
+
.dcache_bsize = 32,
586
+
.num_pmcs = 6,
587
+
.pmc_type = PPC_PMC_G4,
588
+
.cpu_setup = __setup_cpu_745x,
589
+
.machine_check = machine_check_generic,
590
+
.platform = "ppc7450",
591
+
},
592
+
{ /* default match, we assume split I/D cache & TB (non-601)... */
593
+
.pvr_mask = 0x00000000,
594
+
.pvr_value = 0x00000000,
595
+
.cpu_name = "(generic PPC)",
596
+
.cpu_features = CPU_FTRS_CLASSIC32,
597
+
.cpu_user_features = COMMON_USER,
598
+
.mmu_features = MMU_FTR_HPTE_TABLE,
599
+
.icache_bsize = 32,
600
+
.dcache_bsize = 32,
601
+
.machine_check = machine_check_generic,
602
+
.platform = "ppc603",
603
+
},
604
+
#endif /* CONFIG_PPC_BOOK3S_604 */
605
+
};
+481
arch/powerpc/kernel/cpu_specs_book3s_64.h
+481
arch/powerpc/kernel/cpu_specs_book3s_64.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
+
/*
3
+
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4
+
*
5
+
* Modifications for ppc64:
6
+
* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7
+
*/
8
+
9
+
/* NOTE:
10
+
* Unlike ppc32, ppc64 will only call cpu_setup() for the boot CPU, it's
11
+
* the responsibility of the appropriate CPU save/restore functions to
12
+
* eventually copy these settings over. Those save/restore aren't yet
13
+
* part of the cputable though. That has to be fixed for both ppc32
14
+
* and ppc64
15
+
*/
16
+
#define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
17
+
PPC_FEATURE_HAS_MMU | PPC_FEATURE_64)
18
+
#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
19
+
#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
20
+
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
21
+
#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
22
+
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
23
+
#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
24
+
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
25
+
PPC_FEATURE_TRUE_LE | \
26
+
PPC_FEATURE_PSERIES_PERFMON_COMPAT)
27
+
#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
28
+
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
29
+
PPC_FEATURE_TRUE_LE | \
30
+
PPC_FEATURE_PSERIES_PERFMON_COMPAT)
31
+
#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
32
+
#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
33
+
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
34
+
PPC_FEATURE_TRUE_LE | \
35
+
PPC_FEATURE_PSERIES_PERFMON_COMPAT)
36
+
#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
37
+
PPC_FEATURE2_HTM_COMP | \
38
+
PPC_FEATURE2_HTM_NOSC_COMP | \
39
+
PPC_FEATURE2_DSCR | \
40
+
PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
41
+
PPC_FEATURE2_VEC_CRYPTO)
42
+
#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
43
+
PPC_FEATURE_TRUE_LE | \
44
+
PPC_FEATURE_HAS_ALTIVEC_COMP)
45
+
#define COMMON_USER_POWER9 COMMON_USER_POWER8
46
+
#define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
47
+
PPC_FEATURE2_ARCH_3_00 | \
48
+
PPC_FEATURE2_HAS_IEEE128 | \
49
+
PPC_FEATURE2_DARN | \
50
+
PPC_FEATURE2_SCV)
51
+
#define COMMON_USER_POWER10 COMMON_USER_POWER9
52
+
#define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \
53
+
PPC_FEATURE2_MMA | \
54
+
PPC_FEATURE2_ARCH_3_00 | \
55
+
PPC_FEATURE2_HAS_IEEE128 | \
56
+
PPC_FEATURE2_DARN | \
57
+
PPC_FEATURE2_SCV | \
58
+
PPC_FEATURE2_ARCH_2_07 | \
59
+
PPC_FEATURE2_DSCR | \
60
+
PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
61
+
PPC_FEATURE2_VEC_CRYPTO)
62
+
63
+
static struct cpu_spec cpu_specs[] __initdata = {
64
+
{ /* PPC970 */
65
+
.pvr_mask = 0xffff0000,
66
+
.pvr_value = 0x00390000,
67
+
.cpu_name = "PPC970",
68
+
.cpu_features = CPU_FTRS_PPC970,
69
+
.cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
70
+
.mmu_features = MMU_FTRS_PPC970,
71
+
.icache_bsize = 128,
72
+
.dcache_bsize = 128,
73
+
.num_pmcs = 8,
74
+
.pmc_type = PPC_PMC_IBM,
75
+
.cpu_setup = __setup_cpu_ppc970,
76
+
.cpu_restore = __restore_cpu_ppc970,
77
+
.platform = "ppc970",
78
+
},
79
+
{ /* PPC970FX */
80
+
.pvr_mask = 0xffff0000,
81
+
.pvr_value = 0x003c0000,
82
+
.cpu_name = "PPC970FX",
83
+
.cpu_features = CPU_FTRS_PPC970,
84
+
.cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
85
+
.mmu_features = MMU_FTRS_PPC970,
86
+
.icache_bsize = 128,
87
+
.dcache_bsize = 128,
88
+
.num_pmcs = 8,
89
+
.pmc_type = PPC_PMC_IBM,
90
+
.cpu_setup = __setup_cpu_ppc970,
91
+
.cpu_restore = __restore_cpu_ppc970,
92
+
.platform = "ppc970",
93
+
},
94
+
{ /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
95
+
.pvr_mask = 0xffffffff,
96
+
.pvr_value = 0x00440100,
97
+
.cpu_name = "PPC970MP",
98
+
.cpu_features = CPU_FTRS_PPC970,
99
+
.cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
100
+
.mmu_features = MMU_FTRS_PPC970,
101
+
.icache_bsize = 128,
102
+
.dcache_bsize = 128,
103
+
.num_pmcs = 8,
104
+
.pmc_type = PPC_PMC_IBM,
105
+
.cpu_setup = __setup_cpu_ppc970,
106
+
.cpu_restore = __restore_cpu_ppc970,
107
+
.platform = "ppc970",
108
+
},
109
+
{ /* PPC970MP */
110
+
.pvr_mask = 0xffff0000,
111
+
.pvr_value = 0x00440000,
112
+
.cpu_name = "PPC970MP",
113
+
.cpu_features = CPU_FTRS_PPC970,
114
+
.cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
115
+
.mmu_features = MMU_FTRS_PPC970,
116
+
.icache_bsize = 128,
117
+
.dcache_bsize = 128,
118
+
.num_pmcs = 8,
119
+
.pmc_type = PPC_PMC_IBM,
120
+
.cpu_setup = __setup_cpu_ppc970MP,
121
+
.cpu_restore = __restore_cpu_ppc970,
122
+
.platform = "ppc970",
123
+
},
124
+
{ /* PPC970GX */
125
+
.pvr_mask = 0xffff0000,
126
+
.pvr_value = 0x00450000,
127
+
.cpu_name = "PPC970GX",
128
+
.cpu_features = CPU_FTRS_PPC970,
129
+
.cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP,
130
+
.mmu_features = MMU_FTRS_PPC970,
131
+
.icache_bsize = 128,
132
+
.dcache_bsize = 128,
133
+
.num_pmcs = 8,
134
+
.pmc_type = PPC_PMC_IBM,
135
+
.cpu_setup = __setup_cpu_ppc970,
136
+
.platform = "ppc970",
137
+
},
138
+
{ /* Power5 GR */
139
+
.pvr_mask = 0xffff0000,
140
+
.pvr_value = 0x003a0000,
141
+
.cpu_name = "POWER5 (gr)",
142
+
.cpu_features = CPU_FTRS_POWER5,
143
+
.cpu_user_features = COMMON_USER_POWER5,
144
+
.mmu_features = MMU_FTRS_POWER5,
145
+
.icache_bsize = 128,
146
+
.dcache_bsize = 128,
147
+
.num_pmcs = 6,
148
+
.pmc_type = PPC_PMC_IBM,
149
+
.platform = "power5",
150
+
},
151
+
{ /* Power5++ */
152
+
.pvr_mask = 0xffffff00,
153
+
.pvr_value = 0x003b0300,
154
+
.cpu_name = "POWER5+ (gs)",
155
+
.cpu_features = CPU_FTRS_POWER5,
156
+
.cpu_user_features = COMMON_USER_POWER5_PLUS,
157
+
.mmu_features = MMU_FTRS_POWER5,
158
+
.icache_bsize = 128,
159
+
.dcache_bsize = 128,
160
+
.num_pmcs = 6,
161
+
.platform = "power5+",
162
+
},
163
+
{ /* Power5 GS */
164
+
.pvr_mask = 0xffff0000,
165
+
.pvr_value = 0x003b0000,
166
+
.cpu_name = "POWER5+ (gs)",
167
+
.cpu_features = CPU_FTRS_POWER5,
168
+
.cpu_user_features = COMMON_USER_POWER5_PLUS,
169
+
.mmu_features = MMU_FTRS_POWER5,
170
+
.icache_bsize = 128,
171
+
.dcache_bsize = 128,
172
+
.num_pmcs = 6,
173
+
.pmc_type = PPC_PMC_IBM,
174
+
.platform = "power5+",
175
+
},
176
+
{ /* POWER6 in P5+ mode; 2.04-compliant processor */
177
+
.pvr_mask = 0xffffffff,
178
+
.pvr_value = 0x0f000001,
179
+
.cpu_name = "POWER5+",
180
+
.cpu_features = CPU_FTRS_POWER5,
181
+
.cpu_user_features = COMMON_USER_POWER5_PLUS,
182
+
.mmu_features = MMU_FTRS_POWER5,
183
+
.icache_bsize = 128,
184
+
.dcache_bsize = 128,
185
+
.platform = "power5+",
186
+
},
187
+
{ /* Power6 */
188
+
.pvr_mask = 0xffff0000,
189
+
.pvr_value = 0x003e0000,
190
+
.cpu_name = "POWER6 (raw)",
191
+
.cpu_features = CPU_FTRS_POWER6,
192
+
.cpu_user_features = COMMON_USER_POWER6 | PPC_FEATURE_POWER6_EXT,
193
+
.mmu_features = MMU_FTRS_POWER6,
194
+
.icache_bsize = 128,
195
+
.dcache_bsize = 128,
196
+
.num_pmcs = 6,
197
+
.pmc_type = PPC_PMC_IBM,
198
+
.platform = "power6x",
199
+
},
200
+
{ /* 2.05-compliant processor, i.e. Power6 "architected" mode */
201
+
.pvr_mask = 0xffffffff,
202
+
.pvr_value = 0x0f000002,
203
+
.cpu_name = "POWER6 (architected)",
204
+
.cpu_features = CPU_FTRS_POWER6,
205
+
.cpu_user_features = COMMON_USER_POWER6,
206
+
.mmu_features = MMU_FTRS_POWER6,
207
+
.icache_bsize = 128,
208
+
.dcache_bsize = 128,
209
+
.platform = "power6",
210
+
},
211
+
{ /* 2.06-compliant processor, i.e. Power7 "architected" mode */
212
+
.pvr_mask = 0xffffffff,
213
+
.pvr_value = 0x0f000003,
214
+
.cpu_name = "POWER7 (architected)",
215
+
.cpu_features = CPU_FTRS_POWER7,
216
+
.cpu_user_features = COMMON_USER_POWER7,
217
+
.cpu_user_features2 = COMMON_USER2_POWER7,
218
+
.mmu_features = MMU_FTRS_POWER7,
219
+
.icache_bsize = 128,
220
+
.dcache_bsize = 128,
221
+
.cpu_setup = __setup_cpu_power7,
222
+
.cpu_restore = __restore_cpu_power7,
223
+
.machine_check_early = __machine_check_early_realmode_p7,
224
+
.platform = "power7",
225
+
},
226
+
{ /* 2.07-compliant processor, i.e. Power8 "architected" mode */
227
+
.pvr_mask = 0xffffffff,
228
+
.pvr_value = 0x0f000004,
229
+
.cpu_name = "POWER8 (architected)",
230
+
.cpu_features = CPU_FTRS_POWER8,
231
+
.cpu_user_features = COMMON_USER_POWER8,
232
+
.cpu_user_features2 = COMMON_USER2_POWER8,
233
+
.mmu_features = MMU_FTRS_POWER8,
234
+
.icache_bsize = 128,
235
+
.dcache_bsize = 128,
236
+
.cpu_setup = __setup_cpu_power8,
237
+
.cpu_restore = __restore_cpu_power8,
238
+
.machine_check_early = __machine_check_early_realmode_p8,
239
+
.platform = "power8",
240
+
},
241
+
{ /* 3.00-compliant processor, i.e. Power9 "architected" mode */
242
+
.pvr_mask = 0xffffffff,
243
+
.pvr_value = 0x0f000005,
244
+
.cpu_name = "POWER9 (architected)",
245
+
.cpu_features = CPU_FTRS_POWER9,
246
+
.cpu_user_features = COMMON_USER_POWER9,
247
+
.cpu_user_features2 = COMMON_USER2_POWER9,
248
+
.mmu_features = MMU_FTRS_POWER9,
249
+
.icache_bsize = 128,
250
+
.dcache_bsize = 128,
251
+
.cpu_setup = __setup_cpu_power9,
252
+
.cpu_restore = __restore_cpu_power9,
253
+
.platform = "power9",
254
+
},
255
+
{ /* 3.1-compliant processor, i.e. Power10 "architected" mode */
256
+
.pvr_mask = 0xffffffff,
257
+
.pvr_value = 0x0f000006,
258
+
.cpu_name = "POWER10 (architected)",
259
+
.cpu_features = CPU_FTRS_POWER10,
260
+
.cpu_user_features = COMMON_USER_POWER10,
261
+
.cpu_user_features2 = COMMON_USER2_POWER10,
262
+
.mmu_features = MMU_FTRS_POWER10,
263
+
.icache_bsize = 128,
264
+
.dcache_bsize = 128,
265
+
.cpu_setup = __setup_cpu_power10,
266
+
.cpu_restore = __restore_cpu_power10,
267
+
.platform = "power10",
268
+
},
269
+
{ /* Power7 */
270
+
.pvr_mask = 0xffff0000,
271
+
.pvr_value = 0x003f0000,
272
+
.cpu_name = "POWER7 (raw)",
273
+
.cpu_features = CPU_FTRS_POWER7,
274
+
.cpu_user_features = COMMON_USER_POWER7,
275
+
.cpu_user_features2 = COMMON_USER2_POWER7,
276
+
.mmu_features = MMU_FTRS_POWER7,
277
+
.icache_bsize = 128,
278
+
.dcache_bsize = 128,
279
+
.num_pmcs = 6,
280
+
.pmc_type = PPC_PMC_IBM,
281
+
.cpu_setup = __setup_cpu_power7,
282
+
.cpu_restore = __restore_cpu_power7,
283
+
.machine_check_early = __machine_check_early_realmode_p7,
284
+
.platform = "power7",
285
+
},
286
+
{ /* Power7+ */
287
+
.pvr_mask = 0xffff0000,
288
+
.pvr_value = 0x004A0000,
289
+
.cpu_name = "POWER7+ (raw)",
290
+
.cpu_features = CPU_FTRS_POWER7,
291
+
.cpu_user_features = COMMON_USER_POWER7,
292
+
.cpu_user_features2 = COMMON_USER2_POWER7,
293
+
.mmu_features = MMU_FTRS_POWER7,
294
+
.icache_bsize = 128,
295
+
.dcache_bsize = 128,
296
+
.num_pmcs = 6,
297
+
.pmc_type = PPC_PMC_IBM,
298
+
.cpu_setup = __setup_cpu_power7,
299
+
.cpu_restore = __restore_cpu_power7,
300
+
.machine_check_early = __machine_check_early_realmode_p7,
301
+
.platform = "power7+",
302
+
},
303
+
{ /* Power8E */
304
+
.pvr_mask = 0xffff0000,
305
+
.pvr_value = 0x004b0000,
306
+
.cpu_name = "POWER8E (raw)",
307
+
.cpu_features = CPU_FTRS_POWER8E,
308
+
.cpu_user_features = COMMON_USER_POWER8,
309
+
.cpu_user_features2 = COMMON_USER2_POWER8,
310
+
.mmu_features = MMU_FTRS_POWER8,
311
+
.icache_bsize = 128,
312
+
.dcache_bsize = 128,
313
+
.num_pmcs = 6,
314
+
.pmc_type = PPC_PMC_IBM,
315
+
.cpu_setup = __setup_cpu_power8,
316
+
.cpu_restore = __restore_cpu_power8,
317
+
.machine_check_early = __machine_check_early_realmode_p8,
318
+
.platform = "power8",
319
+
},
320
+
{ /* Power8NVL */
321
+
.pvr_mask = 0xffff0000,
322
+
.pvr_value = 0x004c0000,
323
+
.cpu_name = "POWER8NVL (raw)",
324
+
.cpu_features = CPU_FTRS_POWER8,
325
+
.cpu_user_features = COMMON_USER_POWER8,
326
+
.cpu_user_features2 = COMMON_USER2_POWER8,
327
+
.mmu_features = MMU_FTRS_POWER8,
328
+
.icache_bsize = 128,
329
+
.dcache_bsize = 128,
330
+
.num_pmcs = 6,
331
+
.pmc_type = PPC_PMC_IBM,
332
+
.cpu_setup = __setup_cpu_power8,
333
+
.cpu_restore = __restore_cpu_power8,
334
+
.machine_check_early = __machine_check_early_realmode_p8,
335
+
.platform = "power8",
336
+
},
337
+
{ /* Power8 */
338
+
.pvr_mask = 0xffff0000,
339
+
.pvr_value = 0x004d0000,
340
+
.cpu_name = "POWER8 (raw)",
341
+
.cpu_features = CPU_FTRS_POWER8,
342
+
.cpu_user_features = COMMON_USER_POWER8,
343
+
.cpu_user_features2 = COMMON_USER2_POWER8,
344
+
.mmu_features = MMU_FTRS_POWER8,
345
+
.icache_bsize = 128,
346
+
.dcache_bsize = 128,
347
+
.num_pmcs = 6,
348
+
.pmc_type = PPC_PMC_IBM,
349
+
.cpu_setup = __setup_cpu_power8,
350
+
.cpu_restore = __restore_cpu_power8,
351
+
.machine_check_early = __machine_check_early_realmode_p8,
352
+
.platform = "power8",
353
+
},
354
+
{ /* Power9 DD2.0 */
355
+
.pvr_mask = 0xffffefff,
356
+
.pvr_value = 0x004e0200,
357
+
.cpu_name = "POWER9 (raw)",
358
+
.cpu_features = CPU_FTRS_POWER9_DD2_0,
359
+
.cpu_user_features = COMMON_USER_POWER9,
360
+
.cpu_user_features2 = COMMON_USER2_POWER9,
361
+
.mmu_features = MMU_FTRS_POWER9,
362
+
.icache_bsize = 128,
363
+
.dcache_bsize = 128,
364
+
.num_pmcs = 6,
365
+
.pmc_type = PPC_PMC_IBM,
366
+
.cpu_setup = __setup_cpu_power9,
367
+
.cpu_restore = __restore_cpu_power9,
368
+
.machine_check_early = __machine_check_early_realmode_p9,
369
+
.platform = "power9",
370
+
},
371
+
{ /* Power9 DD 2.1 */
372
+
.pvr_mask = 0xffffefff,
373
+
.pvr_value = 0x004e0201,
374
+
.cpu_name = "POWER9 (raw)",
375
+
.cpu_features = CPU_FTRS_POWER9_DD2_1,
376
+
.cpu_user_features = COMMON_USER_POWER9,
377
+
.cpu_user_features2 = COMMON_USER2_POWER9,
378
+
.mmu_features = MMU_FTRS_POWER9,
379
+
.icache_bsize = 128,
380
+
.dcache_bsize = 128,
381
+
.num_pmcs = 6,
382
+
.pmc_type = PPC_PMC_IBM,
383
+
.cpu_setup = __setup_cpu_power9,
384
+
.cpu_restore = __restore_cpu_power9,
385
+
.machine_check_early = __machine_check_early_realmode_p9,
386
+
.platform = "power9",
387
+
},
388
+
{ /* Power9 DD2.2 */
389
+
.pvr_mask = 0xffffefff,
390
+
.pvr_value = 0x004e0202,
391
+
.cpu_name = "POWER9 (raw)",
392
+
.cpu_features = CPU_FTRS_POWER9_DD2_2,
393
+
.cpu_user_features = COMMON_USER_POWER9,
394
+
.cpu_user_features2 = COMMON_USER2_POWER9,
395
+
.mmu_features = MMU_FTRS_POWER9,
396
+
.icache_bsize = 128,
397
+
.dcache_bsize = 128,
398
+
.num_pmcs = 6,
399
+
.pmc_type = PPC_PMC_IBM,
400
+
.cpu_setup = __setup_cpu_power9,
401
+
.cpu_restore = __restore_cpu_power9,
402
+
.machine_check_early = __machine_check_early_realmode_p9,
403
+
.platform = "power9",
404
+
},
405
+
{ /* Power9 DD2.3 or later */
406
+
.pvr_mask = 0xffff0000,
407
+
.pvr_value = 0x004e0000,
408
+
.cpu_name = "POWER9 (raw)",
409
+
.cpu_features = CPU_FTRS_POWER9_DD2_3,
410
+
.cpu_user_features = COMMON_USER_POWER9,
411
+
.cpu_user_features2 = COMMON_USER2_POWER9,
412
+
.mmu_features = MMU_FTRS_POWER9,
413
+
.icache_bsize = 128,
414
+
.dcache_bsize = 128,
415
+
.num_pmcs = 6,
416
+
.pmc_type = PPC_PMC_IBM,
417
+
.cpu_setup = __setup_cpu_power9,
418
+
.cpu_restore = __restore_cpu_power9,
419
+
.machine_check_early = __machine_check_early_realmode_p9,
420
+
.platform = "power9",
421
+
},
422
+
{ /* Power10 */
423
+
.pvr_mask = 0xffff0000,
424
+
.pvr_value = 0x00800000,
425
+
.cpu_name = "POWER10 (raw)",
426
+
.cpu_features = CPU_FTRS_POWER10,
427
+
.cpu_user_features = COMMON_USER_POWER10,
428
+
.cpu_user_features2 = COMMON_USER2_POWER10,
429
+
.mmu_features = MMU_FTRS_POWER10,
430
+
.icache_bsize = 128,
431
+
.dcache_bsize = 128,
432
+
.num_pmcs = 6,
433
+
.pmc_type = PPC_PMC_IBM,
434
+
.cpu_setup = __setup_cpu_power10,
435
+
.cpu_restore = __restore_cpu_power10,
436
+
.machine_check_early = __machine_check_early_realmode_p10,
437
+
.platform = "power10",
438
+
},
439
+
{ /* Cell Broadband Engine */
440
+
.pvr_mask = 0xffff0000,
441
+
.pvr_value = 0x00700000,
442
+
.cpu_name = "Cell Broadband Engine",
443
+
.cpu_features = CPU_FTRS_CELL,
444
+
.cpu_user_features = COMMON_USER_PPC64 | PPC_FEATURE_CELL |
445
+
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_SMT,
446
+
.mmu_features = MMU_FTRS_CELL,
447
+
.icache_bsize = 128,
448
+
.dcache_bsize = 128,
449
+
.num_pmcs = 4,
450
+
.pmc_type = PPC_PMC_IBM,
451
+
.platform = "ppc-cell-be",
452
+
},
453
+
{ /* PA Semi PA6T */
454
+
.pvr_mask = 0x7fff0000,
455
+
.pvr_value = 0x00900000,
456
+
.cpu_name = "PA6T",
457
+
.cpu_features = CPU_FTRS_PA6T,
458
+
.cpu_user_features = COMMON_USER_PA6T,
459
+
.mmu_features = MMU_FTRS_PA6T,
460
+
.icache_bsize = 64,
461
+
.dcache_bsize = 64,
462
+
.num_pmcs = 6,
463
+
.pmc_type = PPC_PMC_PA6T,
464
+
.cpu_setup = __setup_cpu_pa6t,
465
+
.cpu_restore = __restore_cpu_pa6t,
466
+
.platform = "pa6t",
467
+
},
468
+
{ /* default match */
469
+
.pvr_mask = 0x00000000,
470
+
.pvr_value = 0x00000000,
471
+
.cpu_name = "POWER5 (compatible)",
472
+
.cpu_features = CPU_FTRS_COMPATIBLE,
473
+
.cpu_user_features = COMMON_USER_PPC64,
474
+
.mmu_features = MMU_FTRS_POWER,
475
+
.icache_bsize = 128,
476
+
.dcache_bsize = 128,
477
+
.num_pmcs = 6,
478
+
.pmc_type = PPC_PMC_IBM,
479
+
.platform = "power5",
480
+
}
481
+
};
+135
arch/powerpc/kernel/cpu_specs_e500.h
+135
arch/powerpc/kernel/cpu_specs_e500.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
+
/*
3
+
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4
+
*
5
+
* Modifications for ppc64:
6
+
* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7
+
*/
8
+
9
+
#ifdef CONFIG_PPC64
10
+
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
11
+
PPC_FEATURE_HAS_FPU | PPC_FEATURE_64)
12
+
#else
13
+
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
14
+
PPC_FEATURE_BOOKE)
15
+
#endif
16
+
17
+
static struct cpu_spec cpu_specs[] __initdata = {
18
+
#ifdef CONFIG_PPC32
19
+
#ifndef CONFIG_PPC_E500MC
20
+
{ /* e500 */
21
+
.pvr_mask = 0xffff0000,
22
+
.pvr_value = 0x80200000,
23
+
.cpu_name = "e500",
24
+
.cpu_features = CPU_FTRS_E500,
25
+
.cpu_user_features = COMMON_USER_BOOKE |
26
+
PPC_FEATURE_HAS_SPE_COMP |
27
+
PPC_FEATURE_HAS_EFP_SINGLE_COMP,
28
+
.cpu_user_features2 = PPC_FEATURE2_ISEL,
29
+
.mmu_features = MMU_FTR_TYPE_FSL_E,
30
+
.icache_bsize = 32,
31
+
.dcache_bsize = 32,
32
+
.num_pmcs = 4,
33
+
.cpu_setup = __setup_cpu_e500v1,
34
+
.machine_check = machine_check_e500,
35
+
.platform = "ppc8540",
36
+
},
37
+
{ /* e500v2 */
38
+
.pvr_mask = 0xffff0000,
39
+
.pvr_value = 0x80210000,
40
+
.cpu_name = "e500v2",
41
+
.cpu_features = CPU_FTRS_E500_2,
42
+
.cpu_user_features = COMMON_USER_BOOKE |
43
+
PPC_FEATURE_HAS_SPE_COMP |
44
+
PPC_FEATURE_HAS_EFP_SINGLE_COMP |
45
+
PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
46
+
.cpu_user_features2 = PPC_FEATURE2_ISEL,
47
+
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
48
+
.icache_bsize = 32,
49
+
.dcache_bsize = 32,
50
+
.num_pmcs = 4,
51
+
.cpu_setup = __setup_cpu_e500v2,
52
+
.machine_check = machine_check_e500,
53
+
.platform = "ppc8548",
54
+
.cpu_down_flush = cpu_down_flush_e500v2,
55
+
},
56
+
#else
57
+
{ /* e500mc */
58
+
.pvr_mask = 0xffff0000,
59
+
.pvr_value = 0x80230000,
60
+
.cpu_name = "e500mc",
61
+
.cpu_features = CPU_FTRS_E500MC,
62
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
63
+
.cpu_user_features2 = PPC_FEATURE2_ISEL,
64
+
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
65
+
MMU_FTR_USE_TLBILX,
66
+
.icache_bsize = 64,
67
+
.dcache_bsize = 64,
68
+
.num_pmcs = 4,
69
+
.cpu_setup = __setup_cpu_e500mc,
70
+
.machine_check = machine_check_e500mc,
71
+
.platform = "ppce500mc",
72
+
.cpu_down_flush = cpu_down_flush_e500mc,
73
+
},
74
+
#endif /* CONFIG_PPC_E500MC */
75
+
#endif /* CONFIG_PPC32 */
76
+
#ifdef CONFIG_PPC_E500MC
77
+
{ /* e5500 */
78
+
.pvr_mask = 0xffff0000,
79
+
.pvr_value = 0x80240000,
80
+
.cpu_name = "e5500",
81
+
.cpu_features = CPU_FTRS_E5500,
82
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
83
+
.cpu_user_features2 = PPC_FEATURE2_ISEL,
84
+
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
85
+
MMU_FTR_USE_TLBILX,
86
+
.icache_bsize = 64,
87
+
.dcache_bsize = 64,
88
+
.num_pmcs = 4,
89
+
.cpu_setup = __setup_cpu_e5500,
90
+
#ifndef CONFIG_PPC32
91
+
.cpu_restore = __restore_cpu_e5500,
92
+
#endif
93
+
.machine_check = machine_check_e500mc,
94
+
.platform = "ppce5500",
95
+
.cpu_down_flush = cpu_down_flush_e5500,
96
+
},
97
+
{ /* e6500 */
98
+
.pvr_mask = 0xffff0000,
99
+
.pvr_value = 0x80400000,
100
+
.cpu_name = "e6500",
101
+
.cpu_features = CPU_FTRS_E6500,
102
+
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
103
+
PPC_FEATURE_HAS_ALTIVEC_COMP,
104
+
.cpu_user_features2 = PPC_FEATURE2_ISEL,
105
+
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
106
+
MMU_FTR_USE_TLBILX,
107
+
.icache_bsize = 64,
108
+
.dcache_bsize = 64,
109
+
.num_pmcs = 6,
110
+
.cpu_setup = __setup_cpu_e6500,
111
+
#ifndef CONFIG_PPC32
112
+
.cpu_restore = __restore_cpu_e6500,
113
+
#endif
114
+
.machine_check = machine_check_e500mc,
115
+
.platform = "ppce6500",
116
+
.cpu_down_flush = cpu_down_flush_e6500,
117
+
},
118
+
#endif /* CONFIG_PPC_E500MC */
119
+
#ifdef CONFIG_PPC32
120
+
{ /* default match */
121
+
.pvr_mask = 0x00000000,
122
+
.pvr_value = 0x00000000,
123
+
.cpu_name = "(generic E500 PPC)",
124
+
.cpu_features = CPU_FTRS_E500,
125
+
.cpu_user_features = COMMON_USER_BOOKE |
126
+
PPC_FEATURE_HAS_SPE_COMP |
127
+
PPC_FEATURE_HAS_EFP_SINGLE_COMP,
128
+
.mmu_features = MMU_FTR_TYPE_FSL_E,
129
+
.icache_bsize = 32,
130
+
.dcache_bsize = 32,
131
+
.machine_check = machine_check_e500,
132
+
.platform = "powerpc",
133
+
}
134
+
#endif /* CONFIG_PPC32 */
135
+
};
+1
-1876
arch/powerpc/kernel/cputable.c
+1
-1876
arch/powerpc/kernel/cputable.c
···
28
28
/* The platform string corresponding to the real PVR */
29
29
const char *powerpc_base_platform;
30
30
31
-
/* NOTE:
32
-
* Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33
-
* the responsibility of the appropriate CPU save/restore functions to
34
-
* eventually copy these settings over. Those save/restore aren't yet
35
-
* part of the cputable though. That has to be fixed for both ppc32
36
-
* and ppc64
37
-
*/
38
-
39
-
/* This table only contains "desktop" CPUs, it need to be filled with embedded
40
-
* ones as well...
41
-
*/
42
-
#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
43
-
PPC_FEATURE_HAS_MMU)
44
-
#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
45
-
#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
46
-
#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
47
-
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
48
-
#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
49
-
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
50
-
#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
51
-
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
52
-
PPC_FEATURE_TRUE_LE | \
53
-
PPC_FEATURE_PSERIES_PERFMON_COMPAT)
54
-
#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
55
-
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
56
-
PPC_FEATURE_TRUE_LE | \
57
-
PPC_FEATURE_PSERIES_PERFMON_COMPAT)
58
-
#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
59
-
#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
60
-
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
61
-
PPC_FEATURE_TRUE_LE | \
62
-
PPC_FEATURE_PSERIES_PERFMON_COMPAT)
63
-
#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
64
-
PPC_FEATURE2_HTM_COMP | \
65
-
PPC_FEATURE2_HTM_NOSC_COMP | \
66
-
PPC_FEATURE2_DSCR | \
67
-
PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
68
-
PPC_FEATURE2_VEC_CRYPTO)
69
-
#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
70
-
PPC_FEATURE_TRUE_LE | \
71
-
PPC_FEATURE_HAS_ALTIVEC_COMP)
72
-
#define COMMON_USER_POWER9 COMMON_USER_POWER8
73
-
#define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
74
-
PPC_FEATURE2_ARCH_3_00 | \
75
-
PPC_FEATURE2_HAS_IEEE128 | \
76
-
PPC_FEATURE2_DARN | \
77
-
PPC_FEATURE2_SCV)
78
-
#define COMMON_USER_POWER10 COMMON_USER_POWER9
79
-
#define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \
80
-
PPC_FEATURE2_MMA | \
81
-
PPC_FEATURE2_ARCH_3_00 | \
82
-
PPC_FEATURE2_HAS_IEEE128 | \
83
-
PPC_FEATURE2_DARN | \
84
-
PPC_FEATURE2_SCV | \
85
-
PPC_FEATURE2_ARCH_2_07 | \
86
-
PPC_FEATURE2_DSCR | \
87
-
PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
88
-
PPC_FEATURE2_VEC_CRYPTO)
89
-
90
-
#ifdef CONFIG_PPC_BOOK3E_64
91
-
#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
92
-
#else
93
-
#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
94
-
PPC_FEATURE_BOOKE)
95
-
#endif
96
-
97
-
static struct cpu_spec __initdata cpu_specs[] = {
98
-
#ifdef CONFIG_PPC_BOOK3S_64
99
-
{ /* PPC970 */
100
-
.pvr_mask = 0xffff0000,
101
-
.pvr_value = 0x00390000,
102
-
.cpu_name = "PPC970",
103
-
.cpu_features = CPU_FTRS_PPC970,
104
-
.cpu_user_features = COMMON_USER_POWER4 |
105
-
PPC_FEATURE_HAS_ALTIVEC_COMP,
106
-
.mmu_features = MMU_FTRS_PPC970,
107
-
.icache_bsize = 128,
108
-
.dcache_bsize = 128,
109
-
.num_pmcs = 8,
110
-
.pmc_type = PPC_PMC_IBM,
111
-
.cpu_setup = __setup_cpu_ppc970,
112
-
.cpu_restore = __restore_cpu_ppc970,
113
-
.platform = "ppc970",
114
-
},
115
-
{ /* PPC970FX */
116
-
.pvr_mask = 0xffff0000,
117
-
.pvr_value = 0x003c0000,
118
-
.cpu_name = "PPC970FX",
119
-
.cpu_features = CPU_FTRS_PPC970,
120
-
.cpu_user_features = COMMON_USER_POWER4 |
121
-
PPC_FEATURE_HAS_ALTIVEC_COMP,
122
-
.mmu_features = MMU_FTRS_PPC970,
123
-
.icache_bsize = 128,
124
-
.dcache_bsize = 128,
125
-
.num_pmcs = 8,
126
-
.pmc_type = PPC_PMC_IBM,
127
-
.cpu_setup = __setup_cpu_ppc970,
128
-
.cpu_restore = __restore_cpu_ppc970,
129
-
.platform = "ppc970",
130
-
},
131
-
{ /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
132
-
.pvr_mask = 0xffffffff,
133
-
.pvr_value = 0x00440100,
134
-
.cpu_name = "PPC970MP",
135
-
.cpu_features = CPU_FTRS_PPC970,
136
-
.cpu_user_features = COMMON_USER_POWER4 |
137
-
PPC_FEATURE_HAS_ALTIVEC_COMP,
138
-
.mmu_features = MMU_FTRS_PPC970,
139
-
.icache_bsize = 128,
140
-
.dcache_bsize = 128,
141
-
.num_pmcs = 8,
142
-
.pmc_type = PPC_PMC_IBM,
143
-
.cpu_setup = __setup_cpu_ppc970,
144
-
.cpu_restore = __restore_cpu_ppc970,
145
-
.platform = "ppc970",
146
-
},
147
-
{ /* PPC970MP */
148
-
.pvr_mask = 0xffff0000,
149
-
.pvr_value = 0x00440000,
150
-
.cpu_name = "PPC970MP",
151
-
.cpu_features = CPU_FTRS_PPC970,
152
-
.cpu_user_features = COMMON_USER_POWER4 |
153
-
PPC_FEATURE_HAS_ALTIVEC_COMP,
154
-
.mmu_features = MMU_FTRS_PPC970,
155
-
.icache_bsize = 128,
156
-
.dcache_bsize = 128,
157
-
.num_pmcs = 8,
158
-
.pmc_type = PPC_PMC_IBM,
159
-
.cpu_setup = __setup_cpu_ppc970MP,
160
-
.cpu_restore = __restore_cpu_ppc970,
161
-
.platform = "ppc970",
162
-
},
163
-
{ /* PPC970GX */
164
-
.pvr_mask = 0xffff0000,
165
-
.pvr_value = 0x00450000,
166
-
.cpu_name = "PPC970GX",
167
-
.cpu_features = CPU_FTRS_PPC970,
168
-
.cpu_user_features = COMMON_USER_POWER4 |
169
-
PPC_FEATURE_HAS_ALTIVEC_COMP,
170
-
.mmu_features = MMU_FTRS_PPC970,
171
-
.icache_bsize = 128,
172
-
.dcache_bsize = 128,
173
-
.num_pmcs = 8,
174
-
.pmc_type = PPC_PMC_IBM,
175
-
.cpu_setup = __setup_cpu_ppc970,
176
-
.platform = "ppc970",
177
-
},
178
-
{ /* Power5 GR */
179
-
.pvr_mask = 0xffff0000,
180
-
.pvr_value = 0x003a0000,
181
-
.cpu_name = "POWER5 (gr)",
182
-
.cpu_features = CPU_FTRS_POWER5,
183
-
.cpu_user_features = COMMON_USER_POWER5,
184
-
.mmu_features = MMU_FTRS_POWER5,
185
-
.icache_bsize = 128,
186
-
.dcache_bsize = 128,
187
-
.num_pmcs = 6,
188
-
.pmc_type = PPC_PMC_IBM,
189
-
.platform = "power5",
190
-
},
191
-
{ /* Power5++ */
192
-
.pvr_mask = 0xffffff00,
193
-
.pvr_value = 0x003b0300,
194
-
.cpu_name = "POWER5+ (gs)",
195
-
.cpu_features = CPU_FTRS_POWER5,
196
-
.cpu_user_features = COMMON_USER_POWER5_PLUS,
197
-
.mmu_features = MMU_FTRS_POWER5,
198
-
.icache_bsize = 128,
199
-
.dcache_bsize = 128,
200
-
.num_pmcs = 6,
201
-
.platform = "power5+",
202
-
},
203
-
{ /* Power5 GS */
204
-
.pvr_mask = 0xffff0000,
205
-
.pvr_value = 0x003b0000,
206
-
.cpu_name = "POWER5+ (gs)",
207
-
.cpu_features = CPU_FTRS_POWER5,
208
-
.cpu_user_features = COMMON_USER_POWER5_PLUS,
209
-
.mmu_features = MMU_FTRS_POWER5,
210
-
.icache_bsize = 128,
211
-
.dcache_bsize = 128,
212
-
.num_pmcs = 6,
213
-
.pmc_type = PPC_PMC_IBM,
214
-
.platform = "power5+",
215
-
},
216
-
{ /* POWER6 in P5+ mode; 2.04-compliant processor */
217
-
.pvr_mask = 0xffffffff,
218
-
.pvr_value = 0x0f000001,
219
-
.cpu_name = "POWER5+",
220
-
.cpu_features = CPU_FTRS_POWER5,
221
-
.cpu_user_features = COMMON_USER_POWER5_PLUS,
222
-
.mmu_features = MMU_FTRS_POWER5,
223
-
.icache_bsize = 128,
224
-
.dcache_bsize = 128,
225
-
.platform = "power5+",
226
-
},
227
-
{ /* Power6 */
228
-
.pvr_mask = 0xffff0000,
229
-
.pvr_value = 0x003e0000,
230
-
.cpu_name = "POWER6 (raw)",
231
-
.cpu_features = CPU_FTRS_POWER6,
232
-
.cpu_user_features = COMMON_USER_POWER6 |
233
-
PPC_FEATURE_POWER6_EXT,
234
-
.mmu_features = MMU_FTRS_POWER6,
235
-
.icache_bsize = 128,
236
-
.dcache_bsize = 128,
237
-
.num_pmcs = 6,
238
-
.pmc_type = PPC_PMC_IBM,
239
-
.platform = "power6x",
240
-
},
241
-
{ /* 2.05-compliant processor, i.e. Power6 "architected" mode */
242
-
.pvr_mask = 0xffffffff,
243
-
.pvr_value = 0x0f000002,
244
-
.cpu_name = "POWER6 (architected)",
245
-
.cpu_features = CPU_FTRS_POWER6,
246
-
.cpu_user_features = COMMON_USER_POWER6,
247
-
.mmu_features = MMU_FTRS_POWER6,
248
-
.icache_bsize = 128,
249
-
.dcache_bsize = 128,
250
-
.platform = "power6",
251
-
},
252
-
{ /* 2.06-compliant processor, i.e. Power7 "architected" mode */
253
-
.pvr_mask = 0xffffffff,
254
-
.pvr_value = 0x0f000003,
255
-
.cpu_name = "POWER7 (architected)",
256
-
.cpu_features = CPU_FTRS_POWER7,
257
-
.cpu_user_features = COMMON_USER_POWER7,
258
-
.cpu_user_features2 = COMMON_USER2_POWER7,
259
-
.mmu_features = MMU_FTRS_POWER7,
260
-
.icache_bsize = 128,
261
-
.dcache_bsize = 128,
262
-
.cpu_setup = __setup_cpu_power7,
263
-
.cpu_restore = __restore_cpu_power7,
264
-
.machine_check_early = __machine_check_early_realmode_p7,
265
-
.platform = "power7",
266
-
},
267
-
{ /* 2.07-compliant processor, i.e. Power8 "architected" mode */
268
-
.pvr_mask = 0xffffffff,
269
-
.pvr_value = 0x0f000004,
270
-
.cpu_name = "POWER8 (architected)",
271
-
.cpu_features = CPU_FTRS_POWER8,
272
-
.cpu_user_features = COMMON_USER_POWER8,
273
-
.cpu_user_features2 = COMMON_USER2_POWER8,
274
-
.mmu_features = MMU_FTRS_POWER8,
275
-
.icache_bsize = 128,
276
-
.dcache_bsize = 128,
277
-
.cpu_setup = __setup_cpu_power8,
278
-
.cpu_restore = __restore_cpu_power8,
279
-
.machine_check_early = __machine_check_early_realmode_p8,
280
-
.platform = "power8",
281
-
},
282
-
{ /* 3.00-compliant processor, i.e. Power9 "architected" mode */
283
-
.pvr_mask = 0xffffffff,
284
-
.pvr_value = 0x0f000005,
285
-
.cpu_name = "POWER9 (architected)",
286
-
.cpu_features = CPU_FTRS_POWER9,
287
-
.cpu_user_features = COMMON_USER_POWER9,
288
-
.cpu_user_features2 = COMMON_USER2_POWER9,
289
-
.mmu_features = MMU_FTRS_POWER9,
290
-
.icache_bsize = 128,
291
-
.dcache_bsize = 128,
292
-
.cpu_setup = __setup_cpu_power9,
293
-
.cpu_restore = __restore_cpu_power9,
294
-
.platform = "power9",
295
-
},
296
-
{ /* 3.1-compliant processor, i.e. Power10 "architected" mode */
297
-
.pvr_mask = 0xffffffff,
298
-
.pvr_value = 0x0f000006,
299
-
.cpu_name = "POWER10 (architected)",
300
-
.cpu_features = CPU_FTRS_POWER10,
301
-
.cpu_user_features = COMMON_USER_POWER10,
302
-
.cpu_user_features2 = COMMON_USER2_POWER10,
303
-
.mmu_features = MMU_FTRS_POWER10,
304
-
.icache_bsize = 128,
305
-
.dcache_bsize = 128,
306
-
.cpu_setup = __setup_cpu_power10,
307
-
.cpu_restore = __restore_cpu_power10,
308
-
.platform = "power10",
309
-
},
310
-
{ /* Power7 */
311
-
.pvr_mask = 0xffff0000,
312
-
.pvr_value = 0x003f0000,
313
-
.cpu_name = "POWER7 (raw)",
314
-
.cpu_features = CPU_FTRS_POWER7,
315
-
.cpu_user_features = COMMON_USER_POWER7,
316
-
.cpu_user_features2 = COMMON_USER2_POWER7,
317
-
.mmu_features = MMU_FTRS_POWER7,
318
-
.icache_bsize = 128,
319
-
.dcache_bsize = 128,
320
-
.num_pmcs = 6,
321
-
.pmc_type = PPC_PMC_IBM,
322
-
.cpu_setup = __setup_cpu_power7,
323
-
.cpu_restore = __restore_cpu_power7,
324
-
.machine_check_early = __machine_check_early_realmode_p7,
325
-
.platform = "power7",
326
-
},
327
-
{ /* Power7+ */
328
-
.pvr_mask = 0xffff0000,
329
-
.pvr_value = 0x004A0000,
330
-
.cpu_name = "POWER7+ (raw)",
331
-
.cpu_features = CPU_FTRS_POWER7,
332
-
.cpu_user_features = COMMON_USER_POWER7,
333
-
.cpu_user_features2 = COMMON_USER2_POWER7,
334
-
.mmu_features = MMU_FTRS_POWER7,
335
-
.icache_bsize = 128,
336
-
.dcache_bsize = 128,
337
-
.num_pmcs = 6,
338
-
.pmc_type = PPC_PMC_IBM,
339
-
.cpu_setup = __setup_cpu_power7,
340
-
.cpu_restore = __restore_cpu_power7,
341
-
.machine_check_early = __machine_check_early_realmode_p7,
342
-
.platform = "power7+",
343
-
},
344
-
{ /* Power8E */
345
-
.pvr_mask = 0xffff0000,
346
-
.pvr_value = 0x004b0000,
347
-
.cpu_name = "POWER8E (raw)",
348
-
.cpu_features = CPU_FTRS_POWER8E,
349
-
.cpu_user_features = COMMON_USER_POWER8,
350
-
.cpu_user_features2 = COMMON_USER2_POWER8,
351
-
.mmu_features = MMU_FTRS_POWER8,
352
-
.icache_bsize = 128,
353
-
.dcache_bsize = 128,
354
-
.num_pmcs = 6,
355
-
.pmc_type = PPC_PMC_IBM,
356
-
.cpu_setup = __setup_cpu_power8,
357
-
.cpu_restore = __restore_cpu_power8,
358
-
.machine_check_early = __machine_check_early_realmode_p8,
359
-
.platform = "power8",
360
-
},
361
-
{ /* Power8NVL */
362
-
.pvr_mask = 0xffff0000,
363
-
.pvr_value = 0x004c0000,
364
-
.cpu_name = "POWER8NVL (raw)",
365
-
.cpu_features = CPU_FTRS_POWER8,
366
-
.cpu_user_features = COMMON_USER_POWER8,
367
-
.cpu_user_features2 = COMMON_USER2_POWER8,
368
-
.mmu_features = MMU_FTRS_POWER8,
369
-
.icache_bsize = 128,
370
-
.dcache_bsize = 128,
371
-
.num_pmcs = 6,
372
-
.pmc_type = PPC_PMC_IBM,
373
-
.cpu_setup = __setup_cpu_power8,
374
-
.cpu_restore = __restore_cpu_power8,
375
-
.machine_check_early = __machine_check_early_realmode_p8,
376
-
.platform = "power8",
377
-
},
378
-
{ /* Power8 */
379
-
.pvr_mask = 0xffff0000,
380
-
.pvr_value = 0x004d0000,
381
-
.cpu_name = "POWER8 (raw)",
382
-
.cpu_features = CPU_FTRS_POWER8,
383
-
.cpu_user_features = COMMON_USER_POWER8,
384
-
.cpu_user_features2 = COMMON_USER2_POWER8,
385
-
.mmu_features = MMU_FTRS_POWER8,
386
-
.icache_bsize = 128,
387
-
.dcache_bsize = 128,
388
-
.num_pmcs = 6,
389
-
.pmc_type = PPC_PMC_IBM,
390
-
.cpu_setup = __setup_cpu_power8,
391
-
.cpu_restore = __restore_cpu_power8,
392
-
.machine_check_early = __machine_check_early_realmode_p8,
393
-
.platform = "power8",
394
-
},
395
-
{ /* Power9 DD2.0 */
396
-
.pvr_mask = 0xffffefff,
397
-
.pvr_value = 0x004e0200,
398
-
.cpu_name = "POWER9 (raw)",
399
-
.cpu_features = CPU_FTRS_POWER9_DD2_0,
400
-
.cpu_user_features = COMMON_USER_POWER9,
401
-
.cpu_user_features2 = COMMON_USER2_POWER9,
402
-
.mmu_features = MMU_FTRS_POWER9,
403
-
.icache_bsize = 128,
404
-
.dcache_bsize = 128,
405
-
.num_pmcs = 6,
406
-
.pmc_type = PPC_PMC_IBM,
407
-
.cpu_setup = __setup_cpu_power9,
408
-
.cpu_restore = __restore_cpu_power9,
409
-
.machine_check_early = __machine_check_early_realmode_p9,
410
-
.platform = "power9",
411
-
},
412
-
{ /* Power9 DD 2.1 */
413
-
.pvr_mask = 0xffffefff,
414
-
.pvr_value = 0x004e0201,
415
-
.cpu_name = "POWER9 (raw)",
416
-
.cpu_features = CPU_FTRS_POWER9_DD2_1,
417
-
.cpu_user_features = COMMON_USER_POWER9,
418
-
.cpu_user_features2 = COMMON_USER2_POWER9,
419
-
.mmu_features = MMU_FTRS_POWER9,
420
-
.icache_bsize = 128,
421
-
.dcache_bsize = 128,
422
-
.num_pmcs = 6,
423
-
.pmc_type = PPC_PMC_IBM,
424
-
.cpu_setup = __setup_cpu_power9,
425
-
.cpu_restore = __restore_cpu_power9,
426
-
.machine_check_early = __machine_check_early_realmode_p9,
427
-
.platform = "power9",
428
-
},
429
-
{ /* Power9 DD2.2 */
430
-
.pvr_mask = 0xffffefff,
431
-
.pvr_value = 0x004e0202,
432
-
.cpu_name = "POWER9 (raw)",
433
-
.cpu_features = CPU_FTRS_POWER9_DD2_2,
434
-
.cpu_user_features = COMMON_USER_POWER9,
435
-
.cpu_user_features2 = COMMON_USER2_POWER9,
436
-
.mmu_features = MMU_FTRS_POWER9,
437
-
.icache_bsize = 128,
438
-
.dcache_bsize = 128,
439
-
.num_pmcs = 6,
440
-
.pmc_type = PPC_PMC_IBM,
441
-
.cpu_setup = __setup_cpu_power9,
442
-
.cpu_restore = __restore_cpu_power9,
443
-
.machine_check_early = __machine_check_early_realmode_p9,
444
-
.platform = "power9",
445
-
},
446
-
{ /* Power9 DD2.3 or later */
447
-
.pvr_mask = 0xffff0000,
448
-
.pvr_value = 0x004e0000,
449
-
.cpu_name = "POWER9 (raw)",
450
-
.cpu_features = CPU_FTRS_POWER9_DD2_3,
451
-
.cpu_user_features = COMMON_USER_POWER9,
452
-
.cpu_user_features2 = COMMON_USER2_POWER9,
453
-
.mmu_features = MMU_FTRS_POWER9,
454
-
.icache_bsize = 128,
455
-
.dcache_bsize = 128,
456
-
.num_pmcs = 6,
457
-
.pmc_type = PPC_PMC_IBM,
458
-
.cpu_setup = __setup_cpu_power9,
459
-
.cpu_restore = __restore_cpu_power9,
460
-
.machine_check_early = __machine_check_early_realmode_p9,
461
-
.platform = "power9",
462
-
},
463
-
{ /* Power10 */
464
-
.pvr_mask = 0xffff0000,
465
-
.pvr_value = 0x00800000,
466
-
.cpu_name = "POWER10 (raw)",
467
-
.cpu_features = CPU_FTRS_POWER10,
468
-
.cpu_user_features = COMMON_USER_POWER10,
469
-
.cpu_user_features2 = COMMON_USER2_POWER10,
470
-
.mmu_features = MMU_FTRS_POWER10,
471
-
.icache_bsize = 128,
472
-
.dcache_bsize = 128,
473
-
.num_pmcs = 6,
474
-
.pmc_type = PPC_PMC_IBM,
475
-
.cpu_setup = __setup_cpu_power10,
476
-
.cpu_restore = __restore_cpu_power10,
477
-
.machine_check_early = __machine_check_early_realmode_p10,
478
-
.platform = "power10",
479
-
},
480
-
{ /* Cell Broadband Engine */
481
-
.pvr_mask = 0xffff0000,
482
-
.pvr_value = 0x00700000,
483
-
.cpu_name = "Cell Broadband Engine",
484
-
.cpu_features = CPU_FTRS_CELL,
485
-
.cpu_user_features = COMMON_USER_PPC64 |
486
-
PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
487
-
PPC_FEATURE_SMT,
488
-
.mmu_features = MMU_FTRS_CELL,
489
-
.icache_bsize = 128,
490
-
.dcache_bsize = 128,
491
-
.num_pmcs = 4,
492
-
.pmc_type = PPC_PMC_IBM,
493
-
.platform = "ppc-cell-be",
494
-
},
495
-
{ /* PA Semi PA6T */
496
-
.pvr_mask = 0x7fff0000,
497
-
.pvr_value = 0x00900000,
498
-
.cpu_name = "PA6T",
499
-
.cpu_features = CPU_FTRS_PA6T,
500
-
.cpu_user_features = COMMON_USER_PA6T,
501
-
.mmu_features = MMU_FTRS_PA6T,
502
-
.icache_bsize = 64,
503
-
.dcache_bsize = 64,
504
-
.num_pmcs = 6,
505
-
.pmc_type = PPC_PMC_PA6T,
506
-
.cpu_setup = __setup_cpu_pa6t,
507
-
.cpu_restore = __restore_cpu_pa6t,
508
-
.platform = "pa6t",
509
-
},
510
-
{ /* default match */
511
-
.pvr_mask = 0x00000000,
512
-
.pvr_value = 0x00000000,
513
-
.cpu_name = "POWER5 (compatible)",
514
-
.cpu_features = CPU_FTRS_COMPATIBLE,
515
-
.cpu_user_features = COMMON_USER_PPC64,
516
-
.mmu_features = MMU_FTRS_POWER,
517
-
.icache_bsize = 128,
518
-
.dcache_bsize = 128,
519
-
.num_pmcs = 6,
520
-
.pmc_type = PPC_PMC_IBM,
521
-
.platform = "power5",
522
-
}
523
-
#endif /* CONFIG_PPC_BOOK3S_64 */
524
-
525
-
#ifdef CONFIG_PPC32
526
-
#ifdef CONFIG_PPC_BOOK3S_32
527
-
#ifdef CONFIG_PPC_BOOK3S_604
528
-
{ /* 604 */
529
-
.pvr_mask = 0xffff0000,
530
-
.pvr_value = 0x00040000,
531
-
.cpu_name = "604",
532
-
.cpu_features = CPU_FTRS_604,
533
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
534
-
.mmu_features = MMU_FTR_HPTE_TABLE,
535
-
.icache_bsize = 32,
536
-
.dcache_bsize = 32,
537
-
.num_pmcs = 2,
538
-
.cpu_setup = __setup_cpu_604,
539
-
.machine_check = machine_check_generic,
540
-
.platform = "ppc604",
541
-
},
542
-
{ /* 604e */
543
-
.pvr_mask = 0xfffff000,
544
-
.pvr_value = 0x00090000,
545
-
.cpu_name = "604e",
546
-
.cpu_features = CPU_FTRS_604,
547
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
548
-
.mmu_features = MMU_FTR_HPTE_TABLE,
549
-
.icache_bsize = 32,
550
-
.dcache_bsize = 32,
551
-
.num_pmcs = 4,
552
-
.cpu_setup = __setup_cpu_604,
553
-
.machine_check = machine_check_generic,
554
-
.platform = "ppc604",
555
-
},
556
-
{ /* 604r */
557
-
.pvr_mask = 0xffff0000,
558
-
.pvr_value = 0x00090000,
559
-
.cpu_name = "604r",
560
-
.cpu_features = CPU_FTRS_604,
561
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
562
-
.mmu_features = MMU_FTR_HPTE_TABLE,
563
-
.icache_bsize = 32,
564
-
.dcache_bsize = 32,
565
-
.num_pmcs = 4,
566
-
.cpu_setup = __setup_cpu_604,
567
-
.machine_check = machine_check_generic,
568
-
.platform = "ppc604",
569
-
},
570
-
{ /* 604ev */
571
-
.pvr_mask = 0xffff0000,
572
-
.pvr_value = 0x000a0000,
573
-
.cpu_name = "604ev",
574
-
.cpu_features = CPU_FTRS_604,
575
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
576
-
.mmu_features = MMU_FTR_HPTE_TABLE,
577
-
.icache_bsize = 32,
578
-
.dcache_bsize = 32,
579
-
.num_pmcs = 4,
580
-
.cpu_setup = __setup_cpu_604,
581
-
.machine_check = machine_check_generic,
582
-
.platform = "ppc604",
583
-
},
584
-
{ /* 740/750 (0x4202, don't support TAU ?) */
585
-
.pvr_mask = 0xffffffff,
586
-
.pvr_value = 0x00084202,
587
-
.cpu_name = "740/750",
588
-
.cpu_features = CPU_FTRS_740_NOTAU,
589
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
590
-
.mmu_features = MMU_FTR_HPTE_TABLE,
591
-
.icache_bsize = 32,
592
-
.dcache_bsize = 32,
593
-
.num_pmcs = 4,
594
-
.cpu_setup = __setup_cpu_750,
595
-
.machine_check = machine_check_generic,
596
-
.platform = "ppc750",
597
-
},
598
-
{ /* 750CX (80100 and 8010x?) */
599
-
.pvr_mask = 0xfffffff0,
600
-
.pvr_value = 0x00080100,
601
-
.cpu_name = "750CX",
602
-
.cpu_features = CPU_FTRS_750,
603
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
604
-
.mmu_features = MMU_FTR_HPTE_TABLE,
605
-
.icache_bsize = 32,
606
-
.dcache_bsize = 32,
607
-
.num_pmcs = 4,
608
-
.cpu_setup = __setup_cpu_750cx,
609
-
.machine_check = machine_check_generic,
610
-
.platform = "ppc750",
611
-
},
612
-
{ /* 750CX (82201 and 82202) */
613
-
.pvr_mask = 0xfffffff0,
614
-
.pvr_value = 0x00082200,
615
-
.cpu_name = "750CX",
616
-
.cpu_features = CPU_FTRS_750,
617
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
618
-
.mmu_features = MMU_FTR_HPTE_TABLE,
619
-
.icache_bsize = 32,
620
-
.dcache_bsize = 32,
621
-
.num_pmcs = 4,
622
-
.pmc_type = PPC_PMC_IBM,
623
-
.cpu_setup = __setup_cpu_750cx,
624
-
.machine_check = machine_check_generic,
625
-
.platform = "ppc750",
626
-
},
627
-
{ /* 750CXe (82214) */
628
-
.pvr_mask = 0xfffffff0,
629
-
.pvr_value = 0x00082210,
630
-
.cpu_name = "750CXe",
631
-
.cpu_features = CPU_FTRS_750,
632
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
633
-
.mmu_features = MMU_FTR_HPTE_TABLE,
634
-
.icache_bsize = 32,
635
-
.dcache_bsize = 32,
636
-
.num_pmcs = 4,
637
-
.pmc_type = PPC_PMC_IBM,
638
-
.cpu_setup = __setup_cpu_750cx,
639
-
.machine_check = machine_check_generic,
640
-
.platform = "ppc750",
641
-
},
642
-
{ /* 750CXe "Gekko" (83214) */
643
-
.pvr_mask = 0xffffffff,
644
-
.pvr_value = 0x00083214,
645
-
.cpu_name = "750CXe",
646
-
.cpu_features = CPU_FTRS_750,
647
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
648
-
.mmu_features = MMU_FTR_HPTE_TABLE,
649
-
.icache_bsize = 32,
650
-
.dcache_bsize = 32,
651
-
.num_pmcs = 4,
652
-
.pmc_type = PPC_PMC_IBM,
653
-
.cpu_setup = __setup_cpu_750cx,
654
-
.machine_check = machine_check_generic,
655
-
.platform = "ppc750",
656
-
},
657
-
{ /* 750CL (and "Broadway") */
658
-
.pvr_mask = 0xfffff0e0,
659
-
.pvr_value = 0x00087000,
660
-
.cpu_name = "750CL",
661
-
.cpu_features = CPU_FTRS_750CL,
662
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
663
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
664
-
.icache_bsize = 32,
665
-
.dcache_bsize = 32,
666
-
.num_pmcs = 4,
667
-
.pmc_type = PPC_PMC_IBM,
668
-
.cpu_setup = __setup_cpu_750,
669
-
.machine_check = machine_check_generic,
670
-
.platform = "ppc750",
671
-
},
672
-
{ /* 745/755 */
673
-
.pvr_mask = 0xfffff000,
674
-
.pvr_value = 0x00083000,
675
-
.cpu_name = "745/755",
676
-
.cpu_features = CPU_FTRS_750,
677
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
678
-
.mmu_features = MMU_FTR_HPTE_TABLE,
679
-
.icache_bsize = 32,
680
-
.dcache_bsize = 32,
681
-
.num_pmcs = 4,
682
-
.pmc_type = PPC_PMC_IBM,
683
-
.cpu_setup = __setup_cpu_750,
684
-
.machine_check = machine_check_generic,
685
-
.platform = "ppc750",
686
-
},
687
-
{ /* 750FX rev 1.x */
688
-
.pvr_mask = 0xffffff00,
689
-
.pvr_value = 0x70000100,
690
-
.cpu_name = "750FX",
691
-
.cpu_features = CPU_FTRS_750FX1,
692
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
693
-
.mmu_features = MMU_FTR_HPTE_TABLE,
694
-
.icache_bsize = 32,
695
-
.dcache_bsize = 32,
696
-
.num_pmcs = 4,
697
-
.pmc_type = PPC_PMC_IBM,
698
-
.cpu_setup = __setup_cpu_750,
699
-
.machine_check = machine_check_generic,
700
-
.platform = "ppc750",
701
-
},
702
-
{ /* 750FX rev 2.0 must disable HID0[DPM] */
703
-
.pvr_mask = 0xffffffff,
704
-
.pvr_value = 0x70000200,
705
-
.cpu_name = "750FX",
706
-
.cpu_features = CPU_FTRS_750FX2,
707
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
708
-
.mmu_features = MMU_FTR_HPTE_TABLE,
709
-
.icache_bsize = 32,
710
-
.dcache_bsize = 32,
711
-
.num_pmcs = 4,
712
-
.pmc_type = PPC_PMC_IBM,
713
-
.cpu_setup = __setup_cpu_750,
714
-
.machine_check = machine_check_generic,
715
-
.platform = "ppc750",
716
-
},
717
-
{ /* 750FX (All revs except 2.0) */
718
-
.pvr_mask = 0xffff0000,
719
-
.pvr_value = 0x70000000,
720
-
.cpu_name = "750FX",
721
-
.cpu_features = CPU_FTRS_750FX,
722
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
723
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
724
-
.icache_bsize = 32,
725
-
.dcache_bsize = 32,
726
-
.num_pmcs = 4,
727
-
.pmc_type = PPC_PMC_IBM,
728
-
.cpu_setup = __setup_cpu_750fx,
729
-
.machine_check = machine_check_generic,
730
-
.platform = "ppc750",
731
-
},
732
-
{ /* 750GX */
733
-
.pvr_mask = 0xffff0000,
734
-
.pvr_value = 0x70020000,
735
-
.cpu_name = "750GX",
736
-
.cpu_features = CPU_FTRS_750GX,
737
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
738
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
739
-
.icache_bsize = 32,
740
-
.dcache_bsize = 32,
741
-
.num_pmcs = 4,
742
-
.pmc_type = PPC_PMC_IBM,
743
-
.cpu_setup = __setup_cpu_750fx,
744
-
.machine_check = machine_check_generic,
745
-
.platform = "ppc750",
746
-
},
747
-
{ /* 740/750 (L2CR bit need fixup for 740) */
748
-
.pvr_mask = 0xffff0000,
749
-
.pvr_value = 0x00080000,
750
-
.cpu_name = "740/750",
751
-
.cpu_features = CPU_FTRS_740,
752
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
753
-
.mmu_features = MMU_FTR_HPTE_TABLE,
754
-
.icache_bsize = 32,
755
-
.dcache_bsize = 32,
756
-
.num_pmcs = 4,
757
-
.pmc_type = PPC_PMC_IBM,
758
-
.cpu_setup = __setup_cpu_750,
759
-
.machine_check = machine_check_generic,
760
-
.platform = "ppc750",
761
-
},
762
-
{ /* 7400 rev 1.1 ? (no TAU) */
763
-
.pvr_mask = 0xffffffff,
764
-
.pvr_value = 0x000c1101,
765
-
.cpu_name = "7400 (1.1)",
766
-
.cpu_features = CPU_FTRS_7400_NOTAU,
767
-
.cpu_user_features = COMMON_USER |
768
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
769
-
.mmu_features = MMU_FTR_HPTE_TABLE,
770
-
.icache_bsize = 32,
771
-
.dcache_bsize = 32,
772
-
.num_pmcs = 4,
773
-
.pmc_type = PPC_PMC_G4,
774
-
.cpu_setup = __setup_cpu_7400,
775
-
.machine_check = machine_check_generic,
776
-
.platform = "ppc7400",
777
-
},
778
-
{ /* 7400 */
779
-
.pvr_mask = 0xffff0000,
780
-
.pvr_value = 0x000c0000,
781
-
.cpu_name = "7400",
782
-
.cpu_features = CPU_FTRS_7400,
783
-
.cpu_user_features = COMMON_USER |
784
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
785
-
.mmu_features = MMU_FTR_HPTE_TABLE,
786
-
.icache_bsize = 32,
787
-
.dcache_bsize = 32,
788
-
.num_pmcs = 4,
789
-
.pmc_type = PPC_PMC_G4,
790
-
.cpu_setup = __setup_cpu_7400,
791
-
.machine_check = machine_check_generic,
792
-
.platform = "ppc7400",
793
-
},
794
-
{ /* 7410 */
795
-
.pvr_mask = 0xffff0000,
796
-
.pvr_value = 0x800c0000,
797
-
.cpu_name = "7410",
798
-
.cpu_features = CPU_FTRS_7400,
799
-
.cpu_user_features = COMMON_USER |
800
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
801
-
.mmu_features = MMU_FTR_HPTE_TABLE,
802
-
.icache_bsize = 32,
803
-
.dcache_bsize = 32,
804
-
.num_pmcs = 4,
805
-
.pmc_type = PPC_PMC_G4,
806
-
.cpu_setup = __setup_cpu_7410,
807
-
.machine_check = machine_check_generic,
808
-
.platform = "ppc7400",
809
-
},
810
-
{ /* 7450 2.0 - no doze/nap */
811
-
.pvr_mask = 0xffffffff,
812
-
.pvr_value = 0x80000200,
813
-
.cpu_name = "7450",
814
-
.cpu_features = CPU_FTRS_7450_20,
815
-
.cpu_user_features = COMMON_USER |
816
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
817
-
.mmu_features = MMU_FTR_HPTE_TABLE,
818
-
.icache_bsize = 32,
819
-
.dcache_bsize = 32,
820
-
.num_pmcs = 6,
821
-
.pmc_type = PPC_PMC_G4,
822
-
.cpu_setup = __setup_cpu_745x,
823
-
.machine_check = machine_check_generic,
824
-
.platform = "ppc7450",
825
-
},
826
-
{ /* 7450 2.1 */
827
-
.pvr_mask = 0xffffffff,
828
-
.pvr_value = 0x80000201,
829
-
.cpu_name = "7450",
830
-
.cpu_features = CPU_FTRS_7450_21,
831
-
.cpu_user_features = COMMON_USER |
832
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
833
-
.mmu_features = MMU_FTR_HPTE_TABLE,
834
-
.icache_bsize = 32,
835
-
.dcache_bsize = 32,
836
-
.num_pmcs = 6,
837
-
.pmc_type = PPC_PMC_G4,
838
-
.cpu_setup = __setup_cpu_745x,
839
-
.machine_check = machine_check_generic,
840
-
.platform = "ppc7450",
841
-
},
842
-
{ /* 7450 2.3 and newer */
843
-
.pvr_mask = 0xffff0000,
844
-
.pvr_value = 0x80000000,
845
-
.cpu_name = "7450",
846
-
.cpu_features = CPU_FTRS_7450_23,
847
-
.cpu_user_features = COMMON_USER |
848
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
849
-
.mmu_features = MMU_FTR_HPTE_TABLE,
850
-
.icache_bsize = 32,
851
-
.dcache_bsize = 32,
852
-
.num_pmcs = 6,
853
-
.pmc_type = PPC_PMC_G4,
854
-
.cpu_setup = __setup_cpu_745x,
855
-
.machine_check = machine_check_generic,
856
-
.platform = "ppc7450",
857
-
},
858
-
{ /* 7455 rev 1.x */
859
-
.pvr_mask = 0xffffff00,
860
-
.pvr_value = 0x80010100,
861
-
.cpu_name = "7455",
862
-
.cpu_features = CPU_FTRS_7455_1,
863
-
.cpu_user_features = COMMON_USER |
864
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
865
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
866
-
.icache_bsize = 32,
867
-
.dcache_bsize = 32,
868
-
.num_pmcs = 6,
869
-
.pmc_type = PPC_PMC_G4,
870
-
.cpu_setup = __setup_cpu_745x,
871
-
.machine_check = machine_check_generic,
872
-
.platform = "ppc7450",
873
-
},
874
-
{ /* 7455 rev 2.0 */
875
-
.pvr_mask = 0xffffffff,
876
-
.pvr_value = 0x80010200,
877
-
.cpu_name = "7455",
878
-
.cpu_features = CPU_FTRS_7455_20,
879
-
.cpu_user_features = COMMON_USER |
880
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
881
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
882
-
.icache_bsize = 32,
883
-
.dcache_bsize = 32,
884
-
.num_pmcs = 6,
885
-
.pmc_type = PPC_PMC_G4,
886
-
.cpu_setup = __setup_cpu_745x,
887
-
.machine_check = machine_check_generic,
888
-
.platform = "ppc7450",
889
-
},
890
-
{ /* 7455 others */
891
-
.pvr_mask = 0xffff0000,
892
-
.pvr_value = 0x80010000,
893
-
.cpu_name = "7455",
894
-
.cpu_features = CPU_FTRS_7455,
895
-
.cpu_user_features = COMMON_USER |
896
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
897
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
898
-
.icache_bsize = 32,
899
-
.dcache_bsize = 32,
900
-
.num_pmcs = 6,
901
-
.pmc_type = PPC_PMC_G4,
902
-
.cpu_setup = __setup_cpu_745x,
903
-
.machine_check = machine_check_generic,
904
-
.platform = "ppc7450",
905
-
},
906
-
{ /* 7447/7457 Rev 1.0 */
907
-
.pvr_mask = 0xffffffff,
908
-
.pvr_value = 0x80020100,
909
-
.cpu_name = "7447/7457",
910
-
.cpu_features = CPU_FTRS_7447_10,
911
-
.cpu_user_features = COMMON_USER |
912
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
913
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
914
-
.icache_bsize = 32,
915
-
.dcache_bsize = 32,
916
-
.num_pmcs = 6,
917
-
.pmc_type = PPC_PMC_G4,
918
-
.cpu_setup = __setup_cpu_745x,
919
-
.machine_check = machine_check_generic,
920
-
.platform = "ppc7450",
921
-
},
922
-
{ /* 7447/7457 Rev 1.1 */
923
-
.pvr_mask = 0xffffffff,
924
-
.pvr_value = 0x80020101,
925
-
.cpu_name = "7447/7457",
926
-
.cpu_features = CPU_FTRS_7447_10,
927
-
.cpu_user_features = COMMON_USER |
928
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
929
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
930
-
.icache_bsize = 32,
931
-
.dcache_bsize = 32,
932
-
.num_pmcs = 6,
933
-
.pmc_type = PPC_PMC_G4,
934
-
.cpu_setup = __setup_cpu_745x,
935
-
.machine_check = machine_check_generic,
936
-
.platform = "ppc7450",
937
-
},
938
-
{ /* 7447/7457 Rev 1.2 and later */
939
-
.pvr_mask = 0xffff0000,
940
-
.pvr_value = 0x80020000,
941
-
.cpu_name = "7447/7457",
942
-
.cpu_features = CPU_FTRS_7447,
943
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
944
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
945
-
.icache_bsize = 32,
946
-
.dcache_bsize = 32,
947
-
.num_pmcs = 6,
948
-
.pmc_type = PPC_PMC_G4,
949
-
.cpu_setup = __setup_cpu_745x,
950
-
.machine_check = machine_check_generic,
951
-
.platform = "ppc7450",
952
-
},
953
-
{ /* 7447A */
954
-
.pvr_mask = 0xffff0000,
955
-
.pvr_value = 0x80030000,
956
-
.cpu_name = "7447A",
957
-
.cpu_features = CPU_FTRS_7447A,
958
-
.cpu_user_features = COMMON_USER |
959
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
960
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
961
-
.icache_bsize = 32,
962
-
.dcache_bsize = 32,
963
-
.num_pmcs = 6,
964
-
.pmc_type = PPC_PMC_G4,
965
-
.cpu_setup = __setup_cpu_745x,
966
-
.machine_check = machine_check_generic,
967
-
.platform = "ppc7450",
968
-
},
969
-
{ /* 7448 */
970
-
.pvr_mask = 0xffff0000,
971
-
.pvr_value = 0x80040000,
972
-
.cpu_name = "7448",
973
-
.cpu_features = CPU_FTRS_7448,
974
-
.cpu_user_features = COMMON_USER |
975
-
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
976
-
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
977
-
.icache_bsize = 32,
978
-
.dcache_bsize = 32,
979
-
.num_pmcs = 6,
980
-
.pmc_type = PPC_PMC_G4,
981
-
.cpu_setup = __setup_cpu_745x,
982
-
.machine_check = machine_check_generic,
983
-
.platform = "ppc7450",
984
-
},
985
-
#endif /* CONFIG_PPC_BOOK3S_604 */
986
-
#ifdef CONFIG_PPC_BOOK3S_603
987
-
{ /* 603 */
988
-
.pvr_mask = 0xffff0000,
989
-
.pvr_value = 0x00030000,
990
-
.cpu_name = "603",
991
-
.cpu_features = CPU_FTRS_603,
992
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
993
-
.mmu_features = 0,
994
-
.icache_bsize = 32,
995
-
.dcache_bsize = 32,
996
-
.cpu_setup = __setup_cpu_603,
997
-
.machine_check = machine_check_generic,
998
-
.platform = "ppc603",
999
-
},
1000
-
{ /* 603e */
1001
-
.pvr_mask = 0xffff0000,
1002
-
.pvr_value = 0x00060000,
1003
-
.cpu_name = "603e",
1004
-
.cpu_features = CPU_FTRS_603,
1005
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
1006
-
.mmu_features = 0,
1007
-
.icache_bsize = 32,
1008
-
.dcache_bsize = 32,
1009
-
.cpu_setup = __setup_cpu_603,
1010
-
.machine_check = machine_check_generic,
1011
-
.platform = "ppc603",
1012
-
},
1013
-
{ /* 603ev */
1014
-
.pvr_mask = 0xffff0000,
1015
-
.pvr_value = 0x00070000,
1016
-
.cpu_name = "603ev",
1017
-
.cpu_features = CPU_FTRS_603,
1018
-
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
1019
-
.mmu_features = 0,
1020
-
.icache_bsize = 32,
1021
-
.dcache_bsize = 32,
1022
-
.cpu_setup = __setup_cpu_603,
1023
-
.machine_check = machine_check_generic,
1024
-
.platform = "ppc603",
1025
-
},
1026
-
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */
1027
-
.pvr_mask = 0x7fff0000,
1028
-
.pvr_value = 0x00810000,
1029
-
.cpu_name = "82xx",
1030
-
.cpu_features = CPU_FTRS_82XX,
1031
-
.cpu_user_features = COMMON_USER,
1032
-
.mmu_features = 0,
1033
-
.icache_bsize = 32,
1034
-
.dcache_bsize = 32,
1035
-
.cpu_setup = __setup_cpu_603,
1036
-
.machine_check = machine_check_generic,
1037
-
.platform = "ppc603",
1038
-
},
1039
-
{ /* All G2_LE (603e core, plus some) have the same pvr */
1040
-
.pvr_mask = 0x7fff0000,
1041
-
.pvr_value = 0x00820000,
1042
-
.cpu_name = "G2_LE",
1043
-
.cpu_features = CPU_FTRS_G2_LE,
1044
-
.cpu_user_features = COMMON_USER,
1045
-
.mmu_features = MMU_FTR_USE_HIGH_BATS,
1046
-
.icache_bsize = 32,
1047
-
.dcache_bsize = 32,
1048
-
.cpu_setup = __setup_cpu_603,
1049
-
.machine_check = machine_check_generic,
1050
-
.platform = "ppc603",
1051
-
},
1052
-
#ifdef CONFIG_PPC_83xx
1053
-
{ /* e300c1 (a 603e core, plus some) on 83xx */
1054
-
.pvr_mask = 0x7fff0000,
1055
-
.pvr_value = 0x00830000,
1056
-
.cpu_name = "e300c1",
1057
-
.cpu_features = CPU_FTRS_E300,
1058
-
.cpu_user_features = COMMON_USER,
1059
-
.mmu_features = MMU_FTR_USE_HIGH_BATS,
1060
-
.icache_bsize = 32,
1061
-
.dcache_bsize = 32,
1062
-
.cpu_setup = __setup_cpu_603,
1063
-
.machine_check = machine_check_83xx,
1064
-
.platform = "ppc603",
1065
-
},
1066
-
{ /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1067
-
.pvr_mask = 0x7fff0000,
1068
-
.pvr_value = 0x00840000,
1069
-
.cpu_name = "e300c2",
1070
-
.cpu_features = CPU_FTRS_E300C2,
1071
-
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1072
-
.mmu_features = MMU_FTR_USE_HIGH_BATS |
1073
-
MMU_FTR_NEED_DTLB_SW_LRU,
1074
-
.icache_bsize = 32,
1075
-
.dcache_bsize = 32,
1076
-
.cpu_setup = __setup_cpu_603,
1077
-
.machine_check = machine_check_83xx,
1078
-
.platform = "ppc603",
1079
-
},
1080
-
{ /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1081
-
.pvr_mask = 0x7fff0000,
1082
-
.pvr_value = 0x00850000,
1083
-
.cpu_name = "e300c3",
1084
-
.cpu_features = CPU_FTRS_E300,
1085
-
.cpu_user_features = COMMON_USER,
1086
-
.mmu_features = MMU_FTR_USE_HIGH_BATS |
1087
-
MMU_FTR_NEED_DTLB_SW_LRU,
1088
-
.icache_bsize = 32,
1089
-
.dcache_bsize = 32,
1090
-
.cpu_setup = __setup_cpu_603,
1091
-
.machine_check = machine_check_83xx,
1092
-
.num_pmcs = 4,
1093
-
.platform = "ppc603",
1094
-
},
1095
-
{ /* e300c4 (e300c1, plus one IU) */
1096
-
.pvr_mask = 0x7fff0000,
1097
-
.pvr_value = 0x00860000,
1098
-
.cpu_name = "e300c4",
1099
-
.cpu_features = CPU_FTRS_E300,
1100
-
.cpu_user_features = COMMON_USER,
1101
-
.mmu_features = MMU_FTR_USE_HIGH_BATS |
1102
-
MMU_FTR_NEED_DTLB_SW_LRU,
1103
-
.icache_bsize = 32,
1104
-
.dcache_bsize = 32,
1105
-
.cpu_setup = __setup_cpu_603,
1106
-
.machine_check = machine_check_83xx,
1107
-
.num_pmcs = 4,
1108
-
.platform = "ppc603",
1109
-
},
1110
-
#endif
1111
-
#endif /* CONFIG_PPC_BOOK3S_603 */
1112
-
#ifdef CONFIG_PPC_BOOK3S_604
1113
-
{ /* default match, we assume split I/D cache & TB (non-601)... */
1114
-
.pvr_mask = 0x00000000,
1115
-
.pvr_value = 0x00000000,
1116
-
.cpu_name = "(generic PPC)",
1117
-
.cpu_features = CPU_FTRS_CLASSIC32,
1118
-
.cpu_user_features = COMMON_USER,
1119
-
.mmu_features = MMU_FTR_HPTE_TABLE,
1120
-
.icache_bsize = 32,
1121
-
.dcache_bsize = 32,
1122
-
.machine_check = machine_check_generic,
1123
-
.platform = "ppc603",
1124
-
},
1125
-
#endif /* CONFIG_PPC_BOOK3S_604 */
1126
-
#endif /* CONFIG_PPC_BOOK3S_32 */
1127
-
#ifdef CONFIG_PPC_8xx
1128
-
{ /* 8xx */
1129
-
.pvr_mask = 0xffff0000,
1130
-
.pvr_value = PVR_8xx,
1131
-
.cpu_name = "8xx",
1132
-
/* CPU_FTR_MAYBE_CAN_DOZE is possible,
1133
-
* if the 8xx code is there.... */
1134
-
.cpu_features = CPU_FTRS_8XX,
1135
-
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1136
-
.mmu_features = MMU_FTR_TYPE_8xx,
1137
-
.icache_bsize = 16,
1138
-
.dcache_bsize = 16,
1139
-
.machine_check = machine_check_8xx,
1140
-
.platform = "ppc823",
1141
-
},
1142
-
#endif /* CONFIG_PPC_8xx */
1143
-
#ifdef CONFIG_40x
1144
-
{ /* STB 04xxx */
1145
-
.pvr_mask = 0xffff0000,
1146
-
.pvr_value = 0x41810000,
1147
-
.cpu_name = "STB04xxx",
1148
-
.cpu_features = CPU_FTRS_40X,
1149
-
.cpu_user_features = PPC_FEATURE_32 |
1150
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1151
-
.mmu_features = MMU_FTR_TYPE_40x,
1152
-
.icache_bsize = 32,
1153
-
.dcache_bsize = 32,
1154
-
.machine_check = machine_check_4xx,
1155
-
.platform = "ppc405",
1156
-
},
1157
-
{ /* NP405L */
1158
-
.pvr_mask = 0xffff0000,
1159
-
.pvr_value = 0x41610000,
1160
-
.cpu_name = "NP405L",
1161
-
.cpu_features = CPU_FTRS_40X,
1162
-
.cpu_user_features = PPC_FEATURE_32 |
1163
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1164
-
.mmu_features = MMU_FTR_TYPE_40x,
1165
-
.icache_bsize = 32,
1166
-
.dcache_bsize = 32,
1167
-
.machine_check = machine_check_4xx,
1168
-
.platform = "ppc405",
1169
-
},
1170
-
{ /* NP4GS3 */
1171
-
.pvr_mask = 0xffff0000,
1172
-
.pvr_value = 0x40B10000,
1173
-
.cpu_name = "NP4GS3",
1174
-
.cpu_features = CPU_FTRS_40X,
1175
-
.cpu_user_features = PPC_FEATURE_32 |
1176
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1177
-
.mmu_features = MMU_FTR_TYPE_40x,
1178
-
.icache_bsize = 32,
1179
-
.dcache_bsize = 32,
1180
-
.machine_check = machine_check_4xx,
1181
-
.platform = "ppc405",
1182
-
},
1183
-
{ /* NP405H */
1184
-
.pvr_mask = 0xffff0000,
1185
-
.pvr_value = 0x41410000,
1186
-
.cpu_name = "NP405H",
1187
-
.cpu_features = CPU_FTRS_40X,
1188
-
.cpu_user_features = PPC_FEATURE_32 |
1189
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1190
-
.mmu_features = MMU_FTR_TYPE_40x,
1191
-
.icache_bsize = 32,
1192
-
.dcache_bsize = 32,
1193
-
.machine_check = machine_check_4xx,
1194
-
.platform = "ppc405",
1195
-
},
1196
-
{ /* 405GPr */
1197
-
.pvr_mask = 0xffff0000,
1198
-
.pvr_value = 0x50910000,
1199
-
.cpu_name = "405GPr",
1200
-
.cpu_features = CPU_FTRS_40X,
1201
-
.cpu_user_features = PPC_FEATURE_32 |
1202
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1203
-
.mmu_features = MMU_FTR_TYPE_40x,
1204
-
.icache_bsize = 32,
1205
-
.dcache_bsize = 32,
1206
-
.machine_check = machine_check_4xx,
1207
-
.platform = "ppc405",
1208
-
},
1209
-
{ /* STBx25xx */
1210
-
.pvr_mask = 0xffff0000,
1211
-
.pvr_value = 0x51510000,
1212
-
.cpu_name = "STBx25xx",
1213
-
.cpu_features = CPU_FTRS_40X,
1214
-
.cpu_user_features = PPC_FEATURE_32 |
1215
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1216
-
.mmu_features = MMU_FTR_TYPE_40x,
1217
-
.icache_bsize = 32,
1218
-
.dcache_bsize = 32,
1219
-
.machine_check = machine_check_4xx,
1220
-
.platform = "ppc405",
1221
-
},
1222
-
{ /* 405LP */
1223
-
.pvr_mask = 0xffff0000,
1224
-
.pvr_value = 0x41F10000,
1225
-
.cpu_name = "405LP",
1226
-
.cpu_features = CPU_FTRS_40X,
1227
-
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1228
-
.mmu_features = MMU_FTR_TYPE_40x,
1229
-
.icache_bsize = 32,
1230
-
.dcache_bsize = 32,
1231
-
.machine_check = machine_check_4xx,
1232
-
.platform = "ppc405",
1233
-
},
1234
-
{ /* 405EP */
1235
-
.pvr_mask = 0xffff0000,
1236
-
.pvr_value = 0x51210000,
1237
-
.cpu_name = "405EP",
1238
-
.cpu_features = CPU_FTRS_40X,
1239
-
.cpu_user_features = PPC_FEATURE_32 |
1240
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1241
-
.mmu_features = MMU_FTR_TYPE_40x,
1242
-
.icache_bsize = 32,
1243
-
.dcache_bsize = 32,
1244
-
.machine_check = machine_check_4xx,
1245
-
.platform = "ppc405",
1246
-
},
1247
-
{ /* 405EX Rev. A/B with Security */
1248
-
.pvr_mask = 0xffff000f,
1249
-
.pvr_value = 0x12910007,
1250
-
.cpu_name = "405EX Rev. A/B",
1251
-
.cpu_features = CPU_FTRS_40X,
1252
-
.cpu_user_features = PPC_FEATURE_32 |
1253
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1254
-
.mmu_features = MMU_FTR_TYPE_40x,
1255
-
.icache_bsize = 32,
1256
-
.dcache_bsize = 32,
1257
-
.machine_check = machine_check_4xx,
1258
-
.platform = "ppc405",
1259
-
},
1260
-
{ /* 405EX Rev. C without Security */
1261
-
.pvr_mask = 0xffff000f,
1262
-
.pvr_value = 0x1291000d,
1263
-
.cpu_name = "405EX Rev. C",
1264
-
.cpu_features = CPU_FTRS_40X,
1265
-
.cpu_user_features = PPC_FEATURE_32 |
1266
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1267
-
.mmu_features = MMU_FTR_TYPE_40x,
1268
-
.icache_bsize = 32,
1269
-
.dcache_bsize = 32,
1270
-
.machine_check = machine_check_4xx,
1271
-
.platform = "ppc405",
1272
-
},
1273
-
{ /* 405EX Rev. C with Security */
1274
-
.pvr_mask = 0xffff000f,
1275
-
.pvr_value = 0x1291000f,
1276
-
.cpu_name = "405EX Rev. C",
1277
-
.cpu_features = CPU_FTRS_40X,
1278
-
.cpu_user_features = PPC_FEATURE_32 |
1279
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1280
-
.mmu_features = MMU_FTR_TYPE_40x,
1281
-
.icache_bsize = 32,
1282
-
.dcache_bsize = 32,
1283
-
.machine_check = machine_check_4xx,
1284
-
.platform = "ppc405",
1285
-
},
1286
-
{ /* 405EX Rev. D without Security */
1287
-
.pvr_mask = 0xffff000f,
1288
-
.pvr_value = 0x12910003,
1289
-
.cpu_name = "405EX Rev. D",
1290
-
.cpu_features = CPU_FTRS_40X,
1291
-
.cpu_user_features = PPC_FEATURE_32 |
1292
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1293
-
.mmu_features = MMU_FTR_TYPE_40x,
1294
-
.icache_bsize = 32,
1295
-
.dcache_bsize = 32,
1296
-
.machine_check = machine_check_4xx,
1297
-
.platform = "ppc405",
1298
-
},
1299
-
{ /* 405EX Rev. D with Security */
1300
-
.pvr_mask = 0xffff000f,
1301
-
.pvr_value = 0x12910005,
1302
-
.cpu_name = "405EX Rev. D",
1303
-
.cpu_features = CPU_FTRS_40X,
1304
-
.cpu_user_features = PPC_FEATURE_32 |
1305
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1306
-
.mmu_features = MMU_FTR_TYPE_40x,
1307
-
.icache_bsize = 32,
1308
-
.dcache_bsize = 32,
1309
-
.machine_check = machine_check_4xx,
1310
-
.platform = "ppc405",
1311
-
},
1312
-
{ /* 405EXr Rev. A/B without Security */
1313
-
.pvr_mask = 0xffff000f,
1314
-
.pvr_value = 0x12910001,
1315
-
.cpu_name = "405EXr Rev. A/B",
1316
-
.cpu_features = CPU_FTRS_40X,
1317
-
.cpu_user_features = PPC_FEATURE_32 |
1318
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1319
-
.mmu_features = MMU_FTR_TYPE_40x,
1320
-
.icache_bsize = 32,
1321
-
.dcache_bsize = 32,
1322
-
.machine_check = machine_check_4xx,
1323
-
.platform = "ppc405",
1324
-
},
1325
-
{ /* 405EXr Rev. C without Security */
1326
-
.pvr_mask = 0xffff000f,
1327
-
.pvr_value = 0x12910009,
1328
-
.cpu_name = "405EXr Rev. C",
1329
-
.cpu_features = CPU_FTRS_40X,
1330
-
.cpu_user_features = PPC_FEATURE_32 |
1331
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1332
-
.mmu_features = MMU_FTR_TYPE_40x,
1333
-
.icache_bsize = 32,
1334
-
.dcache_bsize = 32,
1335
-
.machine_check = machine_check_4xx,
1336
-
.platform = "ppc405",
1337
-
},
1338
-
{ /* 405EXr Rev. C with Security */
1339
-
.pvr_mask = 0xffff000f,
1340
-
.pvr_value = 0x1291000b,
1341
-
.cpu_name = "405EXr Rev. C",
1342
-
.cpu_features = CPU_FTRS_40X,
1343
-
.cpu_user_features = PPC_FEATURE_32 |
1344
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1345
-
.mmu_features = MMU_FTR_TYPE_40x,
1346
-
.icache_bsize = 32,
1347
-
.dcache_bsize = 32,
1348
-
.machine_check = machine_check_4xx,
1349
-
.platform = "ppc405",
1350
-
},
1351
-
{ /* 405EXr Rev. D without Security */
1352
-
.pvr_mask = 0xffff000f,
1353
-
.pvr_value = 0x12910000,
1354
-
.cpu_name = "405EXr Rev. D",
1355
-
.cpu_features = CPU_FTRS_40X,
1356
-
.cpu_user_features = PPC_FEATURE_32 |
1357
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1358
-
.mmu_features = MMU_FTR_TYPE_40x,
1359
-
.icache_bsize = 32,
1360
-
.dcache_bsize = 32,
1361
-
.machine_check = machine_check_4xx,
1362
-
.platform = "ppc405",
1363
-
},
1364
-
{ /* 405EXr Rev. D with Security */
1365
-
.pvr_mask = 0xffff000f,
1366
-
.pvr_value = 0x12910002,
1367
-
.cpu_name = "405EXr Rev. D",
1368
-
.cpu_features = CPU_FTRS_40X,
1369
-
.cpu_user_features = PPC_FEATURE_32 |
1370
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1371
-
.mmu_features = MMU_FTR_TYPE_40x,
1372
-
.icache_bsize = 32,
1373
-
.dcache_bsize = 32,
1374
-
.machine_check = machine_check_4xx,
1375
-
.platform = "ppc405",
1376
-
},
1377
-
{
1378
-
/* 405EZ */
1379
-
.pvr_mask = 0xffff0000,
1380
-
.pvr_value = 0x41510000,
1381
-
.cpu_name = "405EZ",
1382
-
.cpu_features = CPU_FTRS_40X,
1383
-
.cpu_user_features = PPC_FEATURE_32 |
1384
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1385
-
.mmu_features = MMU_FTR_TYPE_40x,
1386
-
.icache_bsize = 32,
1387
-
.dcache_bsize = 32,
1388
-
.machine_check = machine_check_4xx,
1389
-
.platform = "ppc405",
1390
-
},
1391
-
{ /* APM8018X */
1392
-
.pvr_mask = 0xffff0000,
1393
-
.pvr_value = 0x7ff11432,
1394
-
.cpu_name = "APM8018X",
1395
-
.cpu_features = CPU_FTRS_40X,
1396
-
.cpu_user_features = PPC_FEATURE_32 |
1397
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1398
-
.mmu_features = MMU_FTR_TYPE_40x,
1399
-
.icache_bsize = 32,
1400
-
.dcache_bsize = 32,
1401
-
.machine_check = machine_check_4xx,
1402
-
.platform = "ppc405",
1403
-
},
1404
-
{ /* default match */
1405
-
.pvr_mask = 0x00000000,
1406
-
.pvr_value = 0x00000000,
1407
-
.cpu_name = "(generic 40x PPC)",
1408
-
.cpu_features = CPU_FTRS_40X,
1409
-
.cpu_user_features = PPC_FEATURE_32 |
1410
-
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1411
-
.mmu_features = MMU_FTR_TYPE_40x,
1412
-
.icache_bsize = 32,
1413
-
.dcache_bsize = 32,
1414
-
.machine_check = machine_check_4xx,
1415
-
.platform = "ppc405",
1416
-
}
1417
-
1418
-
#endif /* CONFIG_40x */
1419
-
#ifdef CONFIG_44x
1420
-
#ifndef CONFIG_PPC_47x
1421
-
{
1422
-
.pvr_mask = 0xf0000fff,
1423
-
.pvr_value = 0x40000850,
1424
-
.cpu_name = "440GR Rev. A",
1425
-
.cpu_features = CPU_FTRS_44X,
1426
-
.cpu_user_features = COMMON_USER_BOOKE,
1427
-
.mmu_features = MMU_FTR_TYPE_44x,
1428
-
.icache_bsize = 32,
1429
-
.dcache_bsize = 32,
1430
-
.machine_check = machine_check_4xx,
1431
-
.platform = "ppc440",
1432
-
},
1433
-
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1434
-
.pvr_mask = 0xf0000fff,
1435
-
.pvr_value = 0x40000858,
1436
-
.cpu_name = "440EP Rev. A",
1437
-
.cpu_features = CPU_FTRS_44X,
1438
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1439
-
.mmu_features = MMU_FTR_TYPE_44x,
1440
-
.icache_bsize = 32,
1441
-
.dcache_bsize = 32,
1442
-
.cpu_setup = __setup_cpu_440ep,
1443
-
.machine_check = machine_check_4xx,
1444
-
.platform = "ppc440",
1445
-
},
1446
-
{
1447
-
.pvr_mask = 0xf0000fff,
1448
-
.pvr_value = 0x400008d3,
1449
-
.cpu_name = "440GR Rev. B",
1450
-
.cpu_features = CPU_FTRS_44X,
1451
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1452
-
.mmu_features = MMU_FTR_TYPE_44x,
1453
-
.icache_bsize = 32,
1454
-
.dcache_bsize = 32,
1455
-
.machine_check = machine_check_4xx,
1456
-
.platform = "ppc440",
1457
-
},
1458
-
{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1459
-
.pvr_mask = 0xf0000ff7,
1460
-
.pvr_value = 0x400008d4,
1461
-
.cpu_name = "440EP Rev. C",
1462
-
.cpu_features = CPU_FTRS_44X,
1463
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1464
-
.mmu_features = MMU_FTR_TYPE_44x,
1465
-
.icache_bsize = 32,
1466
-
.dcache_bsize = 32,
1467
-
.cpu_setup = __setup_cpu_440ep,
1468
-
.machine_check = machine_check_4xx,
1469
-
.platform = "ppc440",
1470
-
},
1471
-
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1472
-
.pvr_mask = 0xf0000fff,
1473
-
.pvr_value = 0x400008db,
1474
-
.cpu_name = "440EP Rev. B",
1475
-
.cpu_features = CPU_FTRS_44X,
1476
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1477
-
.mmu_features = MMU_FTR_TYPE_44x,
1478
-
.icache_bsize = 32,
1479
-
.dcache_bsize = 32,
1480
-
.cpu_setup = __setup_cpu_440ep,
1481
-
.machine_check = machine_check_4xx,
1482
-
.platform = "ppc440",
1483
-
},
1484
-
{ /* 440GRX */
1485
-
.pvr_mask = 0xf0000ffb,
1486
-
.pvr_value = 0x200008D0,
1487
-
.cpu_name = "440GRX",
1488
-
.cpu_features = CPU_FTRS_44X,
1489
-
.cpu_user_features = COMMON_USER_BOOKE,
1490
-
.mmu_features = MMU_FTR_TYPE_44x,
1491
-
.icache_bsize = 32,
1492
-
.dcache_bsize = 32,
1493
-
.cpu_setup = __setup_cpu_440grx,
1494
-
.machine_check = machine_check_440A,
1495
-
.platform = "ppc440",
1496
-
},
1497
-
{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1498
-
.pvr_mask = 0xf0000ffb,
1499
-
.pvr_value = 0x200008D8,
1500
-
.cpu_name = "440EPX",
1501
-
.cpu_features = CPU_FTRS_44X,
1502
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1503
-
.mmu_features = MMU_FTR_TYPE_44x,
1504
-
.icache_bsize = 32,
1505
-
.dcache_bsize = 32,
1506
-
.cpu_setup = __setup_cpu_440epx,
1507
-
.machine_check = machine_check_440A,
1508
-
.platform = "ppc440",
1509
-
},
1510
-
{ /* 440GP Rev. B */
1511
-
.pvr_mask = 0xf0000fff,
1512
-
.pvr_value = 0x40000440,
1513
-
.cpu_name = "440GP Rev. B",
1514
-
.cpu_features = CPU_FTRS_44X,
1515
-
.cpu_user_features = COMMON_USER_BOOKE,
1516
-
.mmu_features = MMU_FTR_TYPE_44x,
1517
-
.icache_bsize = 32,
1518
-
.dcache_bsize = 32,
1519
-
.machine_check = machine_check_4xx,
1520
-
.platform = "ppc440gp",
1521
-
},
1522
-
{ /* 440GP Rev. C */
1523
-
.pvr_mask = 0xf0000fff,
1524
-
.pvr_value = 0x40000481,
1525
-
.cpu_name = "440GP Rev. C",
1526
-
.cpu_features = CPU_FTRS_44X,
1527
-
.cpu_user_features = COMMON_USER_BOOKE,
1528
-
.mmu_features = MMU_FTR_TYPE_44x,
1529
-
.icache_bsize = 32,
1530
-
.dcache_bsize = 32,
1531
-
.machine_check = machine_check_4xx,
1532
-
.platform = "ppc440gp",
1533
-
},
1534
-
{ /* 440GX Rev. A */
1535
-
.pvr_mask = 0xf0000fff,
1536
-
.pvr_value = 0x50000850,
1537
-
.cpu_name = "440GX Rev. A",
1538
-
.cpu_features = CPU_FTRS_44X,
1539
-
.cpu_user_features = COMMON_USER_BOOKE,
1540
-
.mmu_features = MMU_FTR_TYPE_44x,
1541
-
.icache_bsize = 32,
1542
-
.dcache_bsize = 32,
1543
-
.cpu_setup = __setup_cpu_440gx,
1544
-
.machine_check = machine_check_440A,
1545
-
.platform = "ppc440",
1546
-
},
1547
-
{ /* 440GX Rev. B */
1548
-
.pvr_mask = 0xf0000fff,
1549
-
.pvr_value = 0x50000851,
1550
-
.cpu_name = "440GX Rev. B",
1551
-
.cpu_features = CPU_FTRS_44X,
1552
-
.cpu_user_features = COMMON_USER_BOOKE,
1553
-
.mmu_features = MMU_FTR_TYPE_44x,
1554
-
.icache_bsize = 32,
1555
-
.dcache_bsize = 32,
1556
-
.cpu_setup = __setup_cpu_440gx,
1557
-
.machine_check = machine_check_440A,
1558
-
.platform = "ppc440",
1559
-
},
1560
-
{ /* 440GX Rev. C */
1561
-
.pvr_mask = 0xf0000fff,
1562
-
.pvr_value = 0x50000892,
1563
-
.cpu_name = "440GX Rev. C",
1564
-
.cpu_features = CPU_FTRS_44X,
1565
-
.cpu_user_features = COMMON_USER_BOOKE,
1566
-
.mmu_features = MMU_FTR_TYPE_44x,
1567
-
.icache_bsize = 32,
1568
-
.dcache_bsize = 32,
1569
-
.cpu_setup = __setup_cpu_440gx,
1570
-
.machine_check = machine_check_440A,
1571
-
.platform = "ppc440",
1572
-
},
1573
-
{ /* 440GX Rev. F */
1574
-
.pvr_mask = 0xf0000fff,
1575
-
.pvr_value = 0x50000894,
1576
-
.cpu_name = "440GX Rev. F",
1577
-
.cpu_features = CPU_FTRS_44X,
1578
-
.cpu_user_features = COMMON_USER_BOOKE,
1579
-
.mmu_features = MMU_FTR_TYPE_44x,
1580
-
.icache_bsize = 32,
1581
-
.dcache_bsize = 32,
1582
-
.cpu_setup = __setup_cpu_440gx,
1583
-
.machine_check = machine_check_440A,
1584
-
.platform = "ppc440",
1585
-
},
1586
-
{ /* 440SP Rev. A */
1587
-
.pvr_mask = 0xfff00fff,
1588
-
.pvr_value = 0x53200891,
1589
-
.cpu_name = "440SP Rev. A",
1590
-
.cpu_features = CPU_FTRS_44X,
1591
-
.cpu_user_features = COMMON_USER_BOOKE,
1592
-
.mmu_features = MMU_FTR_TYPE_44x,
1593
-
.icache_bsize = 32,
1594
-
.dcache_bsize = 32,
1595
-
.machine_check = machine_check_4xx,
1596
-
.platform = "ppc440",
1597
-
},
1598
-
{ /* 440SPe Rev. A */
1599
-
.pvr_mask = 0xfff00fff,
1600
-
.pvr_value = 0x53400890,
1601
-
.cpu_name = "440SPe Rev. A",
1602
-
.cpu_features = CPU_FTRS_44X,
1603
-
.cpu_user_features = COMMON_USER_BOOKE,
1604
-
.mmu_features = MMU_FTR_TYPE_44x,
1605
-
.icache_bsize = 32,
1606
-
.dcache_bsize = 32,
1607
-
.cpu_setup = __setup_cpu_440spe,
1608
-
.machine_check = machine_check_440A,
1609
-
.platform = "ppc440",
1610
-
},
1611
-
{ /* 440SPe Rev. B */
1612
-
.pvr_mask = 0xfff00fff,
1613
-
.pvr_value = 0x53400891,
1614
-
.cpu_name = "440SPe Rev. B",
1615
-
.cpu_features = CPU_FTRS_44X,
1616
-
.cpu_user_features = COMMON_USER_BOOKE,
1617
-
.mmu_features = MMU_FTR_TYPE_44x,
1618
-
.icache_bsize = 32,
1619
-
.dcache_bsize = 32,
1620
-
.cpu_setup = __setup_cpu_440spe,
1621
-
.machine_check = machine_check_440A,
1622
-
.platform = "ppc440",
1623
-
},
1624
-
{ /* 460EX */
1625
-
.pvr_mask = 0xffff0006,
1626
-
.pvr_value = 0x13020002,
1627
-
.cpu_name = "460EX",
1628
-
.cpu_features = CPU_FTRS_440x6,
1629
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1630
-
.mmu_features = MMU_FTR_TYPE_44x,
1631
-
.icache_bsize = 32,
1632
-
.dcache_bsize = 32,
1633
-
.cpu_setup = __setup_cpu_460ex,
1634
-
.machine_check = machine_check_440A,
1635
-
.platform = "ppc440",
1636
-
},
1637
-
{ /* 460EX Rev B */
1638
-
.pvr_mask = 0xffff0007,
1639
-
.pvr_value = 0x13020004,
1640
-
.cpu_name = "460EX Rev. B",
1641
-
.cpu_features = CPU_FTRS_440x6,
1642
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1643
-
.mmu_features = MMU_FTR_TYPE_44x,
1644
-
.icache_bsize = 32,
1645
-
.dcache_bsize = 32,
1646
-
.cpu_setup = __setup_cpu_460ex,
1647
-
.machine_check = machine_check_440A,
1648
-
.platform = "ppc440",
1649
-
},
1650
-
{ /* 460GT */
1651
-
.pvr_mask = 0xffff0006,
1652
-
.pvr_value = 0x13020000,
1653
-
.cpu_name = "460GT",
1654
-
.cpu_features = CPU_FTRS_440x6,
1655
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1656
-
.mmu_features = MMU_FTR_TYPE_44x,
1657
-
.icache_bsize = 32,
1658
-
.dcache_bsize = 32,
1659
-
.cpu_setup = __setup_cpu_460gt,
1660
-
.machine_check = machine_check_440A,
1661
-
.platform = "ppc440",
1662
-
},
1663
-
{ /* 460GT Rev B */
1664
-
.pvr_mask = 0xffff0007,
1665
-
.pvr_value = 0x13020005,
1666
-
.cpu_name = "460GT Rev. B",
1667
-
.cpu_features = CPU_FTRS_440x6,
1668
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1669
-
.mmu_features = MMU_FTR_TYPE_44x,
1670
-
.icache_bsize = 32,
1671
-
.dcache_bsize = 32,
1672
-
.cpu_setup = __setup_cpu_460gt,
1673
-
.machine_check = machine_check_440A,
1674
-
.platform = "ppc440",
1675
-
},
1676
-
{ /* 460SX */
1677
-
.pvr_mask = 0xffffff00,
1678
-
.pvr_value = 0x13541800,
1679
-
.cpu_name = "460SX",
1680
-
.cpu_features = CPU_FTRS_44X,
1681
-
.cpu_user_features = COMMON_USER_BOOKE,
1682
-
.mmu_features = MMU_FTR_TYPE_44x,
1683
-
.icache_bsize = 32,
1684
-
.dcache_bsize = 32,
1685
-
.cpu_setup = __setup_cpu_460sx,
1686
-
.machine_check = machine_check_440A,
1687
-
.platform = "ppc440",
1688
-
},
1689
-
{ /* 464 in APM821xx */
1690
-
.pvr_mask = 0xfffffff0,
1691
-
.pvr_value = 0x12C41C80,
1692
-
.cpu_name = "APM821XX",
1693
-
.cpu_features = CPU_FTRS_44X,
1694
-
.cpu_user_features = COMMON_USER_BOOKE |
1695
-
PPC_FEATURE_HAS_FPU,
1696
-
.mmu_features = MMU_FTR_TYPE_44x,
1697
-
.icache_bsize = 32,
1698
-
.dcache_bsize = 32,
1699
-
.cpu_setup = __setup_cpu_apm821xx,
1700
-
.machine_check = machine_check_440A,
1701
-
.platform = "ppc440",
1702
-
},
1703
-
{ /* default match */
1704
-
.pvr_mask = 0x00000000,
1705
-
.pvr_value = 0x00000000,
1706
-
.cpu_name = "(generic 44x PPC)",
1707
-
.cpu_features = CPU_FTRS_44X,
1708
-
.cpu_user_features = COMMON_USER_BOOKE,
1709
-
.mmu_features = MMU_FTR_TYPE_44x,
1710
-
.icache_bsize = 32,
1711
-
.dcache_bsize = 32,
1712
-
.machine_check = machine_check_4xx,
1713
-
.platform = "ppc440",
1714
-
}
1715
-
#else /* CONFIG_PPC_47x */
1716
-
{ /* 476 DD2 core */
1717
-
.pvr_mask = 0xffffffff,
1718
-
.pvr_value = 0x11a52080,
1719
-
.cpu_name = "476",
1720
-
.cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1721
-
.cpu_user_features = COMMON_USER_BOOKE |
1722
-
PPC_FEATURE_HAS_FPU,
1723
-
.mmu_features = MMU_FTR_TYPE_47x |
1724
-
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1725
-
.icache_bsize = 32,
1726
-
.dcache_bsize = 128,
1727
-
.machine_check = machine_check_47x,
1728
-
.platform = "ppc470",
1729
-
},
1730
-
{ /* 476fpe */
1731
-
.pvr_mask = 0xffff0000,
1732
-
.pvr_value = 0x7ff50000,
1733
-
.cpu_name = "476fpe",
1734
-
.cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1735
-
.cpu_user_features = COMMON_USER_BOOKE |
1736
-
PPC_FEATURE_HAS_FPU,
1737
-
.mmu_features = MMU_FTR_TYPE_47x |
1738
-
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1739
-
.icache_bsize = 32,
1740
-
.dcache_bsize = 128,
1741
-
.machine_check = machine_check_47x,
1742
-
.platform = "ppc470",
1743
-
},
1744
-
{ /* 476 iss */
1745
-
.pvr_mask = 0xffff0000,
1746
-
.pvr_value = 0x00050000,
1747
-
.cpu_name = "476",
1748
-
.cpu_features = CPU_FTRS_47X,
1749
-
.cpu_user_features = COMMON_USER_BOOKE |
1750
-
PPC_FEATURE_HAS_FPU,
1751
-
.mmu_features = MMU_FTR_TYPE_47x |
1752
-
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1753
-
.icache_bsize = 32,
1754
-
.dcache_bsize = 128,
1755
-
.machine_check = machine_check_47x,
1756
-
.platform = "ppc470",
1757
-
},
1758
-
{ /* 476 others */
1759
-
.pvr_mask = 0xffff0000,
1760
-
.pvr_value = 0x11a50000,
1761
-
.cpu_name = "476",
1762
-
.cpu_features = CPU_FTRS_47X,
1763
-
.cpu_user_features = COMMON_USER_BOOKE |
1764
-
PPC_FEATURE_HAS_FPU,
1765
-
.mmu_features = MMU_FTR_TYPE_47x |
1766
-
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1767
-
.icache_bsize = 32,
1768
-
.dcache_bsize = 128,
1769
-
.machine_check = machine_check_47x,
1770
-
.platform = "ppc470",
1771
-
},
1772
-
{ /* default match */
1773
-
.pvr_mask = 0x00000000,
1774
-
.pvr_value = 0x00000000,
1775
-
.cpu_name = "(generic 47x PPC)",
1776
-
.cpu_features = CPU_FTRS_47X,
1777
-
.cpu_user_features = COMMON_USER_BOOKE,
1778
-
.mmu_features = MMU_FTR_TYPE_47x,
1779
-
.icache_bsize = 32,
1780
-
.dcache_bsize = 128,
1781
-
.machine_check = machine_check_47x,
1782
-
.platform = "ppc470",
1783
-
}
1784
-
#endif /* CONFIG_PPC_47x */
1785
-
#endif /* CONFIG_44x */
1786
-
#endif /* CONFIG_PPC32 */
1787
-
#ifdef CONFIG_E500
1788
-
#ifdef CONFIG_PPC32
1789
-
#ifndef CONFIG_PPC_E500MC
1790
-
{ /* e500 */
1791
-
.pvr_mask = 0xffff0000,
1792
-
.pvr_value = 0x80200000,
1793
-
.cpu_name = "e500",
1794
-
.cpu_features = CPU_FTRS_E500,
1795
-
.cpu_user_features = COMMON_USER_BOOKE |
1796
-
PPC_FEATURE_HAS_SPE_COMP |
1797
-
PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1798
-
.cpu_user_features2 = PPC_FEATURE2_ISEL,
1799
-
.mmu_features = MMU_FTR_TYPE_FSL_E,
1800
-
.icache_bsize = 32,
1801
-
.dcache_bsize = 32,
1802
-
.num_pmcs = 4,
1803
-
.cpu_setup = __setup_cpu_e500v1,
1804
-
.machine_check = machine_check_e500,
1805
-
.platform = "ppc8540",
1806
-
},
1807
-
{ /* e500v2 */
1808
-
.pvr_mask = 0xffff0000,
1809
-
.pvr_value = 0x80210000,
1810
-
.cpu_name = "e500v2",
1811
-
.cpu_features = CPU_FTRS_E500_2,
1812
-
.cpu_user_features = COMMON_USER_BOOKE |
1813
-
PPC_FEATURE_HAS_SPE_COMP |
1814
-
PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1815
-
PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1816
-
.cpu_user_features2 = PPC_FEATURE2_ISEL,
1817
-
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1818
-
.icache_bsize = 32,
1819
-
.dcache_bsize = 32,
1820
-
.num_pmcs = 4,
1821
-
.cpu_setup = __setup_cpu_e500v2,
1822
-
.machine_check = machine_check_e500,
1823
-
.platform = "ppc8548",
1824
-
.cpu_down_flush = cpu_down_flush_e500v2,
1825
-
},
1826
-
#else
1827
-
{ /* e500mc */
1828
-
.pvr_mask = 0xffff0000,
1829
-
.pvr_value = 0x80230000,
1830
-
.cpu_name = "e500mc",
1831
-
.cpu_features = CPU_FTRS_E500MC,
1832
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1833
-
.cpu_user_features2 = PPC_FEATURE2_ISEL,
1834
-
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1835
-
MMU_FTR_USE_TLBILX,
1836
-
.icache_bsize = 64,
1837
-
.dcache_bsize = 64,
1838
-
.num_pmcs = 4,
1839
-
.cpu_setup = __setup_cpu_e500mc,
1840
-
.machine_check = machine_check_e500mc,
1841
-
.platform = "ppce500mc",
1842
-
.cpu_down_flush = cpu_down_flush_e500mc,
1843
-
},
1844
-
#endif /* CONFIG_PPC_E500MC */
1845
-
#endif /* CONFIG_PPC32 */
1846
-
#ifdef CONFIG_PPC_E500MC
1847
-
{ /* e5500 */
1848
-
.pvr_mask = 0xffff0000,
1849
-
.pvr_value = 0x80240000,
1850
-
.cpu_name = "e5500",
1851
-
.cpu_features = CPU_FTRS_E5500,
1852
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1853
-
.cpu_user_features2 = PPC_FEATURE2_ISEL,
1854
-
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1855
-
MMU_FTR_USE_TLBILX,
1856
-
.icache_bsize = 64,
1857
-
.dcache_bsize = 64,
1858
-
.num_pmcs = 4,
1859
-
.cpu_setup = __setup_cpu_e5500,
1860
-
#ifndef CONFIG_PPC32
1861
-
.cpu_restore = __restore_cpu_e5500,
1862
-
#endif
1863
-
.machine_check = machine_check_e500mc,
1864
-
.platform = "ppce5500",
1865
-
.cpu_down_flush = cpu_down_flush_e5500,
1866
-
},
1867
-
{ /* e6500 */
1868
-
.pvr_mask = 0xffff0000,
1869
-
.pvr_value = 0x80400000,
1870
-
.cpu_name = "e6500",
1871
-
.cpu_features = CPU_FTRS_E6500,
1872
-
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
1873
-
PPC_FEATURE_HAS_ALTIVEC_COMP,
1874
-
.cpu_user_features2 = PPC_FEATURE2_ISEL,
1875
-
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1876
-
MMU_FTR_USE_TLBILX,
1877
-
.icache_bsize = 64,
1878
-
.dcache_bsize = 64,
1879
-
.num_pmcs = 6,
1880
-
.cpu_setup = __setup_cpu_e6500,
1881
-
#ifndef CONFIG_PPC32
1882
-
.cpu_restore = __restore_cpu_e6500,
1883
-
#endif
1884
-
.machine_check = machine_check_e500mc,
1885
-
.platform = "ppce6500",
1886
-
.cpu_down_flush = cpu_down_flush_e6500,
1887
-
},
1888
-
#endif /* CONFIG_PPC_E500MC */
1889
-
#ifdef CONFIG_PPC32
1890
-
{ /* default match */
1891
-
.pvr_mask = 0x00000000,
1892
-
.pvr_value = 0x00000000,
1893
-
.cpu_name = "(generic E500 PPC)",
1894
-
.cpu_features = CPU_FTRS_E500,
1895
-
.cpu_user_features = COMMON_USER_BOOKE |
1896
-
PPC_FEATURE_HAS_SPE_COMP |
1897
-
PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1898
-
.mmu_features = MMU_FTR_TYPE_FSL_E,
1899
-
.icache_bsize = 32,
1900
-
.dcache_bsize = 32,
1901
-
.machine_check = machine_check_e500,
1902
-
.platform = "powerpc",
1903
-
}
1904
-
#endif /* CONFIG_PPC32 */
1905
-
#endif /* CONFIG_E500 */
1906
-
};
31
+
#include "cpu_specs.h"
1907
32
1908
33
void __init set_cur_cpu_spec(struct cpu_spec *s)
1909
34
{