Signed-off-by: Jody McIntyre <scjody@modernduck.com>

+5 -3
+5 -3
drivers/ieee1394/ohci1394.c
··· 572 572 OHCI1394_reqTxComplete | 573 573 OHCI1394_isochRx | 574 574 OHCI1394_isochTx | 575 + OHCI1394_postedWriteErr | 575 576 OHCI1394_cycleInconsistent); 576 577 577 578 /* Enable link */ ··· 2375 2374 2376 2375 event &= ~OHCI1394_unrecoverableError; 2377 2376 } 2378 - 2377 + if (event & OHCI1394_postedWriteErr) { 2378 + PRINT(KERN_ERR, "physical posted write error"); 2379 + /* no recovery strategy yet, had to involve protocol drivers */ 2380 + } 2379 2381 if (event & OHCI1394_cycleInconsistent) { 2380 2382 /* We subscribe to the cycleInconsistent event only to 2381 2383 * clear the corresponding event bit... otherwise, ··· 2386 2382 DBGMSG("OHCI1394_cycleInconsistent"); 2387 2383 event &= ~OHCI1394_cycleInconsistent; 2388 2384 } 2389 - 2390 2385 if (event & OHCI1394_busReset) { 2391 2386 /* The busReset event bit can't be cleared during the 2392 2387 * selfID phase, so we disable busReset interrupts, to ··· 2429 2426 } 2430 2427 event &= ~OHCI1394_busReset; 2431 2428 } 2432 - 2433 2429 if (event & OHCI1394_reqTxComplete) { 2434 2430 struct dma_trm_ctx *d = &ohci->at_req_context; 2435 2431 DBGMSG("Got reqTxComplete interrupt "