Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ptp: convert remaining drivers to adjfine interface

Convert all remaining drivers that still use .adjfreq to the newer .adjfine
implementation. These drivers are not straightforward, as they use
non-standard methods of programming their hardware. They are all converted
to use scaled_ppm_to_ppb to get the parts per billion value that their
logic depends on.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Cc: Ariel Elior <aelior@marvell.com>
Cc: Sudarsana Kalluru <skalluru@marvell.com>
Cc: Manish Chopra <manishc@marvell.com>
Cc: Derek Chickles <dchickles@marvell.com>
Cc: Satanand Burla <sburla@marvell.com>
Cc: Felix Manlunas <fmanlunas@marvell.com>
Cc: Raju Rangoju <rajur@chelsio.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Edward Cree <ecree.xilinx@gmail.com>
Cc: Martin Habets <habetsm.xilinx@gmail.com>
Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Jacob Keller and committed by
David S. Miller
e2bd9c76 a29c132f

+50 -33
+5 -4
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
··· 13671 13671 return bnx2x_func_state_change(bp, &func_params); 13672 13672 } 13673 13673 13674 - static int bnx2x_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 13674 + static int bnx2x_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 13675 13675 { 13676 13676 struct bnx2x *bp = container_of(ptp, struct bnx2x, ptp_clock_info); 13677 13677 int rc; 13678 13678 int drift_dir = 1; 13679 13679 int val, period, period1, period2, dif, dif1, dif2; 13680 13680 int best_dif = BNX2X_MAX_PHC_DRIFT, best_period = 0, best_val = 0; 13681 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 13681 13682 13682 - DP(BNX2X_MSG_PTP, "PTP adjfreq called, ppb = %d\n", ppb); 13683 + DP(BNX2X_MSG_PTP, "PTP adjfine called, ppb = %d\n", ppb); 13683 13684 13684 13685 if (!netif_running(bp->dev)) { 13685 13686 DP(BNX2X_MSG_PTP, 13686 - "PTP adjfreq called while the interface is down\n"); 13687 + "PTP adjfine called while the interface is down\n"); 13687 13688 return -ENETDOWN; 13688 13689 } 13689 13690 ··· 13819 13818 bp->ptp_clock_info.n_ext_ts = 0; 13820 13819 bp->ptp_clock_info.n_per_out = 0; 13821 13820 bp->ptp_clock_info.pps = 0; 13822 - bp->ptp_clock_info.adjfreq = bnx2x_ptp_adjfreq; 13821 + bp->ptp_clock_info.adjfine = bnx2x_ptp_adjfine; 13823 13822 bp->ptp_clock_info.adjtime = bnx2x_ptp_adjtime; 13824 13823 bp->ptp_clock_info.gettime64 = bnx2x_ptp_gettime; 13825 13824 bp->ptp_clock_info.settime64 = bnx2x_ptp_settime;
+7 -4
drivers/net/ethernet/cavium/liquidio/lio_main.c
··· 1512 1512 } 1513 1513 1514 1514 /** 1515 - * liquidio_ptp_adjfreq - Adjust ptp frequency 1515 + * liquidio_ptp_adjfine - Adjust ptp frequency 1516 1516 * @ptp: PTP clock info 1517 - * @ppb: how much to adjust by, in parts-per-billion 1517 + * @scaled_ppm: how much to adjust by, in scaled parts-per-million 1518 + * 1519 + * Scaled parts per million is ppm with a 16-bit binary fractional field. 1518 1520 */ 1519 - static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 1521 + static int liquidio_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 1520 1522 { 1521 1523 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1522 1524 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1525 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 1523 1526 u64 comp, delta; 1524 1527 unsigned long flags; 1525 1528 bool neg_adj = false; ··· 1646 1643 lio->ptp_info.n_ext_ts = 0; 1647 1644 lio->ptp_info.n_per_out = 0; 1648 1645 lio->ptp_info.pps = 0; 1649 - lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; 1646 + lio->ptp_info.adjfine = liquidio_ptp_adjfine; 1650 1647 lio->ptp_info.adjtime = liquidio_ptp_adjtime; 1651 1648 lio->ptp_info.gettime64 = liquidio_ptp_gettime; 1652 1649 lio->ptp_info.settime64 = liquidio_ptp_settime;
+8 -5
drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c
··· 194 194 } 195 195 196 196 /** 197 - * cxgb4_ptp_adjfreq - Adjust frequency of PHC cycle counter 197 + * cxgb4_ptp_adjfine - Adjust frequency of PHC cycle counter 198 198 * @ptp: ptp clock structure 199 - * @ppb: Desired frequency change in parts per billion 199 + * @scaled_ppm: Desired frequency in scaled parts per billion 200 200 * 201 - * Adjust the frequency of the PHC cycle counter by the indicated ppb from 201 + * Adjust the frequency of the PHC cycle counter by the indicated amount from 202 202 * the base frequency. 203 + * 204 + * Scaled parts per million is ppm with a 16-bit binary fractional field. 203 205 */ 204 - static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 206 + static int cxgb4_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 205 207 { 206 208 struct adapter *adapter = (struct adapter *)container_of(ptp, 207 209 struct adapter, ptp_clock_info); 210 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 208 211 struct fw_ptp_cmd c; 209 212 int err; 210 213 ··· 407 404 .n_ext_ts = 0, 408 405 .n_per_out = 0, 409 406 .pps = 0, 410 - .adjfreq = cxgb4_ptp_adjfreq, 407 + .adjfine = cxgb4_ptp_adjfine, 411 408 .adjtime = cxgb4_ptp_adjtime, 412 409 .gettime64 = cxgb4_ptp_gettime, 413 410 .settime64 = cxgb4_ptp_settime,
+8 -5
drivers/net/ethernet/freescale/fec_ptp.c
··· 338 338 } 339 339 340 340 /** 341 - * fec_ptp_adjfreq - adjust ptp cycle frequency 341 + * fec_ptp_adjfine - adjust ptp cycle frequency 342 342 * @ptp: the ptp clock structure 343 - * @ppb: parts per billion adjustment from base 343 + * @scaled_ppm: scaled parts per million adjustment from base 344 344 * 345 345 * Adjust the frequency of the ptp cycle counter by the 346 - * indicated ppb from the base frequency. 346 + * indicated amount from the base frequency. 347 + * 348 + * Scaled parts per million is ppm with a 16-bit binary fractional field. 347 349 * 348 350 * Because ENET hardware frequency adjust is complex, 349 351 * using software method to do that. 350 352 */ 351 - static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 353 + static int fec_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 352 354 { 355 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 353 356 unsigned long flags; 354 357 int neg_adj = 0; 355 358 u32 i, tmp; ··· 745 742 fep->ptp_caps.n_per_out = 1; 746 743 fep->ptp_caps.n_pins = 0; 747 744 fep->ptp_caps.pps = 1; 748 - fep->ptp_caps.adjfreq = fec_ptp_adjfreq; 745 + fep->ptp_caps.adjfine = fec_ptp_adjfine; 749 746 fep->ptp_caps.adjtime = fec_ptp_adjtime; 750 747 fep->ptp_caps.gettime64 = fec_ptp_gettime; 751 748 fep->ptp_caps.settime64 = fec_ptp_settime;
+8 -5
drivers/net/ethernet/qlogic/qede/qede_ptp.c
··· 28 28 }; 29 29 30 30 /** 31 - * qede_ptp_adjfreq() - Adjust the frequency of the PTP cycle counter. 31 + * qede_ptp_adjfine() - Adjust the frequency of the PTP cycle counter. 32 32 * 33 33 * @info: The PTP clock info structure. 34 - * @ppb: Parts per billion adjustment from base. 34 + * @scaled_ppm: Scaled parts per million adjustment from base. 35 + * 36 + * Scaled parts per million is ppm with a 16-bit binary fractional field. 35 37 * 36 38 * Return: Zero on success, negative errno otherwise. 37 39 */ 38 - static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb) 40 + static int qede_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm) 39 41 { 40 42 struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info); 43 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 41 44 struct qede_dev *edev = ptp->edev; 42 45 int rc; 43 46 ··· 50 47 rc = ptp->ops->adjfreq(edev->cdev, ppb); 51 48 spin_unlock_bh(&ptp->lock); 52 49 } else { 53 - DP_ERR(edev, "PTP adjfreq called while interface is down\n"); 50 + DP_ERR(edev, "PTP adjfine called while interface is down\n"); 54 51 rc = -EFAULT; 55 52 } 56 53 __qede_unlock(edev); ··· 465 462 ptp->clock_info.n_ext_ts = 0; 466 463 ptp->clock_info.n_per_out = 0; 467 464 ptp->clock_info.pps = 0; 468 - ptp->clock_info.adjfreq = qede_ptp_adjfreq; 465 + ptp->clock_info.adjfine = qede_ptp_adjfine; 469 466 ptp->clock_info.adjtime = qede_ptp_adjtime; 470 467 ptp->clock_info.gettime64 = qede_ptp_gettime; 471 468 ptp->clock_info.settime64 = qede_ptp_settime;
+4 -3
drivers/net/ethernet/sfc/ptp.c
··· 351 351 void (*xmit_skb)(struct efx_nic *efx, struct sk_buff *skb); 352 352 }; 353 353 354 - static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); 354 + static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm); 355 355 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); 356 356 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); 357 357 static int efx_phc_settime(struct ptp_clock_info *ptp, ··· 1508 1508 .n_per_out = 0, 1509 1509 .n_pins = 0, 1510 1510 .pps = 1, 1511 - .adjfreq = efx_phc_adjfreq, 1511 + .adjfine = efx_phc_adjfine, 1512 1512 .adjtime = efx_phc_adjtime, 1513 1513 .gettime64 = efx_phc_gettime, 1514 1514 .settime64 = efx_phc_settime, ··· 2137 2137 ptp->ts_corrections.general_rx); 2138 2138 } 2139 2139 2140 - static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) 2140 + static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 2141 2141 { 2142 2142 struct efx_ptp_data *ptp_data = container_of(ptp, 2143 2143 struct efx_ptp_data, 2144 2144 phc_clock_info); 2145 + s32 delta = scaled_ppm_to_ppb(scaled_ppm); 2145 2146 struct efx_nic *efx = ptp_data->efx; 2146 2147 MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); 2147 2148 s64 adjustment_ns;
+4 -3
drivers/net/ethernet/sfc/siena/ptp.c
··· 347 347 void (*xmit_skb)(struct efx_nic *efx, struct sk_buff *skb); 348 348 }; 349 349 350 - static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); 350 + static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm); 351 351 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); 352 352 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); 353 353 static int efx_phc_settime(struct ptp_clock_info *ptp, ··· 1429 1429 .n_per_out = 0, 1430 1430 .n_pins = 0, 1431 1431 .pps = 1, 1432 - .adjfreq = efx_phc_adjfreq, 1432 + .adjfine = efx_phc_adjfine, 1433 1433 .adjtime = efx_phc_adjtime, 1434 1434 .gettime64 = efx_phc_gettime, 1435 1435 .settime64 = efx_phc_settime, ··· 2044 2044 ptp->ts_corrections.general_rx); 2045 2045 } 2046 2046 2047 - static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) 2047 + static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 2048 2048 { 2049 2049 struct efx_ptp_data *ptp_data = container_of(ptp, 2050 2050 struct efx_ptp_data, 2051 2051 phc_clock_info); 2052 + s32 delta = scaled_ppm_to_ppb(scaled_ppm); 2052 2053 struct efx_nic *efx = ptp_data->efx; 2053 2054 MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); 2054 2055 s64 adjustment_ns;
+3 -2
drivers/net/ethernet/ti/am65-cpts.c
··· 391 391 } 392 392 393 393 /* PTP clock operations */ 394 - static int am65_cpts_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 394 + static int am65_cpts_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 395 395 { 396 396 struct am65_cpts *cpts = container_of(ptp, struct am65_cpts, ptp_info); 397 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 397 398 int neg_adj = 0; 398 399 u64 adj_period; 399 400 u32 val; ··· 626 625 static struct ptp_clock_info am65_ptp_info = { 627 626 .owner = THIS_MODULE, 628 627 .name = "CTPS timer", 629 - .adjfreq = am65_cpts_ptp_adjfreq, 628 + .adjfine = am65_cpts_ptp_adjfine, 630 629 .adjtime = am65_cpts_ptp_adjtime, 631 630 .gettimex64 = am65_cpts_ptp_gettimex, 632 631 .settime64 = am65_cpts_ptp_settime,
+3 -2
drivers/ptp/ptp_dte.c
··· 134 134 return ns; 135 135 } 136 136 137 - static int ptp_dte_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 137 + static int ptp_dte_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 138 138 { 139 + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); 139 140 u32 nco_incr; 140 141 unsigned long flags; 141 142 struct ptp_dte *ptp_dte = container_of(ptp, struct ptp_dte, caps); ··· 220 219 .n_ext_ts = 0, 221 220 .n_pins = 0, 222 221 .pps = 0, 223 - .adjfreq = ptp_dte_adjfreq, 222 + .adjfine = ptp_dte_adjfine, 224 223 .adjtime = ptp_dte_adjtime, 225 224 .gettime64 = ptp_dte_gettime, 226 225 .settime64 = ptp_dte_settime,